Patent application number | Description | Published |
20090237054 | Digital Control of Power Converters - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, and comparing the digital error signal to at least a first threshold value. If the digital error signal is less than the first threshold value, a pulse is generated to control the power converter. Another embodiment includes multiple thresholds that may be compared against the digital error signal. | 09-24-2009 |
20090237959 | Digital Control of Power Converters - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, a digital pulse generator, and a pre-driver to control the power converter. Another embodiment also includes a digital filter as part of the control loop that may be used to control the loop characteristics of the control circuit. Yet another embodiment replaces the differential circuit with a sigma-delta analog-to-digital modulator and a decimator. | 09-24-2009 |
20090237966 | DIGITAL CONTROL OF POWER CONVERTERS - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, and comparing the digital error signal to at least a first threshold value. If the digital error signal is less than the first threshold value, a pulse is generated to control the power converter. Another embodiment includes multiple thresholds that may be compared against the digital error signal. | 09-24-2009 |
20110006844 | Class D Amplifier Control Circuit and Method - Circuit and method for a Class D amplifier. In one exemplary embodiment, an audio amplifier is disclosed. A closed loop configuration for driving high and low side driver transistors is provided, each circuit is compatible with advanced sub micron semiconductor processes. The analog time varying input is coupled to one input of a sigma delta analog to digital converter. A feedback signal from the output is also input to the analog to digital converter. A bit stream is output by the analog to digital converter. A decimator receives this bit stream and downconverts the samples to digital values at a lower frequency. A digital filter with adaptable coefficients is used to filter that signal and a digital pulse width modulator then develops an analog differential PWM signal. A predriver inputs the PWM signal and derives the output gating signals to control the high and low side drivers of a Class D amplifier. | 01-13-2011 |
20110102223 | AMPLIFIER WITH DIGITAL INPUT AND DIGITAL PWM CONTROL LOOP - A class D amplifier is configured to accept a digital input signal wherein the control loop of the class D amplifier employs a hybrid filter merged with the front-end of a sigma-delta ADC converter. The term hybrid refers to the filter using both digital and analog components in which the digital delay elements serve as shift registers while the filter coefficients are analog. The filter converts the digital PDM data into a step-wise sinusoidal signal. The sigma-delta ADC receiving a feedback signal subtracts the step-wise sinusoidal signal from the continuous sinusoidal signal and converts the result to a digital PDM signal, without decimation, which passes through a digital filter, a PWM generator, and a pre-driver, to provide power to the load. | 05-05-2011 |
20110187566 | NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS - A noise shaper that compares an input signal to a feedback output signal, which is a truncated version of the input signal, and generates the difference between the two signals (i.e., the error). The noise shaper then integrates the errors by adding to the error multiple of its delayed versions, and quantizes the integrated errors in such a way that the spectrum of the quantization noise is shaped toward high frequencies to be removed by a LC low-pass filter used in conjunction with the noise shaper. The low frequency content of the desired signal is mostly unaffected. | 08-04-2011 |
20110199246 | HIGH RESOLUTION DELTA-SIGMA DIGITAL-TO-ANALOG CONVERTER - A circuit for a delta-sigma digital-to-analog converter (DAC) includes a first stage with a delta-sigma noise-shaping loop. The first stage is capable of receiving an input signal, includes a first quantizer that has a first quantization error, and provides a first stage output. A first DAC receives the first stage output and provides a first analog output. A second stage receives the first quantization error. The second stage provides a second stage output to the digital differentiator. A second DAC receives a digital differentiator output and provides a second analog output. An adder adds the first analog output and the second analog output to provide a third analog output, so that the first quantization error is cancelled out and the inband noise is suppressed in the third analog output. | 08-18-2011 |
20120242521 | METHOD AND CIRCUIT FOR CONTINUOUS-TIME DELTA-SIGMA DAC WITH REDUCED NOISE - A continuous-time delta-sigma digital-to-analog converter (DAC) includes a first delta-sigma modulator configured to quantize a most significant bit or bits of a digital input signal and produce a first quantization error signal, and a second multi-stage delta-sigma modulator configured to quantize less significant bits of the digital input signal. A first DAC is coupled to an output of the first delta-sigma modulator, and a second DAC is coupled to an output of the second noise-shaping filter. The second DAC has a greater resolution than the first DAC. A low pass output filter is coupled to a sum of an output of the first DAC and an output of the second DAC. | 09-27-2012 |
20130009795 | NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS - A circuit including an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a noise shaper. The noise shaper is configured to truncate the digital output and generate a noise shaper output having a lower number of bits than the digital output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC). The PWM DAC configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output. | 01-10-2013 |
20130044018 | METHOD AND CIRCUIT FOR CONTINUOUS-TIME DELTA-SIGMA DAC WITH REDUCED NOISE - A continuous-time delta-sigma digital-to-analog converter (DAC) includes a first delta-sigma modulator configured to quantize a most significant bit or bits of a digital input signal and produce a first quantization error signal, and a second multi-stage delta-sigma modulator configured to quantize less significant bits of the digital input signal. A first DAC is coupled to an output of the first delta-sigma modulator, and a second DAC is coupled to an output of the second noise-shaping filter. The second DAC has a greater resolution than the first DAC. A low pass output filter is coupled to a sum of an output of the first DAC and an output of the second DAC. | 02-21-2013 |