| Patent application number | Description | Published |
|---|
| 20080228895 | DIRECT FILE TRANSFER HOST PROCESSOR - A computing host includes a communication processor that receives a file request from a computer network for transferring a file between the computer network and a storage device. If the file is directly transferable between the computer network and the storage device without a need for processing the file by a host processor of the computing host, the communication processor performs the file transfer. Otherwise, the host processor processes the file and performs the file transfer. | 09-18-2008 |
| 20090043776 | System and method for direct file transfer in a computer network - A computing host includes a host processor and a communication processor both coupled in communication with a network and a storage device. The host processor receives a file request for transferring a file between the network the storage device, determines that the file request is to be performed by using a direct file transfer, generates a command based on the file request, and provides the command to the communication processor. The communication processor transfers the file between the network and the storage device based on the command without passing the file through the host processor. Additionally, the communication processor can transmit the file to the network. | 02-12-2009 |
| 20090327589 | TABLE JOURNALING IN FLASH STORAGE DEVICES - A method of table journaling in a flash storage device comprising a volatile memory and a plurality of non-volatile data blocks is provided. The method comprises the steps of creating a first copy in a first one or more of the plurality of non-volatile data blocks of an addressing table stored in the volatile memory, writing transaction log data to a second one or more of the plurality of non-volatile data blocks, and updating the first copy of the addressing table based on changes to the addressing table stored in the volatile memory after the second one or more of the plurality of non-volatile data blocks have been filled with transaction log data. | 12-31-2009 |
| 20090327590 | ENHANCED MLC SOLID STATE DEVICE - Flash memory drives and related methods are disclosed that operate to keep frequently written data, which results in frequently erased blocks, in SLC-mimicking MLC flash, and relatively static data in normal MLC flash. A flash drive according to the present disclosure keeps track of the number of times that data for each logical block address (LBA) has been written to the flash memory, and determines whether to store newly received data associated with a particular LBA in SLC-mimicking MLC flash or in normal MLC flash depending on the number of writes that have occurred for that particular LBA. Dynamic allocation can occur between the two types of MLC. Related methods and software are also described. | 12-31-2009 |
| 20090327591 | SLC-MLC COMBINATION FLASH STORAGE DEVICE - Flash memory drives and related methods are disclosed that operate to keep frequently written data, which results in frequently erased blocks, in SLC flash, and relatively static data in MLC flash. A flash drive according to the present disclosure keeps track of the number of times that data for each logical block address (LBA) has been written to the flash memory, and determines whether to store newly received data associated with a particular LBA in SLC flash or in MLC flash depending on the number of writes that have occurred for that particular LBA. For each logical block sent to the flash drive, a comparison is made of the write count of the associated LBA to a threshold. If the write count is above the threshold, the logical block is written to SLC flash. If the write count is below the threshold, the logical block is written to MLC flash. | 12-31-2009 |
| 20090327804 | WEAR LEVELING IN FLASH STORAGE DEVICES - A method of wear leveling in a flash storage device comprising a plurality of data blocks is provided. The method comprises the steps of detecting a data error in a read of dynamic data from a first data segment of a first data block of the plurality of data blocks, correcting the data error, and moving the dynamic data from the first data segment to a second data segment in a second one of the plurality of data blocks. | 12-31-2009 |
| 20090327840 | REDUNDANT DATA DISTRIBUTION IN A FLASH STORAGE DEVICE - A flash storage device comprises a plurality of channels of flash storage, a system memory, and a controller. The controller is configured to cache, in the system memory, data to be written, to partition the data into a plurality of data portions, to generate error correction information based on the plurality of data portions, to write the error correction information to a first one or more of the plurality of channels of flash storage, and to write each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof. | 12-31-2009 |
| 20100042901 | SUPPORTING VARIABLE SECTOR SIZES IN FLASH STORAGE DEVICES - A flash storage device comprises a plurality of data blocks, each data block comprising a plurality of data segments, a system memory, and a controller. The controller is configured to cache in the system memory a plurality of data sectors to be written, to write to a first one of the plurality of data segments a first one of the plurality of data sectors, to write to the first one of the plurality of data segments a first portion of a second one of the plurality of data sectors, and to write to a second one of the plurality of data segments a second portion of the second one of the plurality of data sectors. | 02-18-2010 |
| 20100202237 | FLASH BACKED DRAM MODULE WITH A SELECTABLE NUMBER OF FLASH CHIPS - A memory device for use with a primary power source and a backup power source, includes: volatile memory; an interface for connecting to a backup power source; a plurality of ports, each of which is for receiving a different corresponding non-volatile memory chip; a plurality of interfaces, each of which is for communicating through a different corresponding one of the plurality of ports with any non-volatile memory connected to that port; a controller that is programmed to activate a selectable set of the plurality of interfaces depending on which ports are to receive non-volatile memory chips, wherein said controller is also programmed to react to a loss of power from the primary power source by moving data from the volatile memory through the selected interfaces to whatever non-volatile memory is connected to the selectable set of interfaces. | 08-12-2010 |
| 20100202238 | FLASH BACKED DRAM MODULE INCLUDING LOGIC FOR ISOLATING THE DRAM - A memory device for use with a primary power source including: non-volatile memory; volatile memory; an interface for connecting to a backup power source; isolation logic for controlling access to the volatile memory by a host processor, said isolation logic having a first mode during which the isolation logic provides the host processor with access to the volatile memory for storing or reading data and a second mode during which the isolation logic isolates the volatile memory from access by the host processor; and a controller controlling the isolation logic, said controller programmed to place the isolation logic in the first mode when the volatile memory is being powered by the primary power source and, when power to the volatile memory from the primary power source is interrupted, to place the isolation logic in the second mode and transfer data from the volatile memory to the non-volatile memory. | 08-12-2010 |
| 20100202239 | STAGED-BACKUP FLASH BACKED DRAM MODULE - A memory device for use with a primary power source includes: volatile memory including a plurality of memory portions each of which has a normal operating state and a low-power state; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from the primary power source; a non-volatile memory; and a controller in communication with the volatile memory and the non-volatile memory programmed to detect a loss of power of the primary power source and in response to move data from the volatile memory to the non-volatile memory at least one memory portion at a time, and while moving data from the volatile memory to the non-volatile memory place the memory portions from which data is being moved into a normal operating state and the memory portions from which data is not being moved into a low-power state. | 08-12-2010 |
| 20100202240 | STATE OF HEALTH MONITORED FLASH BACKED DRAM MODULE - A device includes: non-volatile memory; a controller in communication with the non-volatile memory, wherein the controller is programmed to move data from a volatile memory to the non-volatile memory upon a loss of power of a primary power source of the volatile memory; and a backup power supply providing temporary power to the controller and the volatile memory upon the loss of power of the primary power source, including: a capacitor bank with an output terminal; a connection to a voltage source that charges the capacitor bank to a normal operating voltage; and a state-of-health monitor that is programmed to generate a failure signal based on a voltage at the output terminal of the capacitor bank. | 08-12-2010 |
| 20100205348 | FLASH BACKED DRAM MODULE STORING PARAMETER INFORMATION OF THE DRAM MODULE IN THE FLASH - A device includes volatile memory; one or more non-volatile memory chips, each of which is for storing data moved from the volatile-memory; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from a primary power source; a controller in communication with the volatile memory and the non-volatile memory, wherein: the controller is programmed to move data from the volatile memory to the non-volatile memory chips upon a loss of power of the primary power source of the volatile memory; and parameters describing the volatile memory are stored in at least one of the non-volatile memory chips that store the data moved from the volatile memory. In some aspects the parameters include serial presence detect information. | 08-12-2010 |
| 20100205349 | SEGMENTED-MEMORY FLASH BACKED DRAM MODULE - A memory device for use with a primary power source, includes volatile memory including a plurality of memory segments defined by at least one starting addresses and a corresponding at least one ending address; an interface for connecting to a backup power source; a non-volatile memory; and a controller in communication with the volatile memory and the non-volatile memory programmed to detect a loss of power of the primary power source and in response to move data from the volatile memory to the non-volatile memory based on the at least one starting address and the at least one ending address. In some aspects, there is only one starting address and one ending address and only data that is stored in the volatile memory at addresses between the one starting address and one ending address is moved to the non-volatile memory. | 08-12-2010 |
| 20100205470 | FLASH BACKED DRAM MODULE WITH STATE OF HEALTH AND/OR STATUS INFORMATION ACCESSIBLE THROUGH A CONFIGURATION DATA BUS - A memory device includes: volatile memory; an interface for connecting to a backup power source; non-volatile memory; a first configuration data bus for accessing parameters describing substantially permanent characteristics of the volatile memory; a second configuration data bus for accessing at least one of state of health information of the backup power source and status information of the memory device, wherein the first configuration data bus and the second configuration data bus implement a same bus protocol; a controller programmed to detect a loss of power of a primary power source and move data from the volatile memory to the non-volatile memory, wherein configuration information of the controller is at least one of readable and writable through the first configuration data bus; and wherein at least one of the state-of-health information and the status information is at least one of readable and writable through the second configuration data bus. | 08-12-2010 |
| 20100327436 | APPARATUS AND METHOD FOR STACKING INTEGRATED CIRCUITS - A multi-chip stack module provides increased circuit density for a given surface chip footprint. Support structures are alternated with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. One aspect is a structure and method for interconnecting a plurality of generally planar chips in a vertical stack such that signals, which are common to the chips, are connected in the stack and signals, which are accessed individually, are separated within the stack. | 12-30-2010 |
| 20110019475 | INTERLEAVED FLASH STORAGE SYSTEM AND METHOD - A flash storage system accesses data interleaved among flash storage devices. The flash storage system receives a data block including data portions, stores the data portions in a data buffer, and initiates data transfers for asynchronously writing the data portions into storage blocks interleaved among the flash storage devices. Additionally, the flash storage system may asynchronously read data portions of a data block interleaved among the storage blocks, store the data portions in the data buffer, and access the data portions from the data buffer. | 01-27-2011 |
| 20110022777 | SYSTEM AND METHOD FOR DIRECT MEMORY ACCESS IN A FLASH STORAGE - A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a request to the flash storage device for a direct memory access. Additionally, the host provides data blocks to the flash storage device for the direct memory access. In the first communication protocol, the host need not provide an address to the flash storage device for the direct memory access. The flash storage device stores the data blocks at sequential addresses starting at a predetermined address in the flash storage device. Another host may then select a second communication protocol and transfer the data blocks in the flash storage by using the second communication protocol. | 01-27-2011 |
| 20110022782 | FLASH STORAGE WITH ARRAY OF ATTACHED DEVICES - A flash storage system includes a flash storage controller coupled to storage modules of a flash storage array via universal serial buses. Each storage module includes at least one flash memory device. The flash storage controller receives a programming command of a communication protocol and generates universal serial bus commands based on the programming command. The flash storage controller issues the universal serial bus commands to storage modules in the flash storage array via the universal serial buses. The storage modules process the universal serial bus commands to access data in the flash storage devices of the storage modules. | 01-27-2011 |
| 20110022783 | FLASH STORAGE WITH INCREASED THROUGHPUT - A flash storage system includes a flash storage controller coupled to storage modules of a flash storage array via universal serial buses. Each storage module includes at least one flash memory device. The flash storage controller receives a programming command of a communication protocol and generates universal serial bus commands based on the programming command. The flash storage controller issues the universal serial bus commands to storage modules in the flash storage array via the universal serial buses. The storage modules process the universal serial bus commands to access data in the flash storage devices of the storage modules. | 01-27-2011 |
| 20110022829 | FLASH STORAGE SYSTEM AND METHOD FOR ACCESSING A BOOT PROGRAM - A computing system includes a flash storage device that loads a boot program from a flash storage of the flash storage device to a random access memory of the flash storage device. A processor of the computing system then accesses the boot program from the random access memory and executes the boot program. | 01-27-2011 |
| 20110026328 | SYSTEM AND METHOD OF MAINTAINING DATA INTEGRITY IN A FLASH STORAGE DEVICE - A flash storage device includes a power hold circuit including a double layer capacitor. A power source supplies power to the flash storage device and charges the double layer capacitor. The double layer capacitor supplies power for maintaining integrity of data during a data transfer occurring in the flash storage device when the power supplied by the power source is disrupted. Additionally, the flash storage device can inhibit subsequent data transfers until the power supplied by the power source is restored. | 02-03-2011 |
| 20110029716 | SYSTEM AND METHOD OF RECOVERING DATA IN A FLASH STORAGE SYSTEM - A flash storage system includes a system controller that generates redundant data based on data stored in flash storage devices of the flash storage system. The system controller stores the redundant data in one or more of the flash storage devices. Additionally, the system controller identifies data that has become unavailable in one or more of the flash storage device, recovers the unavailable data based on the redundant data, and stores the recovered data into one or more other flash storage devices of the flash storage system. | 02-03-2011 |
| 20110029717 | FLASH STORAGE DEVICE WITH FLEXIBLE DATA FORMAT - A flash storage device includes a flash storage for storing data and a controller for receiving a command containing data and selecting a sector size for the data. The controller allocates the data among data sectors having the sector size and writes the data sectors to the flash storage. In some embodiments, the controller generates system data and stores the system data in the data sectors or a system sector, or both. | 02-03-2011 |
| 20110029808 | SYSTEM AND METHOD OF WEAR-LEVELING IN FLASH STORAGE - A flash storage device tracks performs wear-leveling by tracking data errors that occur when dynamic data is read from a storage block of the flash storage device and moving the dynamic data to an available storage block of the flash storage device. Additionally, the flash storage device identifies a storage block containing static data and moves the static data to the storage block previously containing the dynamic data. | 02-03-2011 |
