Patent application number | Description | Published |
20080237837 | Integrated Circuit Arrangement - An integrated circuit arrangement including a nonplanar substrate on which an integrated circuit is formed on at least one side, wherein the side of the substrate a which has the integrated circuit is arranged on a carrier and the carrier is produced from a chemically resistant material. | 10-02-2008 |
20080251904 | CURING LAYERS OF A SEMICONDUCTOR PRODUCT USING ELECTROMAGNETIC FIELDS - A semiconductor product including a substrate, a semiconductor chip fitted to the substrate, and a layer, which contains coated particles, located adjacent to the semiconductor chip, wherein the coated particles have a ferromagnetic, ferrimagnetic or paramagnetic core and a coating. | 10-16-2008 |
20080278217 | PROTECTION FOR CIRCUIT BOARDS - A system comprising a circuit board and an integrated circuit device mounted on the circuit board by means of an external contact, and comprising an anti-tamper device being connectable to the external contact to switch the integrated circuit device into a safe mode upon application of a predetermined electrical state at the external contact is described. | 11-13-2008 |
20090072379 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One embodiment includes a carrier, a semiconductor chip attached to the carrier, a first conducting line having a first thickness and being deposited over the semiconductor chip and the carrier and a second conducting line having a second thickness and being deposited over the semiconductor chip and the carrier. The first thickness is smaller than the second thickness. | 03-19-2009 |
20090072413 | SEMICONDUCTOR DEVICE - A semiconductor device and method is disclosed. One embodiment provides a substrate and a first semiconductor chip applied over the substrate. A first electrically conductive layer is applied over the substrate and the first semiconductor chip. A first electrically insulating layer is applied over the first electrically conductive layer. A second electrically conductive layer is applied over the first electrically insulating layer. | 03-19-2009 |
20090072415 | INTEGRATED CIRCUIT DEVICE HAVING A GAS-PHASE DEPOSITED INSULATION LAYER - An integrated circuit device includes a semiconductor device having an integrated circuit. A gas-phase deposited insulation layer is disposed on the semiconductor device, and a conducting line is disposed over the gas-phase deposited insulation layer. | 03-19-2009 |
20090079057 | INTEGRATED CIRCUIT DEVICE - An integrated circuit device includes a carrier defining a surface with a semiconductor chip including an integrated circuit attached to the carrier. An insulation layer is disposed over the carrier, extending above the surface of the carrier a first distance at a first location and a second distance at a second location. A transition area is defined between the first and second locations, wherein the transition area defines a non-right angle relative to the surface. | 03-26-2009 |
20090191665 | Electronic Device and Method of Manufacturing Same - This application relates to a method of manufacturing an electronic device comprising placing a first chip on a carrier; applying an insulating layer over the first chip and the carrier; applying a metal ions containing solution to the insulating layer for producing a first metal layer of a first thickness; and producing a second metal layer of a second thickness on the insulating layer wherein at least one of the first metal layer and the second metal layer comprises at least a portion that is laterally spaced apart from the respective other metal layer. | 07-30-2009 |
20090236749 | ELECTRONIC DEVICE AND MANUFACTURING THEREOF - One aspect is a method including providing a carrier having a first conducting layer, a first insulating layer over the first conducting layer, and at least one through-connection from a first face of the first insulating layer to a second face of the first insulating layer; attaching at least two semiconductor chips to the carrier; applying a second insulating layer over the carrier; opening the second insulating layer until the carrier is exposed; depositing a metal layer over the opened second insulating layer; and separating the at least two semiconductor chips after depositing the metal layer. | 09-24-2009 |
20090236757 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING - A semiconductor device and method for manufacturing. One embodiment includes a carrier, a structured layer arranged over the carrier and a semiconductor chip applied to the structured layer. The structured layer includes a first structure made of an elastic material and a second structure made of an adhesive material. | 09-24-2009 |
20100025829 | SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes providing a foil formed of an insulating material, where the foil includes at least one electrically conducting element, providing a chip having contact elements on a first face of the chip, and applying the foil over the contact elements of the chip. | 02-04-2010 |
20100044842 | SEMICONDUCTOR DEVICE - A semiconductor device includes a carrier, a chip coupled to the carrier, a dielectric layer coupled to the carrier and the chip, and conducting elements connected to both the carrier and contacts of the chip. The chip includes a first face with a first contact spaced apart from a second contact. The dielectric layer includes a photoinitiator that configures the dielectric layer to be selectively opened to expose the first and second contacts and the carrier. A first conducting element is connected to the first contact, a second conducting element is connected to the second contact, and a third conducting element is connected to the carrier. | 02-25-2010 |
20100078782 | COATING COMPOSITION AND A METHOD OF COATING - A coating composition including a compound having a first molecular group or a first combination of atoms, the first molecular group or the first combination of atoms capable of bonding to an oxidizable metal or a metal oxide, and a second molecular group or a second combination of atoms, the second molecular group or the second combination of atoms capable of interacting with a precursor of a polymer so the compound and the polymer are bound together. | 04-01-2010 |
20100102422 | SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes depositing a mask of low melting point material on a surface of the semiconductor device; depositing a layer to be structured relative to the mask; and removing the mask of low melting point material. | 04-29-2010 |
20100129552 | LOW VISCOSITY POLYMERIC PRINTING SOLUTIONS AND ELECTRONIC COMPONENTS BEARING POLYIMIDE BASED UPON THE LOW VISCOSITY POLYMERIC PRINTING SOLUTIONS - An electrical component that includes a substrate and a polymeric layer oriented in working relation with the substrate, the polymeric layer including a low molecular mass polyimide. | 05-27-2010 |
20100148381 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One aspect provides a semiconductor device that includes a semiconductor chip including a first face and a second face opposite the first face, an encapsulant including inorganic particles encapsulating the semiconductor chip, a first metal layer attached to the first face of the semiconductor chip, a second metal layer attached the second face of the semiconductor chip, and electrically conducting material configured to connect the first metal layer with the second metal layer. | 06-17-2010 |
20100200978 | SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes placing a chip on a carrier, and applying an electrically conducting layer to the chip and the carrier. The method additionally includes converting the electrically conducting layer into an electrically insulating layer. | 08-12-2010 |
20100210071 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device. The method includes providing a metal carrier, attaching chips to the carrier, and applying a metal layer over the chips and the metal carrier to electrically couple the chips to the metal carrier. The metal carrier is segmented, after applying the metal layer, to obtain metal contact elements. | 08-19-2010 |
20100248475 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is disclosed. In one embodiment, the method includes providing at least one semiconductor chip including an electrically conductive layer. A voltage is applied to an electrode. The electrode is moved over the electrically conductive layer for growing a metal layer onto the electrically conductive layer. | 09-30-2010 |
20110003440 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device or a substrate is described. The method includes providing a chip attached to a carrier or providing a substrate. A foil is held over the chip and the carrier or the substrate. A laser beam is directed onto the foil, and substance at the foil is ablated and deposited on the chip and the carrier or on the substrate. | 01-06-2011 |
20110031602 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - The method comprises providing multiple chips attached to a first carrier, stretching the first carrier so that the distance between adjacent ones of the multiple chips is increased, and applying a laminate to the multiple chips and the stretched first carrier to form a first workpiece embedding the multiple chips, the first workpiece having a first main face facing the first carrier and a second main face opposite to the first main face. | 02-10-2011 |
20120068364 | Device and Method for Manufacturing a Device - A device includes a semiconductor material having a first surface. A first material is applied to the first surface and a fiber material is embedded in the first material. | 03-22-2012 |
20120074553 | METHOD AND SYSTEM FOR IMPROVING RELIABILITY OF A SEMICONDUCTOR DEVICE - A method and a system for improving reliability of a semiconductor device are provided. In one embodiment, a semiconductor device is provided comprising a semiconductor chip, a metallization layer comprising a metallic material disposed over a surface of the semiconductor chip, and an alloy layer comprising the metallic material disposed over the metallization layer. | 03-29-2012 |
20120074568 | METHOD AND SYSTEM FOR MINIMIZING CARRIER STRESS OF A SEMICONDUCTOR DEVICE - A method and a system for minimizing carrier stress of a semiconductor device are provided. In one embodiment, a semiconductor device is provided comprising a carrier comprising a mesh coated with a metallic material, and a semiconductor chip disposed over the carrier. | 03-29-2012 |
20120267784 | Semiconductor Device and Bonding Wire - A semiconductor device includes a semiconductor chip, a contact pad of the semiconductor chip and a first layer arranged over the contact pad. The first layer includes niobium, tantalum or an alloy including niobium and tantalum. | 10-25-2012 |
20120313230 | SOLDER ALLOYS AND ARRANGEMENTS - A solder alloy is providing, the solder alloy including zinc, aluminum, magnesium and gallium, wherein the aluminum constitutes by weight 8% to 20% of the alloy, the magnesium constitutes by weight 0.5% to 20% of the alloy and the gallium constitutes by weight 0.5% to 20% of the alloy, the rest of the alloy including zinc. | 12-13-2012 |
20120327614 | METHOD FOR ATTACHING A METAL SURFACE TO A CARRIER, A METHOD FOR ATTACHING A CHIP TO A CHIP CARRIER, A CHIP-PACKAGING MODULE AND A PACKAGING MODULE - A method for attaching a metal surface to a carrier is provided, the method including: forming a first polymer layer over the metal surface; forming a second polymer layer over a surface of the carrier; and bringing the first polymer layer into physical contact with the second polymer layer such that at least one of an interpenetrating polymer structure and an inter-diffusing polymer structure is formed between the first polymer layer and the second polymer layer. | 12-27-2012 |
20130001803 | METHOD FOR ATTACHING A METAL SURFACE TO A CARRIER, A METHOD FOR ATTACHING A CHIP TO A CHIP CARRIER, A CHIP-PACKAGING MODULE AND A PACKAGING MODULE - A method for attaching a metal surface to a carrier is provided, the method including: depositing a porous layer over at least one of a metal surface and a side of a carrier; and attaching the at least one of a metal surface and a side of a carrier to the porous layer by bringing a material into pores of the porous layer, resulting in the material forming an interconnection between the metal surface and the carrier. | 01-03-2013 |
20130021766 | Electronic Component - An electronic component includes an electrically conductive carrier. The electrically conductive carrier includes a carrier surface and a semiconductor chip includes a chip surface. One or both of the carrier surface and the chip surface include a non-planar structure. The chip is attached to the carrier with the chip surface facing towards the carrier surface so that a gap is provided between the chip surface and the carrier surface due to the non-planar structure of one or both of the carrier surface and the first chip surface. The electronic component further includes a first galvanically deposited metallic layer situated in the gap. | 01-24-2013 |
20130063916 | Protection for Circuit Boards - A system has a circuit board, an integrated circuit being mounted on the circuit board by external contacts, and a cover irreversibly connected to the circuit board. The cover covers the external contacts so that external access to the external contacts is prohibited by the cover. | 03-14-2013 |
20130113114 | Device Including Two Power Semiconductor Chips and Manufacturing Thereof - A device includes a first power semiconductor chip having a first face and a second face opposite to the first face with a first contact pad arranged on the first face. The first contact pad is an external contact pad. The device further includes a first contact clip attached to the second face of the first power semiconductor chip. A second power semiconductor chip is attached to the first contact clip, and a second contact clip is attached to the second power semiconductor chip. | 05-09-2013 |
20130134589 | CHIP-PACKAGE AND A METHOD FOR FORMING A CHIP-PACKAGE - A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier. | 05-30-2013 |
20130152696 | MICROMECHANICAL SEMICONDUCTOR SENSING DEVICE - Micromechanical semiconductor sensing device comprises a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, said piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal. | 06-20-2013 |
20130277813 | CHIP PACKAGE AND METHOD OF FORMING THE SAME - Embodiments provide a method of forming a chip package. The method may include attaching at least one chip on a carrier, the chip including a plurality of chip pads on a surface of the chip opposite to the carrier; depositing a first adhesion layer on the carrier and on the chip pads of the chip, the first adhesion layer including tin or indium; depositing a second adhesion layer on the first adhesion layer, the second adhesion layer including a silane organic material; and depositing a lamination layer or an encapsulation layer on the second adhesion layer and the chip. | 10-24-2013 |
20130277824 | Manufacturing Method for Semiconductor Device and Semiconductor Device - In a method of manufacturing a semiconductor device, a first semiconductor element is mounted on a carrier. A b-stage curable polymer is deposited on the carrier. A second semiconductor element is affixed on the polymer. | 10-24-2013 |
20130328213 | ELECTRONIC DEVICE INCLUDING A CARRIER AND A SEMICONDUCTOR CHIP ATTACHED TO THE CARRIER AND MANUFACTURING THEREOF - One aspect is a device including a carrier comprising a first conducting layer, a first insulating layer over the first conducting layer, and at least one first through-connection from a first face of the first insulating layer to a second face of the first insulating layer. A semiconductor chip is attached to the carrier and a second insulating layer is over the carrier and the semiconductor chip. A metal layer is over the second insulating layer. A second through-connection is through the second insulating layer electrically coupling the semiconductor chip to the metal layer. A third through-connection is through the second insulating layer electrically coupling the carrier to the metal layer. | 12-12-2013 |
20140001634 | CHIP PACKAGE AND METHODS FOR MANUFACTURING A CHIP PACKAGE | 01-02-2014 |
20140076613 | Method of Electrophoretic Depositing (EPD) a Film on a System and System Thereof - A packaged component and a method for making a packaged component are disclosed. In an embodiment the packaged component includes a component carrier having a component carrier contact and a component disposed on the component carrier, the component having a component contact. The packaged component further includes a conductive connection element connecting the component carrier contact with the component contact, an insulating film disposed directly at least on one of a top surface of the component or the conductive connection element, and an encapsulant encapsulating the component carrier, the component and the enclosed conductive connection elements. | 03-20-2014 |
20140197527 | CHIP ARRANGEMENT AND A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT - A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the carrier; and a second chip disposed over the ceramic layer; wherein the ceramic layer has a porosity in the range from about 3% to about 70%. | 07-17-2014 |
20140197552 | CHIP ARRANGEMENT, A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT, INTEGRATED CIRCUITS AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT - A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material. | 07-17-2014 |