| Patent application number | Description | Published |
|---|
| 20080218388 | ENCODING METHOD, ENCODING APPARATUS, DECODING METHOD, AND DECODING APPARATUS - An encoding method is disclosed for use with an encoding apparatus for carrying out variable-length conversion encoding involving a look-ahead operation of at least either one information word or one code word upon encoding. The encoding method includes the step of performing conversion encoding in such a manner as to permit decoding of encoded words in units of a code word. | 09-11-2008 |
| 20080250295 | ENCODING METHOD, ENCODING APPARATUS, AND PROGRAM - An encoding method encodes by using a quasi-cyclic code having a code length of n=m n | 10-09-2008 |
| 20080270868 | DECODING APPARATUS - In the present application, there is provided a decoding apparatus for decoding low density parity check codes, including: a plurality of storage sections configured to store logarithmic likelihood ratios or logarithmic posteriori probability ratios for one codeword into addresses thereof which are independent of each other thereamong; and a readout section configured to simultaneously read out, from among the logarithmic likelihood ratios or logarithmic posteriori probability ratios for the one codeword stored in the storage sections, a plurality of ones of the logarithmic likelihood ratios or logarithmic posteriori probability ratios which correspond to non-zero value elements in a predetermined one row of the check matrix used in a coding process of the low density parity check codes. | 10-30-2008 |
| 20080320370 | CRC generator polynomial select method, CRC coding method and CRC coding circuit - Disclosed herein is a CRC generator polynomial select method for selecting a generator polynomial to be used in CRC coding processing and/or CRC processing of inspecting a CRC processing result, the CRC generator polynomial select method may include a first process of finding largest minimum Hamming distances Max.d | 12-25-2008 |
| 20090015446 | Coder and a Method of Coding For Codes With a Parity-Complementary Word Assignment Having a Constraint of D1=,R=2 - Presently known d=1 codes have long trains consisting of consecutive 2T runs and an overall high frequency of occurrence of the shortest 2T runs that reduce the performance of the bit detector By using a code with an MTR constraint of 2 an improvement in the bit detection is achieved. A code constructed in a systematic way that provides an MTR constraint of 2 is presented. A variation of such a code is disclosed where one sub-code is used, where coding states are divided into coding classes and where code words are divided into code word types. Then, for a given sub-code, an code word of type t can be concatenated with an code word of the next sub-code if said subsequent code word of said next sub-code belongs to one of coding states of the coding class with index T | 01-15-2009 |
| 20090300462 | Coding Apparatus, Coding Method and Coding Program - Disclosed herein is an encoding apparatus which combines an RLL code word and an error correction code word, with an interleaving technique when encoding, including: an error correction encoding section; an interleaving section; and an RLL encoding section, wherein, if an address i (i is an integer satisfying relations 0≦i| 12-03-2009 | |
| 20100031124 | Transmission apparatus and method, reception apparatus and method, and program - A transmission apparatus includes: a CRC encoding processing unit configured to include a plurality of generating polynomials for an CRC encoding processing with each of a plurality of data of which the code lengths differ as a target, and employ the optimal generating polynomial out of the plurality of generating polynomials to perform the CRC encoding processing; and a transmission unit configured to transmit data obtained by the CRC encoding processing unit performing the CRC encoding processing. | 02-04-2010 |
| 20100153823 | CODING METHOD AND CODING DEVICE - The present invention relates to coding method and coding device that allow Rate-Compatible LDPC (low-density parity-check) codes to have favorable BER performance both with a low code rate and with a high code rate. In coding of LDPC codes that have plural code rates and whose all parity check matrices are composed of plural cyclic matrices, a coder | 06-17-2010 |
| 20100229076 | Decoding Apparatus and Decoding Method - Disclosed herein is a decoding apparatus including: with N and x each being a positive integer and k being a positive integer being equal to or greater than 1, a shift register of k stages configured to accumulate path select information for k inputs that is information about a survivor path of xN bits made up of radix-2 | 09-09-2010 |
| 20110029838 | Device and Method for Transmission, Device and Method for Reception, and Program - The present invention relates to a device and a method for transmission, a device and a method for reception, and a program that make it possible to obtain an undetected error probability characteristic close to a limit value in a system using a CRC for a plurality of pieces of data having different code lengths. A generator polynomial for header data which generator polynomial is used when a CRC coding process is performed on header data and a generator polynomial for sub-header data which generator polynomial is used when the CRC coding process is performed on sub-header data are set in a transmitting device | 02-03-2011 |
| 20110115655 | CODING METHOD, CODING APPARATUS, DECODING METHOD, AND DECODING APPARATUS - Disclosed herein is a coding method including the step of: coding an information sequence in such a manner that upon performing error correction coding after carrying out RLL coding of the information sequence, the maximum number of consecutive 1-bits or 0-bits is α−β or less in an RLL code word over a range from bit p−α to bit p+α−1 of the RLL code word and that a β-bit error correcting code parity sequence is inserted between bit p−1 and bit p of the RLL code word, where α is a number larger than 1 representing the maximum number of consecutive 0-bits or 1-bits in an n-bit RLL code word and where p is a natural number. | 05-19-2011 |
