Patent application number | Description | Published |
20080204904 | OPTICAL ELEMENT HOLDING APPARATUS - A holding apparatus configured to hold an optical element includes a supporting member configured to support the optical element, a cylindrical member configured to support the supporting member, a plurality of sensors configured to detect a position of the optical element and the supporting member, and a drive unit configured to drive the supporting member based on outputs from the plurality of sensors. The supporting member includes a plurality of projection portions that contact the optical element. A direction of each vertex of a polygon formed by connecting the plurality of projection portions with a straight line substantially coincides with a direction of each vertex of a polygon formed by connecting the plurality of sensors with a straight line. | 08-28-2008 |
20080204905 | DRIVING MECHANISM AND OPTICAL ELEMENT DRIVING APPARATUS - An optical-element driving mechanism is configured to drive an optical element, and includes a uniaxial driving mechanism that includes a linear actuator that drives in a first direction, and a link mechanism that converts a displacement in a direction orthogonal to the first direction. The linear actuator is level with the link mechanism in an optical-axis direction. The uniaxial driving mechanism is arranged in order of the link mechanism and the linear actuator in a radial direction when viewed form an optical axis of the optical element. | 08-28-2008 |
20090021847 | OPTICAL ELEMENT POSITIONING APPARATUS, PROJECTION OPTICAL SYSTEM AND EXPOSURE APPARATUS - The apparatus includes a holder holding an optical element, a back plate supporting the optical element via the holder, a mechanism moving the optical element in a six-degree-of-freedom, a base plate supporting the back plate via the mechanism, and six displacement sensors disposed on the base plate and measuring displacement amounts of different points on the optical element. The displacement sensors includes three ones measuring them in a first direction, one measuring it in a second direction, and two ones measuring them in a third direction. The apparatus further includes a transformation processor transforming the six measured displacement amounts into displacement amounts of the optical element in the six-degree-of-freedom, a calibration processor calibrating the transformed displacement amounts, and a controller outputting command values to the displacing mechanism based on differences between the calibrated displacement amounts and target displacement amounts of the optical element. | 01-22-2009 |
20090040632 | Driving System and Optical-Element Driving System - A driving system for driving an optical element in a first direction includes a linear actuator for producing a displacement in a second direction perpendicular to the first direction, a displacement picking unit being extendable in a third direction, perpendicular to both of the first and second directions, for picking out a displacement of the linear actuator, and a direction converting unit disposed at the third-direction side of the linear actuator, for converting a direction of the displacement picked out by the displacement picking unit. | 02-12-2009 |
20090128831 | OPTICAL ELEMENT POSITIONING APPARATUS - An optical element positioning apparatus of the present invention includes a moving unit including an optical element | 05-21-2009 |
20090244505 | POSITIONING UNIT OF OPTICAL ELEMENT, OPTICAL SYSTEM, EXPOSURE APPARATUS, ADJUSTMENT METHOD OF OPTICAL SYSTEM - A positioning unit is configured to position an optical element in a barrel, and includes a holder configured to hold the optical element, a first intermediate plate mounted with the holder, a second intermediate plate configured to support the first intermediate plate, a plurality of drivers each configured to drive the second intermediate plate with respect to a plurality of axes, and each fixed inside of the barrel, and a positioning part configured to position the first intermediate plate relative to the second intermediate plate, wherein the second intermediate plate couples ends of the plurality of drivers with one another. | 10-01-2009 |
20100321803 | Optical Element Positioning Apparatus, Projection Optical System and Exposure Apparatus - An optical element is moved in six-degrees-of-freedom. Three first displacement sensors are disposed on a base plate and measure respective displacement amounts of three mutually different points on the optical element in a first direction. A second displacement sensor measures a displacement amount of one point on the optical element in a second direction. Two third displacement sensors measure respective displacement amounts of two mutually different points on the optical element in a third direction. A transformation processor transforms the six measured displacement amounts A calibration processor calibrates the transformed displacement amounts with a calibration matrix of which coefficients are previously obtained to calibrate the displacement amounts in the six-degrees-of-freedom, which have errors due to measurement errors of the displacement sensors. A controller outputs command values based on differences between the calibrated displacement amounts and target displacement amounts. | 12-23-2010 |
20120313293 | IMPRINT METHOD, IMPRINT APPARATUS, AND ARTICLE MANUFACTURING METHOD - A method of performing an imprint process on each of a plurality of shot regions of a substrate, wherein each shot region includes at least one of at least one valid chip area and at least one invalid chip area, the invalid chip area including an inhibited area in which resin coating is inhibited, the imprint process for a shot region including both the invalid chip area and the valid chip area includes coating the valid chip area of the shot region with the resin, bringing a pattern surface of a mold into contact with the resin, and curing the resin, and in the step of coating, at least the inhibited area of the invalid chip area is not coated with the resin. | 12-13-2012 |
20140312532 | IMPRINT APPARATUS AND ARTICLE MANUFACTURING METHOD - Provided is an imprint apparatus that imprints a pattern formed on a mold onto a substrate. The imprint apparatus includes a substrate holder that holds the substrate and can move in a direction along the surface of the substrate; a gas supply unit for supplying a gas into a space between a pattern part of the mold and the substrate; and a wall part that is disposed so as to enclose the space that is supplied with gas, wherein at a position opposed to the substrate and the mold, the wall part faces the substrate holder or the substrate with a gap therebetween. | 10-23-2014 |
Patent application number | Description | Published |
20090129173 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - The semiconductor integrated circuit device includes: a first latch which can hold an output signal of the X decoder and transfer the signal to the word driver in a post stage subsequent to the X decoder; a second latch which can hold an output signal of the Y decoder and transfer the signal to the column multiplexer in the post stage subsequent to the Y decoder; and a third latch which can hold an output signal of the sense amplifier and transfer the signal to the output buffer in the post stage subsequent to the sense amplifier. The structure makes it possible to pipeline-control a series of processes for reading data stored in the non-volatile semiconductor memory, and enables low-latency access even with access requests from CPUs conflicting. | 05-21-2009 |
20100080058 | SEMICONDUCTOR DEVICE - The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information. Thus, retention performance of an electrically rewritable nonvolatile memory cell is improved. | 04-01-2010 |
20100202205 | SEMICONDUCTOR DEVICE - The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten. | 08-12-2010 |
20100232232 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - This invention is to reduce the number of memory gate drivers, while lessening the number of times of disturb occurrence in a memory array configuration that implements writing in small byte units. A memory array comprises a plurality of sub-arrays, MG transfers, SL drivers, and CG drivers. Each sub-array includes a plurality of memory gate lines, control gate lines, source lines, and bit lines. Memory cells are arranged in positions of intersections of these lines. The control gate lines, CG drivers, source lines, and SL drivers are common to the sub-arrays, whereas the memory gate lines and MG buffer circuits are provided for each sub-array. Thereby, the units in which data is written are decreased and adverse effects of disturb are reduced without increasing the circuit size of the memory array. | 09-16-2010 |
20110208904 | SEMICONDUCTOR DEVICE - The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information. Thus, retention performance of an electrically rewritable nonvolatile memory cell is improved. | 08-25-2011 |
Patent application number | Description | Published |
20090140342 | SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME, A METHOD OF MANUFACTURING A VERTICAL MISFET AND A VERTICAL MISFET, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE - Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film. | 06-04-2009 |
20100136778 | Semiconductor Memory Device and a Method of Manufacturing the Same, A Method of Manufacturing a Vertical MISFET and a Vertical MISFET, and a Method of Manufacturing a Semiconductor Device and a Semiconductor Device - Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film. | 06-03-2010 |
20110230041 | SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME, A METHOD OF MANUFACTURING A VERTICAL MISFET AND A VERTICAL MISFET, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE - Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film. | 09-22-2011 |