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Mackey, NY
Christopher D. Mackey, Spencerport, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090060194 | ADAPTABLE MICROCONTROLLER BASED SECURITY MONITOR - A method is provided for protecting embedded cryptographic processing circuits ( | 03-05-2009 |
| 20090113201 | SCALEABLE ARCHITECTURE TO SUPPORT HIGH ASSURANCE INTERNET PROTOCOL ENCRYPTION (HAIPE) - A scalable internet protocol (IP) encryption system includes a cryptographic unit that processes sensitive data for packet encryption/decryption and data authentication. A first processing unit with an optional IP Layer hardware accelerator includes a data processing subsystem that processes sensitive data and forwards the data to the cryptographic unit for encryption and data authentication. A management subsystem is operative with the cryptographic unit for configuring IP networking functions and distributing network configuration information to the data processing subsystem through the cryptographic unit. Data processing is separated from management and control functions at the data processing and management subsystems. A second processing unit with an optional IP Layer hardware accelerator receives the encrypted data from the cryptographic unit and processes the encrypted data for IP packet routing, fragmentation and reassembly and receives network configuration information from the management subsystem via the cryptographic unit. | 04-30-2009 |
| 20090246985 | PASS-THROUGH ADAPTER WITH CRYPTO IGNITION KEY (CIK) FUNCTIONALITY - A pass-through adapter includes an adapter body having at least two connector pin interfaces, with one configured for coupling to an external device such as a communications device. Each connector pin interface includes a plurality of connector pins, including a plurality of pass-through connector pins operative with each other for in-line, pass-through signaling when the pass-through adapter is coupled to the external device. A crypto ignition key (CIK) circuit is contained within the adapter body and connected to at least one of the connector pins to provide a secure mode of operation for the external device. | 10-01-2009 |
| 20090279438 | SCALABLE PACKET ANALYZER AND RELATED METHOD - A scalable packet analyzer receives data packets from a data packet source for packet analysis and includes a plurality of policy engine arrays, each having a plurality of packet analysis microengines. A policy algorithm loader module is operative with each packet analysis microengine for loading a policy algorithm to each packet analysis microengine such that each packet analysis microengine analyzes specific sections of the data packet in parallel within each policy engine array based on the applied policy algorithm to obtain data about the data packet for further data packet processing. | 11-12-2009 |
Christopher David Mackey, Spencerport, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20100278331 | SECURE HASHING DEVICE USING MULTIPLE DIFFERENT SHA VARIANTS AND RELATED METHODS - A monolithic integrated circuit (IC) secure hashing device may include a memory, and a processor integrated with the memory. The processor may be configured to receive a message, and to process the message using a given secure hash algorithm (SHA) variant from among different SHA variants. The different SHA variants may be based upon corresponding different block sizes of bits. | 11-04-2010 |
| 20100299537 | SECURE PROCESSING DEVICE WITH KEYSTREAM CACHE AND RELATED METHODS - A secure processing device may include an external memory storing encrypted data, and a processor cooperating with the external memory. The processor is configured to generate address requests for the encrypted data in the external memory, cache keystreams based upon an encryption key, and generate decrypted plaintext based upon the cached keystreams and the encrypted data requested from the external memory. For example, the processor may be further configured to predict a future address request, and the future address request may be associated with a cached keystream. | 11-25-2010 |
Kevin Mackey, Wappingers Falls, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090017632 | METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES USING RIE PROCESS - A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency. | 01-15-2009 |
| 20100249976 | METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTERISTICS - A method and system for evaluating a performance of a semiconductor manufacturing tool while manufacturing microelectronic devices are disclosed. At least one report is generated based on executions of at least one statistical test. The report includes at least one heat map having rows that correspond to sensors, columns that correspond to trace data obtained during recipe steps, and cells at the intersection of the rows and the columns. At least one sensor in the tool obtains trace data of a recipe step while manufacturing at least one microelectronic device. A computing device analyzes the obtained trace data to determine a level of operational significance found in the data and assigns a score to the trace data that indicates a level of operational significance. Then, the computing device places the score in a corresponding cell of the heat map. A user uses the cell for evaluating the tool performance. | 09-30-2010 |