| Patent application number | Description | Published |
|---|
| 20100061154 | Non-Volatile Dual Memory Die For Data Storage Devices - OTP Data storage die and device consisting of novel OTP (One-Time-Programming) NVM (Non-Volatile-Memory) die is disclosed. The OTP Data storage device can be used in typical host applications with standard interface protocols and file system. The novel OTP memory is a dual memory with both RAM (random access memory) capability and NAND Flash like interface. These features enable to achieve efficient management capabilities and dense array for the OTP data storage device. | 03-11-2010 |
| 20100077012 | Method For Using An OTP Storage Device - The invention provides a method of managing data updates in DOS-based data storage device having an OTP memory die that comprises a code region having a first memory capacity and a code region access resolution and a data region having a second memory capacity and a data region access resolution. The second memory capacity is larger than the first memory capacity and the code region access resolution is finer than the data region access resolution. The method comprises chronologically writing a log entry in the code region indicating the change in FAT and root directory for each change in user data written in the data region. | 03-25-2010 |
| 20100142275 | CONTINUOUS ADDRESS SPACE IN NON-VOLATILE-MEMORIES (NVM) USING EFFICIENT MANAGEMENT METHODS FOR ARRAY DEFICIENCIES - The invention provides a method of managing bad block in a data storage device having an OTP memory die in order to present a continues address space toward the user, by using some of the OTP memory space for the management and maintaining address replacement table. Fast and efficient programming and reading algorithms are presented. | 06-10-2010 |
| 20100146239 | CONTINUOUS ADDRESS SPACE IN NON-VOLATILE-MEMORIES (NVM) USING EFFICIENT EMBEDDED MANAGEMENT OF ARRAY DEFICIENCIES - The invention provides a method of managing bad block in a data storage device having an OTP memory die in order to present a continues address space toward the user, by using some of the OTP memory space for the management and maintaining address replacement table. Fast and efficient programming and writing algorithms are presented. | 06-10-2010 |
| 20100173464 | Non-volatile memory structure and method of fabrication - A method for creating a non-volatile memory array includes implanting pocket implants in a substrate at least between mask columns of a given width and at least through an ONO layer covering the substrate, generating increased-width polysilicon columns from the mask columns, generating bit lines in the substrate at least between the increased-width polysilicon columns and depositing oxide at least between the polysilicon columns. | 07-08-2010 |
| 20110122688 | Reading array cell with matched reference cell - A method for reading a bit of a memory cell in a non-volatile memory (NVM) cell array, the method comprising providing a memory cell comprising a bit to be read and at least one other bit not to be read, and reading the bit to be read with respect to a multi-bit reference cell, the reference cell comprising a first bit at a first non-ground programmed state and a second bit at a second non-ground programmed state. Compared with the prior art, the present invention may enable achieving an improved sensing accuracy together with improved read disturb immunity. | 05-26-2011 |
