Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Lukes, US
Andrew Lukes, Lone Tree, CO US
| Patent application number | Description | Published |
|---|---|---|
| 20090192889 | SYSTEM AND METHOD FOR PREVENTING UNAUTHORIZED CONTACT OF APPLICANTS - A system and method for preventing unauthorized use of sales leads. Application information is gathered from an applicant after the applicant views an Internet ad or other advertisement. The application information may include the applicant's e-mail address and phone number. At least one pseudo e-mail address or phone number is then created that identifies at least some of the application information and a potential purchaser of the application information. A unique pseudo e-mail address or phone number is created for each potential purchaser of the application information. The pseudo e-mail addresses or phone numbers and at least some of the application information are then provided to potential purchasers of the application information. Any communications sent using the pseudo e-mail addresses or phone numbers are initially directed to a mail server or phone system operated by or under the control of the entity that placed the advertisement. If a potential purchaser attempts to contact an applicant with the pseudo e-mail address or phone number without first paying for the application information, the e-mail or phone call is sent to the entity which generated the lead, not the applicant. Once a potential purchaser purchases the application information, communications made by the potential purchaser using the pseudo e-mail address are forwarded to the applicant's actual e-mail address. | 07-30-2009 |
Andrew Kenneth Lukes, Escondido, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090276706 | Method for automating troubleshooting flowcharts - A troubleshooting flowchart is automated by taking relevant information from the flowchart and entering it into a control file or database. A graphical user development tool is provided so a flowchart can be automated by someone not skilled in programming. Whenever possible the troubleshooting device queries the device under test, reads the response and determines the next troubleshooting step based on the response. If the troubleshooting step requires the user to provide an answer, the troubleshooting device displays a question, and a means to input the answer. Objects such as text, audio, video or other files are displayed to make the meaning of the question clearer. Also a troubleshooting step could be a procedure that the user needs to perform. Best troubleshooting practices can be implemented by unskilled users using this troubleshooting device. | 11-05-2009 |
Brandi Lukes, Catawba, WI US
| Patent application number | Description | Published |
|---|---|---|
| 20110291062 | SELF HELP LADDER AND SECURING DEVICE - An apparatus and method for one person to safely and easily deploy a tree stand or stand to a pole or a tree. | 12-01-2011 |
Eric J. Lukes, Stewartville, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20090045840 | Method for Radiation Tolerance by Logic Book Folding - A logic book for a programmable device such as an application-specific integrated circuit (ASIC) achieves improved radiation tolerance by providing transistors of the same doping type in different well regions that are physically isolated by intervening well regions with complementary doping. For example, n-type field effect transistors (NFETs) may be located in two outer rows of the book with separate Pwell regions, while p-type transistors are located in two inner rows of the book sharing a common Nwell region. Since the NFETs in separate wells are physically isolated from each other, a circuit structure which uses two NFETs in the two outer rows is much less likely to suffer multiple upsets from a single radiation strike. More complicated embodiments of the present invention include additional transistor rows in the stack with isolated Nwells and Pwells. | 02-19-2009 |
| 20090045841 | Method for Radiation Tolerance by Implant Well Notching - A logic book for a programmable device such as an application-specific integrated circuit (ASIC) achieves improved radiation tolerance by providing notches in an implant well between adjacent transistors and fills the notches with complementary well regions that act as a barrier to charge migration. For example, a row of n-type field effect transistors (NFETs) is located in a Pwell region, while a row of p-type transistors is located in an Nwell region with portions of the Nwell region extending between the NFETs. More complicated embodiments of the present invention include embedded well islands to provide barriers for adjacent transistors in both rows of the book. | 02-19-2009 |
Eric John Lukes, Stewartville, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20080266925 | Array Split Across Three-Dimensional Interconnected Chips - A design structure including a semiconductor storage array having a first array portion on a first plane of circuitry and a second array portion on a second plane of circuitry. A composite bit line and/or a composite word line is divided and arranged to have a first portion on the first array portion and a second portion on the second array portion. The two portions of the composite word line or the composite bit line are on different planes of circuitry, and three-dimensional interconnections connect proximal ends of the word line portions, or proximal ends of the bit line portions. A word line driver drives the word line portions in parallel. A bit line driver drives the bit line portions in parallel. Signal propagation times down the composite word or bit lines are significantly less than signal propagation times down corresponding undivided word or bit lines. | 10-30-2008 |
| 20080301503 | HIGH FREQUENCY DIVIDER STATE CORRECTION CIRCUIT - The present invention provides for a self-correcting state circuit. A first flip flop is configured to receive a clock input and a first data input, and to generate a first output in response to the clock input and the first data input. A second flip flop is coupled to the first flip flop and configured to receive the clock input and to receive the first output as a second data input, and to generate a second output in response to the clock input and the first output. A first correction circuit is coupled to the second flip flop and configured to generate a corrected output. A third flip flop is coupled to the first correction circuit and configured to receive the clock input and to receive the corrected output as a third data input, and to generate a third output in response to the clock input and the third data input. | 12-04-2008 |
Matthew R. Lukes, Independence, KY US
| Patent application number | Description | Published |
|---|---|---|
| 20080223690 | FLAT TRAY CARTONER - Trays are indexed at predetermined pitch on a tray conveyor. As the trays are conveyed, a turning guide engages a leading tray portion, turning the tray and urging it transversely downward and/or into buckets on an adjacent bucket conveyor or cartons on an adjacent carton conveyor. A cam is disposed rearward of each tray on the tray conveyors and the turning trays pivot about that cam. A hold-down prevents trays climbing over the turning guide. Pressure relief and tray indexing are provided upstream of the tray conveyor. Apparatus and methods are disclosed. | 09-18-2008 |
| 20090097953 | DEVICE FOR MOVING PACKAGES AND METHODS OF USING THE SAME - A device for operating on a package includes a housing having a portion adapted to be coupled to the package, and a fan coupled to the housing for generating a vacuum within the housing to selectively retain or release the package relative to the housing. A method of operating on the package includes decreasing a distance between the housing and the package, actuating the fan coupled to the housing to generate a vacuum therein, retaining the package relative to the housing using the vacuum generated by the fan, and releasing the vacuum in the housing to release the package relative to the housing. | 04-16-2009 |
Richard Lukes, Decorah, IA US
| Patent application number | Description | Published |
|---|---|---|
| 20100275544 | COMPOSITE JOIST FLOOR SYSTEM - The composite joist floor system includes joists supporting metal decking and a stand-off fasteners are spaced along the length of the joist Each fastener has an upper portion with a a through hardness between HRB 70 and HRC 40 and a lower portion having a threaded portion with a through hardness of between HRB 70 and HRC 40 and a thread-forming portion adjacent the threaded portion with at least a HRC 50 hardness and failure torque to thread-forming torque of at least 3.0 and a drive torque at least 20% less than a thread-forming torque, and a fluted lead portion adjacent the thread-forming portion with a nominal diameter between 70 and 95% of major diameter of the threaded portion adapted to form a fastener opening. These stand-off fasteners extend into and are encapsulated by a cementitious slab supported by the metal decking to form a composite floor system. | 11-04-2010 |
| 20110203217 | Weldless Building Structures - A building structure including a first building member and a second building member may be connected by a plurality of fasteners, each fastener having a head, a threaded portion having a through hardness of between HRB 70 and HRC 40, a thread-forming portion of at least HRC 50 hardness enabling the fastener to form threads in at least the second steel building member, and a fluted lead portion of at least HRC 50 hardness with a nominal diameter between 70 and 95% of major diameter, such that the fastener is capable of providing a ratio of strip torque to thread-forming torque of at least 3.0 and a ratio of strip torque to drive torque greater than 6.0 when the second steel building member having a thickness of 0.25 inch and the fluted lead portion having at least one diameter within nominal diameter between 80 and 98% of major diameter. | 08-25-2011 |
Richard J. Lukes, Denver, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20090125373 | DATA VALIDATION WITHIN MATERIALS REQUIREMENTS PLANNING - A method and system for validating data and providing on-time updates within a multi-enterprise material requirements planning environment. A method of validating materials requirements planning (MRP) results includes determining when a current aggregate demand of a part number is greater than or less than a previous aggregate demand of the part number by a first predetermined tolerance. The method also includes identifying at least one driver of the part number in which a current demand is greater than or less than a previous demand by a second predetermined tolerance. Additionally, the method includes generating a report comprising the at least one driver, the current demand, and the previous demand. | 05-14-2009 |
| 20090307026 | PRIORITY-BASED SYSTEM FOR NETTING AVAILABLE COVERAGE - A method is disclosed in one embodiment of the invention as including receiving standard MRP input data, including supply rules. Demand priority data may also be received to provide a business ranking of the independent demands. The MRP input data and demand priority data may be transformed into a format usable by an implosion engine and a pegging solver. Such transformation may include providing artificial MRP input data for each of the components. The transformed MRP input data may be processed with the implosion engine and the pegging solver to provide pegged implosion data. A pegged supply shortfall for a component may then be calculated based on the pegged implosion data. Specifically, consumption of an artificial component may represent a supply shortfall for the component. The demand priority data for the independent demand that pegs to the supply shortfall may provide the prioritized shortfall for that component. | 12-10-2009 |