| Patent application number | Description | Published |
|---|
| 20090289333 | Annealing a Buffer Layer for Fabricating Electronic Devices on Compliant Substrates - A method of forming a thin-film layered electronic device over a flexible substrate comprises the steps of depositing a buffer layer over the flexible substrate, heating the substrate and buffer layer stack to a temperature at which plastic deformation of the buffer layer takes place, cooling the stack, then forming the thin-film electronic device over the plastically deformed buffer layer without further plastic deformation of the buffer layer. The heating and cooling to cause plastic deformation of the buffer layer is referred to as annealing. The thin-film electronic device is formed by a process according to which all steps are performed at a temperature below that at which further plastic deformation of the buffer layer occurs. In-process strain and runout are reduced, improving device yield on flexible substrates. An optional metal base layer may be formed over the buffer layer prior annealing. | 11-26-2009 |
| 20090294767 | Isolated Sensor Structures Such As For Flexible Substrates - A photosensor structure includes a pixel metal layer disposed in physical and electrical contact with a pixel thin film transistor and a lower sensor layer of a p-i-n photosensor. The pixel metal layer extends laterally to an extent less that the lower sensor layer such that an overhang region is defined below the lower sensor layer and the adjacent the lateral edge of the pixel metal layer. When the relatively thick intrinsic sensor layer is formed over the lower sensor layer, it attaches to the upper surface and, due to the presence of the overhang region, the lateral edge of the lower sensor layer, forming a discrete intrinsic sensor layer structure over the pixel which is physically isolated from adjacent corresponding structures. This isolation allows for thermal expansion and contraction during formation of the intrinsic sensor layer without cracking the intrinsic sensor layer structure. | 12-03-2009 |
| 20090294768 | SELF-ALIGNED THIN-FILM TRANSISTOR AND METHOD OF FORMING SAME - A method of manufacturing a thin-film transistor or like structure provides conductive “tails” below an overhang region formed by a top gate structure. The tails increase in thickness as they extend outward from a point under the overhang to the source and drain contacts. The tails provide a low resistance conduction path between the source and drain regions and the channel, with low parasitic capacitance. The thickness profile of the tails is controlled by the deposition of material over and on the lateral side surfaces of the gate structure. | 12-03-2009 |
| 20090298240 | SELF-ALIGNED THIN-FILM TRANSISTOR AND METHOD OF FORMING SAME - A method of manufacturing a thin-film transistor or like structure provides conductive “tails” below an overhang region formed by a top gate structure. The tails increase in thickness as they extend outward from a point under the overhang to the source and drain contacts. The tails provide a low resistance conduction path between the source and drain regions and the channel, with low parasitic capacitance. The thickness profile of the tails is controlled by the deposition of material over and on the lateral side surfaces of the gate structure. | 12-03-2009 |
| Patent application number | Description | Published |
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| 20090159940 | STRUCTURE AND METHOD FOR FLEXIBLE SENSOR ARRAY - A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array. | 06-25-2009 |
| 20100181604 | STRUCTURE AND METHOD FOR FLEXIBLE SENSOR ARRAY - A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array. | 07-22-2010 |
| 20100252927 | Pattern-Print Thin-Film Transistors with Top Gate Geometry - A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode. | 10-07-2010 |
