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Lu, Hsinchu City
Charng-Shing Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110091732 | POLYAMIC ACID RESIN COMPOSITION AND POLYIMIDE FILM PREPARED THEREFROM - A polyamic acid resin composition, and a polyimide film and laminate prepared therefrom are provided. The polyamic acid resin composition includes a polyamic acid resin, a solvent, and a polar aprotic solution containing nanoscale silica, with surface hydroxyl groups, modified by a surface modification agent. Particularly, the surface modification agent has a structure represented by formula (I): | 04-21-2011 |
| 20120156459 | POLYIMIDE FILM LAMINATE AND METAL LAMINATE EMPLOYING THE SAME - The disclosure provides a polyimide film laminate and a metal clad laminate employing the same. The polyimide film laminate includes a first polyimide film, a second polyimide film disposed on the first polyimide film, and a third polyimide film disposed on the second polyimide film. Particularly, the first polyimide film has a thermal conductivity of between about 0.2-0.9 watts/m·K and a breakdown voltage greater than about 3KV, the second polyimide film has a thermal conductivity of more than about 1 watts/m·K, and the third polyimide film has a thermal conductivity of between about 0.2-0.9 watts/m·K and a breakdown voltage greater than about 3KV. | 06-21-2012 |
Cheng-Chuan Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080272303 | MOBILE FUEL ANALYSIS APPARATUS AND METHOD THEREOF - The invention provides a method for determining fuel quality and ethanol content. A mobile fuel analysis apparatus including a vehicle is provided. A database includes near-infrared spectra of standard fuel from a plurality of suppliers to establish correlation between quality parameter and the spectra of the oils. A near-infrared spectrometer is equipped on the vehicle and transported to a fuel distribution point. A near-infrared spectrum of a fuel sample is collected from the fuel distribution point. The collected spectrum is compared to the near-infrared spectra in the database, and converted into corresponding quality parameters. | 11-06-2008 |
Chia-Ching Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090292876 | In-System Programming to Switch Memory Access from One Area to Another in Memory Cards - In-system programming to switch memory access from one area to another in memory cards is disclosed. A command to access a first area of a memory card is received. Access is switched from the first area of the memory card to a second area of the memory card if specified data follows the received command allowing for the memory access switch. | 11-26-2009 |
Chia Han Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110004741 | Spilling Method in Register Files for Microprocessor - A spilling method in register files for a processor is proposed. The processor is of Parallel Architecture Core (PAC) structure, and accordingly includes a first cluster, a second cluster and a memory. Each of the first and second clusters includes a first function unit (e.g., M-Unit), a second function unit (e.g., I-Unit), a first local register file, a second local register file and a global register file. The first and second local register files are used by the first and second function units, respectively. For a specified live range, the method includes the steps of calculating communication costs of the first local register file, the second local register file and the global register file in each of the first and second clusters, and communication cost of the memory for storing the live range when spilling occurs; calculating use ratios of the first local register file, the second local register file and the global register file in each of the first and second clusters, and use ratio of the memory for the live range; and selecting one of the first local register file, the second local register file and the global register file in each of the first and second clusters and the memory for storing the live range based on the communication costs and the use ratios. | 01-06-2011 |
Chia Sheng Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090190588 | Data Packet Switching - Embodiments related to switching of data packets have been described. | 07-30-2009 |
Chi-Chang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080294855 | Memory control system and memory data fetching method - The invention discloses a memory control system and a method to read data from memory. The memory control system comprises a microprocessor, a serial storage device, a first buffer, a second buffer, a memory control unit, and a multiplexer. The memory control system and the method to read data from memory according to the invention utilize the charateristics that the microprocessor reades data from continuous addresses of a serial memory during most of the time. By reading in advance and temporarily storing the data that the microprocessor requests to read, increasing the reading memory speed can be achieved. | 11-27-2008 |
| 20090006779 | Memory control system and memory data fetching method - The invention discloses a memory control system and a method to read data from memory. The memory control system comprises a control unit, a storage device, and a microprocessor. The memory control system and the method to read data from memory according to the invention utilize an unbalanced microprocessor clock signal with different duration length to control the microprocessor so as to increase the speed of reading memory. | 01-01-2009 |
Chih-Chiang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100171094 | LIGHT-EMITTING SEMICONDUCTOR APPARATUS - A light-emitting semiconductor apparatus includes a light-emitting structure, a reflective structure, and a carrier. The light-emitting structure includes a first type semiconductor layer, a second type semiconductor layer, and a light-emitting layer positioned between the first type semiconductor layer and the second type semiconductor layer. The reflective structure has a first transparent conductive layer, a first patterned reflective layer, a second transparent conductive layer, and a second patterned reflective layer. The first patterned reflective layer is disposed between the first transparent conductive layer and the second transparent conductive layer, and has an opening for physically connecting the first transparent conductive layer and the second transparent conductive layer. The second transparent conductive layer is disposed between the first patterned reflective layer and the second patterned reflective layer. The second patterned reflective layer is positioned on an area corresponding to the opening. The light-emitting structure and the carrier are respectively on two sides of the reflective structure. | 07-08-2010 |
| 20100308355 | LIGHT-EMITTING DEVICE HAVING A THINNED STRUCTURE AND THE MANUFACTURING METHOD THEREOF - A semiconductor light-emitting device having a thinned structure comprises a thinned structure formed between a semiconductor light-emitting structure and a carrier. The manufacturing method comprises the steps of forming a semiconductor light-emitting structure above a substrate; attaching the semiconductor light-emitting structure to a support; thinning the substrate to form a thinned structure; forming or attaching a carrier to the thinned substrate; and removing the support. | 12-09-2010 |
| 20110108879 | LIGHT-EMITTING DEVICE - A light-emitting device comprising a semiconductor light-emitting stack, comprising a light emitting area; an electrode formed on the semiconductor light-emitting stack, wherein the electrode comprises a current injected portion and an extension portion; a current blocking structure formed between the current injected portion and the semiconductor light-emitting stack, and formed between a first part of the extension portion and the semiconductor light-emitting stack; and an electrical contact structure formed between a second part of the extension portion and the semiconductor light-emitting stack. | 05-12-2011 |
Chih-Wei Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090314095 | PRESSURE SENSING DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF - A pressure sensing device package including a circuit substrate, a pressure sensing device, a molding compound, and a flexible protection layer is provided. The circuit substrate has an opening. The pressure sensing device is flip chip bonded to the circuit substrate and has a sensing region facing toward the opening. The molding compound encapsulates the pressure sensing device but exposes the sensing region. The flexible protection layer is disposed on the sensing region and exposed by the opening of the circuit substrate. | 12-24-2009 |
| 20100025794 | IMAGE SENSOR CHIP PACKAGE STRUCTURE AND METHOD THEREOF - An image sensor chip package structure includes a transparent substrate, a chip, a sealing ring, a number of conductive posts, and a number of conductive bumps. The transparent substrate has a number of through holes. The through holes pass through the transparent substrate. The chip has an active surface, an image sensitive area, and a number of die pads. The image sensitive area and the die pads are located on the active surface. The sealing ring is disposed between the chip and the transparent substrate and surrounds the image sensitive area and the die pads. The conductive posts are disposed in the through holes, respectively. Here, the chip is electrically connected with the conductive posts via the die pads. The conductive bumps are disposed on the die pads, respectively. The conductive bumps are connected with the conductive posts, respectively. | 02-04-2010 |
| 20100164092 | SEMICONDUCTOR PROCESS, AND SILICON SUBSTRATE AND CHIP PACKAGE STRUCTURE APPLYING THE SAME - A semiconductor process is provided. First, a silicon base is provided. Next, a surface of the silicon base is partially exposed and at least a stair structure is formed on the silicon base by etching the surface of the silicon base. The stair structure has a first notch with a first depth and a second notch with a second depth. The first depth is smaller than the second depth, and a diameter of the first notch is larger than a diameter of the second notch. A final insulating layer and a metal seed layer are sequentially formed on the stair structure. A patterned photoresist layer is formed on the metal seed layer. A circuit layer coving exposed portions of the metal seed layer located above the first notch is formed. The patterned photoresist layer and portions of the metal seed layer disposed below the patterned photoresist layer are then removed. | 07-01-2010 |
| 20100279452 | IMAGE SENSOR CHIP PACKAGE METHOD - In an image sensor chip package method, a transparent substrate having an upper surface, a lower surface, and through holes is provided. The through holes pass through the transparent substrate. Conductive posts are formed in the through holes. A sealing ring is formed on the lower surface of the transparent substrate. A chip having an active surface, an image sensitive area, and die pads is provided. The image sensitive area and the die pads are located on the active surface. Conductive bumps are formed and respectively disposed on the die pads for respectively connecting the conductive posts. At the time the active surface of the chip is turned to face toward the lower surface of the transparent substrate. The chip is assembled to the transparent substrate and electrically connected with the conductive posts via the die pads. The sealing ring surrounds the image sensitive area and the die pads. | 11-04-2010 |
Chih-Yung Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090252095 | Cognitive radio system and method - A cognitive radio system and method for clear and idle channel survey in Wireless Local Area Network (WLAN) are disclosed. Through computing average value of Received-Signal-Strength-Indicator (RSSI_AVG) in each channel, clear channels without interference from other RF devices can be distinguished in the present system and method. Based on an actual WLAN setup, a further AP has a larger possibility to be an idle and clear AP. In the present system and method, searching available channels from furthest AP to nearest AP therefore helps to reduce time of channel survey through repeated rises of signal strength threshold. | 10-08-2009 |
| 20100232365 | Cognitive radio system and method - A cognitive radio system and method for clear and idle channel survey in Wireless Local Area Network (WLAN) are disclosed. Through computing average value of Received-Signal-Strength-Indicator (RSSI_AVG) in each channel, clear channels without interference from other RF devices can be distinguished in the present system and method. Based on an actual WLAN setup, a further AP has a larger possibility to be an idle and clear AP. In the present system and method, searching available channels from furthest AP to nearest AP therefore helps to reduce time of channel survey through repeated rises of signal strength threshold. | 09-16-2010 |
Chi-Lun Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090206057 | Method To Improve Mask Critical Dimension Uniformity (CDU) - A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate. | 08-20-2009 |
Ching-Hsiang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120098433 | HOT CATHODE PREHEATING START DISCHARGE LAMP - A hot cathode preheating start discharge lamp comprises a lamp tube, a first electrode, a second electrode, a first heating element and a second heating element. The lamp tube has a sealed housing chamber. The first and second electrodes have respectively one end held in the housing chamber and another end connected to a power source. The first and second heating elements are spaced from the first and second electrodes without connecting therewith and have respectively another end connected to a discharge preheating controller or an electronic ballast. Thereby the invention does not need tungsten filaments or electronic powder coated on the tungsten filaments to generate a great amount of electrons like the conventional techniques do. Thus the problems of burnout and fracture of the tungsten filaments or exhaustion of electronic powder can be eliminated, and the lifespan of the lamp tube can be enhanced. | 04-26-2012 |
Chi-Pin Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090130854 | PATTERNING STRUCTURE AND METHOD FOR SEMICONDUCTOR DEVICES - Methods for forming a pattern layer over a target layer are disclosed. The methods use a novel low temperature spacer structure which results in a pattern layer having a decreased pattern pitch versus conventional patterning using photolithography. The decreased pattern pitch allows the target layer to be divided into multiple regions separated by a small distance, which in turn allows for greater density and device miniaturization. The structure and methods may be applied to patterning a word line layer in a memory device. | 05-21-2009 |
| 20110042738 | NITRIDGE READ-ONLY MEMORY CELL AND METHOD OF MANUFACTURING THE SAME - A nitride read-only memory cell and a method of manufacturing the same are provided. First, a substrate is provided, and a first oxide layer is formed on the substrate. Next, a nitride layer is deposited on the first oxide layer via a first gas and a second gas. The flow ratio of the first gas to the second gas is 2:1. After that, a second oxide layer is formed on the nitride layer. Then, a bit-line region is formed at the substrate. Afterward, a gate is formed on the second oxide layer. The first oxide layer, nitride layer, the second oxide layer and the gate compose a stack structure of the cell. Further, a spacer is formed on the side-wall of the stack structure. | 02-24-2011 |
| 20110073937 | Method for Fabricating a Charge Trapping Memory Device - A method for fabricating a charge trapping memory device includes providing a substrate; forming a first oxide layer on the substrate; forming a number of BD regions in the substrate; nitridizing the interface of the first oxide layer and the substrate via a process; forming a charge trapping layer on the first oxide layer; and forming a second oxide layer on the charge trapping layer. | 03-31-2011 |
Chun-Fu Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090174097 | SYSTEM FOR MANUFACTURING MICRO-RETARDER AND METHOD FOR MANUFACTURING THE SAME - A system for manufacturing a micro-retarder and a method for manufacturing the same are provided. The system for manufacturing a micro-retarder includes a carrying device, a heating device and a movement control device. The carrying device is used for carrying a polymolecule film. The polymolecule film is selected from a polymolecule film having an arrangement direction. The heating device is used for providing a heating source. The energy formed in the central area of the heating source is smaller than that in the peripheral area of the heating source. The movement control device is used for controlling the heating source and the polymolecule film to relatively move along a first direction, so that the adjusted heating source heats at least one partial area of the polymolecule film along the first direction and resumes the partial area of the polymolecule film to be non-directional. | 07-09-2009 |
| 20090242661 | NOZZLE PLATE OF A SPRAY APPARATUS AND FABRICATION METHOD THEREOF - A nozzle plate for use with a spray apparatus and a fabrication method thereof are provided. The nozzle plate has a plurality of orifices each including an inlet end and an outlet end. The inlet end and the outlet end have a geometrical structure with mirror symmetry and a centroid with positional deviation from a pattern center. The pattern center is the center of an imaginary circle circumscribed about the geometrical structure. The geometrical structure controls the propagation direction of liquid spray, expands the nebulizing range per unit density of orifices, enables product miniaturization, and saves energy. | 10-01-2009 |
| 20090242662 | LIQUID NEBULIZATION SYSTEM - Disclosed is a liquid nebulization system comprising a power supply unit, a signal generating unit, a liquid storage unit and a nebulizing unit. The signal generating unit receives power from the power supply unit to generate a main signal and at least an auxiliary signal, wherein the main signal and the auxiliary signal are added together to constructively and destructively interfere with one another to form a driving signal, further causing the nebulizing unit to nebulize the liquid contained in the liquid storage unit using the driving signal. | 10-01-2009 |
| 20090250827 | SYSTEM FOR MANUFACTURING MICRO-RETARDER AND METHOD FOR MANUFACTURING THE SAME - A system for manufacturing a micro-retarder and a method for manufacturing the same are provided. The system for manufacturing a micro-retarder includes a carrying device, a heating device and a movement control device. The carrying device is used for carrying a polymolecule film. The polymolecule film is selected from a polymolecule film having an arrangement direction. The heating device is used for providing a heating source. The energy formed in the central area of the heating source is smaller than that in the peripheral area of the heating source. The movement control device is used for controlling the heating source and the polymolecule film to relatively move along a first direction, so that the adjusted heating source heats at least one partial area of the polymolecule film along the first direction and resumes the partial area of the polymolecule film to be non-directional. | 10-08-2009 |
| 20100001096 | MICRO-PUMP AND MICRO-PUMP SYSTEM - A micro-pump for atomizing and including a main-housing, a nozzle plate, at least an actuator, and a liquid transport pipe is provided. The main-housing has a liquid inlet, a liquid outlet, an air inlet, and a micro-droplet outlet. The nozzle plate is assembled to the main-housing and has at least one nozzle. The nozzle plate divides the interior of the main-housing into a first chamber and a second chamber. The nozzle and the liquid inlet are connected with the first chamber. The air inlet, the liquid outlet, and the micro-droplet outlet are connected with the second chamber. The actuator is disposed on at least one of the main-housing or the nozzle plate. The actuator drives the nozzle plate, so that liquid is filled into the first chamber and sprayed out through the nozzle into the second chamber. The liquid transport pipe connects the liquid inlet and the liquid outlet. | 01-07-2010 |
| 20100224499 | NOZZLE PLATE OF A SPRAY APPARATUS AND FABRICATION METHOD THEREOF - A nozzle plate for use with a spray apparatus and a fabrication method thereof are provided. The nozzle plate has a plurality of orifices each including an inlet end and an outlet end. The inlet end and the outlet end have a geometrical structure with mirror symmetry and a centroid with positional deviation from a pattern center. The pattern center is the center of an imaginary circle circumscribed about the geometrical structure. The geometrical structure controls the propagation direction of liquid spray, expands the nebulizing range per unit density of orifices, enables product miniaturization, and saves energy. | 09-09-2010 |
| 20110304909 | IMAGE DISPLAY - An image display adapted to provide a 3D image is provided. The image display includes an image displaying module, an image dividing unit, and a plurality of micro-optical structures. The image displaying module is adapted to emit a light beam including a left eye beam and a right eye beam, and the image displaying module has a displaying area. The image dividing unit is disposed on the transmission path of the light beam for dividing the left eye beam and the right eye beam from each other. The micro-optical structures are dispersed and disposed on part of the transmission path of the light beam, wherein a ratio calculated by dividing a projection area of the micro-optical structures orthogonally projected on the displaying area by the displaying area ranges from 5% to 85%. | 12-15-2011 |
Chung-Ji Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110158007 | MULTI-POWER DOMAIN DESIGN - In some embodiments related to a memory array, a sense amplifier (SA) uses a first power supply, e.g., voltage VDDA, while other circuitry, e.g., signal output logic, uses a second power supply, e.g., voltage VDDB. Various embodiments place the SA and a pair of transferring devices at a local IO row, and a voltage keeper at the main IO section of the same memory array. The SA, the transferring devices, and the voltage keeper, when appropriate, operate together so that the data logic of the circuitry provided by voltage VDDB is the same as the data logic of the circuitry provided by voltage VDDA. | 06-30-2011 |
Chun-Hsien Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100059870 | CHIP PACKAGE STRUCTURE - A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a top surface encapsulates the chip, the substrate, and a portion of the leads. The heat dissipation device is disposed on the top surface of the molding compound. The insulating sheet disposed between the heat dissipation device and at least one of the leads has a bending line dividing the insulating sheet into a main body disposed on the molding compound and a bending portion extending from the main body. | 03-11-2010 |
| 20100117216 | CHIP PACKAGE STRUCTURE - A chip package structure including a substrate, at least one chip, a heat dissipation device, at least one first conductive bar, a molding compound, and at least one second conductive bar is provided. The chip and the heat dissipation device are respectively disposed on a first and a second surface of the substrate. The first conductive bar has two opposite end surfaces, wherein one end surface is disposed on the first surface of the substrate, the other end surface is extended away from the substrate, and a fastening slot is disposed between the two end surfaces and passes through the other end surface. The molding compound encapsulates the substrate, the chip, part of the heat dissipation device, and the first conductive bar. The second conductive bar is disposed on one surface of the molding compound and has a protrusion portion fastened to the fastening slot of the first conductive bar. | 05-13-2010 |
| 20100125396 | HYDRAULIC CONTROL APPARATUS FOR SPEED RATIO CHANGE - The present invention provides a hydraulic control apparatus for controlling the speed ratio change of a transmission system. The apparatus, disposed on a carrier, comprises a first pulley unit, a second pulley unit, a first hydraulic drive circuit, a second hydraulic drive circuit, and a hydraulic control circuit and a controller. The first pulley unit coupled to the second pulley unit by a transmission belt, and the first pulley unit and the second pulley unit are fluidly connected to the first and the second hydraulic drive circuit respectively. The hydraulic control circuit fluidly connected to the independent first and second hydraulic drive circuit. The controller functions to switch the series or parallel connection status between the first and second hydraulic drive circuit according to the moving status of the carrier through the hydraulic control circuit so that the speed ratio change is capable of being adjusted continuously and synchronously. | 05-20-2010 |
Chun-Te Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100033517 | BI-STABLE DISPLAY AND DRIVING METHOD THEREOF - A bi-stable display having a plurality of bi-stable light emitting diodes (LEDs) and a driver are provided. The bi-stable LEDs have bi-stable memory characteristics and emit light according to a plurality of specified voltages, wherein the driver is used to apply the specified voltages to the bi-stable LEDs. The driver further has a brightness controller. The brightness controller is used to control the brightness of the bi-stable display by controlling a plurality of durations in which the specified voltages are applied to the bi-stable LEDs for a plurality of frames. | 02-11-2010 |
Chun Yi Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120068940 | ELECTRONIC DEVICE - An electronic device includes a housing, an optical touch module, and a detecting unit. The housing includes a first body and a second body, and an angle is formed between the first body and the second body. The optical touch module executes a positioning function by sensing signals. The detecting unit is configured to the optical touch module, and is used for detecting the angle. When the angle is smaller than a predetermined angle, the detecting unit instructs the optical touch module to pause executing the positioning function, so as to avoid false position determinations by the optical touch module. | 03-22-2012 |
David Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120142188 | ANCHORED DAMASCENE STRUCTURES - An anchored conductive damascene buried in a multi-density dielectric layer and method for forming the same, the anchored conductive damascene including a dielectric layer with an opening extending through a thickness of the dielectric layer; wherein the dielectric layer comprises at least one relatively higher density portion and a relatively lower density portion, the relatively lower density portion forming a contiguous major portion of the dielectric layer; and, wherein the opening in the relatively lower density portion has a lateral dimension relatively larger compared to the relatively higher density portion to form anchoring steps | 06-07-2012 |
David Ding-Chung Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080258309 | Three-dimensional semiconductor device - A three-dimensional semiconductor device using redundant bonding-conductor structures to make inter-level electrical connections between multiple semiconductor chips. A first chip, or other semiconductor substrate, forms a first active area on its upper surface, and a second chip or other semiconductor substrate forms a second active area on its upper surface. According to the present invention, when the second chip has been mounted above the first chip, either face-up or face-down, the first active area is coupled to the second active area by at least one redundant bonding-conductor structure. In one embodiment, each redundant bonding-conductor structure includes at least one via portion that extends completely through the second chip to perform this function. In another, the redundant bonding-conductor structure extends downward to the top level interconnect. The present invention also includes a method for making such a device. | 10-23-2008 |
| 20100099267 | SYSTEM AND METHOD OF VAPOR DEPOSITION - Provided is a method and system for vapor deposition of a coating material onto a semiconductor substrate. In an embodiment, photoresist is deposited. An in-situ baking process may be performed with the vapor deposition. In an embodiment, a ratio of chemical components of a material to be deposited onto the substrate is changed during the deposition. Therefore, a layer having a gradient chemical component distribution may be provided. In an embodiment, a BARC layer may be provided which includes a gradient chemical component distribution providing an n,k distribution through the layer. Other materials that may be vapor deposited include pattern freezing material. | 04-22-2010 |
| 20120090547 | SYSTEM AND METHOD OF VAPOR DEPOSITION - Provided is a system for vapor deposition of a coating material onto a semiconductor substrate. The system includes a chemical supply chamber, a supply nozzle operable to dispense vapor, and a heating element operable to provide heat to a substrate in-situ with the dispensing of vapor. The system may further include reaction chamber(s) and/or mixing chamber(s). | 04-19-2012 |
Guan-Ting Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090040198 | METHOD FOR DETECTING PIXEL STATUS OF FLAT PANEL DISPLAY AND DISPLAY DRIVER THEREOF - The present invention discloses methods and display drivers for pixel status detection of flat panel displays. The method includes the following steps of: providing scan data to the register; using the scan data to drive the pixel; detecting the pixel status to obtain status data; refreshing the register with the status data; and, comparing the scan data with the status data to determine whether the pixel is in abnormal status or not. Based on the aforementioned method, the pixel status could be real-time monitored. | 02-12-2009 |
Hau-Yan Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120007161 | Semiconductor Non-volatile Memory - A method of forming a charge-storing layer in a non-volatile memory cell in a logic process includes forming a select gate over an active region of a substrate, forming long polysilicon gates partially overlapping the active region of the substrate, and filling the charge-storing layer between the long polysilicon gates. | 01-12-2012 |
| 20120163072 | NON-VOLATILE SEMICONDUCTOR MEMORY CELL WITH DUAL FUNCTIONS - A non-volatile semiconductor memory cell with dual functions includes a substrate, a first gate, a second gate, a third gate, a charge storage layer, a first diffusion region, a second diffusion region, and a third diffusion region. The second gate and the third gate are used for receiving a first voltage corresponding to a one-time programming function of the dual function and a second voltage corresponding to a multi-time programming function of the dual function. The first diffusion region is used for receiving a third voltage corresponding to the one-time programming function and a fourth voltage corresponding to the multi-time programming function. The second diffusion region is used for receiving a fifth voltage corresponding to the multi-time programming function. | 06-28-2012 |
Herbert Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080251826 | MULTI-LAYER SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a multi-layer semiconductor structure is disclosed. First, a first wafer comprising a first semiconductor device structure and a second wafer comprising a substrate and a single crystal silicon layer are provided, and the first and second wafers are combined in which a surface of the first wafer having the first semiconductor device structure is in contact with a surface of the second wafer having the single crystal silicon layer. A glue layer and a dielectric layer can be employed to combine the first and second wafers. Afterwards, a process for manufacturing a second semiconductor device structure is performed on the single crystal silicon layer. | 10-16-2008 |
| 20080283891 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure comprises a first wafer and a second wafer, between which a glue layer can be used for combination. The first wafer comprises a first semiconductor cell structure, and a surface of the first wafer comprises conductive pads electrically connected to the first semiconductor cell structure. The second wafer comprises a second semiconductor cell structure and is bonded to the surface of the first wafer having the conductive pads. The first and second semiconductor cell structures are electrically connected through the conductive pads, and the conductive pads are formed around each die of the first wafer. The density of the first semiconductor cell structure in the first wafer is larger than the density of the second semiconductor cell structure in the second wafer. | 11-20-2008 |
Horng Shing Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080246617 | MONITOR APPARATUS, SYSTEM AND METHOD - An apparatus, system and method which use a portable sensor to monitor the physical and mental reactions of a person in motion. The physical and mental reactions in motion will be transformed into the related physical and mental characteristic vectors, which are used to build up a personalized physical and mental database. The database executes a self-learning algorithm to output a set of physical and mental weighting factors. After executing the set of physical and mental weighting factors and physical and mental characteristic vectors, an embedded calculator incorporated in the portable sensor gives a warning signal if an abnormal situation is detected. | 10-09-2008 |
Hsiao-Tzu Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110307854 | MANIPULATING PARAMETERIZED CELL DEVICES IN A CUSTOM LAYOUT DESIGN - A system, apparatus and computer-implemented method for manipulating a parameterized cell device into a custom layout design. The method begins by receiving at least one parameterized cell representing a physical circuit from, for example, a database or configuration file. The parameterized cell has a plurality of configurable attributes. The method continues by adjusting one of the configurable attributes of the parameterized cell according to a capability associated with the one attribute. The attributes may include one or more of a parameter mapping capability, a port mapping capability, an abutment capability, a directional extension capability, a channel width capability, and a boundary layer capability. The method then calculates a new configuration for the parameterized cell based upon the adjustment, and applies the new configuration for the parameterized cell to a layout of the represented physical circuit. | 12-15-2011 |
Hsin-Chuh Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110302045 | AUTOMATIC PATENT TRANSACTION SYSTEM - The invention discloses an automatic patent transaction system. The invention comprises a patent database, a member database, a match computing device, a share computing device, a non-member database, and a licensing and transacting computing device. The operation method of the invention also comprises a method for the participation of member and non-member, and a method for the participation of member only. Thus, the invention is able to increase the trade efficiency of the patent and reduce the trade cost of the patent. | 12-08-2011 |
Hsin-Hsien Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110198721 | METHOD FOR THINNING A WAFER - A method for thinning a wafer is provided. In one embodiment, a wafer is provided having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of through silicon vias (TSVs), each of the TSVs substantially sealed by a liner layer and a barrier layer. A wafer carrier is provided for attaching to the second side of the wafer. The first side of the wafer is thinned and thereafer recessed to partially expose portions of the liner layers, barrier layers and the TSVs protruding from the wafer. An isolation layer is deposited over the first side of the wafer and the top portions of the liner layers, barrier layers and the TSVs. Thereafter, an insulation layer is deposited over the isolation layer. The insulation layer is then planarized to expose top portions of the TSVs. A dielectric layer is deposited over the planarized first side of the wafer. One or more electrical contacts are formed in the dielectric layer for electrical connection to the exposed one or more TSVs. | 08-18-2011 |
Hui-Ching Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090165537 | Device and method for optical nanoindentation measurement - This invention relates to a device and method for optical nanoindentation measurement, according to which respective measurement results are obtained by having an indenter tip apply load to a fixed portion of a thin film, having an indenter tip apply load to a non-fixed portion of a thin film, and having a vibrating component transmit the dynamic properties of the vibration to the thin film. By combining the above measurement results in calculations, the Young's modulus, the Poisson's ratio, and the density of the thin film can be obtained. | 07-02-2009 |
James Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120176718 | TRANSIENT VOLTAGE SUPPRESSOR - A transient voltage suppressor may include a silicon controlled rectifier (SCR) having an anode coupled to Vcc. The SCR may include a PNP transistor (Q | 07-12-2012 |
Jhi-Cherng Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110263092 | METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - The present disclosure discloses an exemplary method for fabricating a semiconductor device comprises selectively growing a material on a top surface of a substrate; selectively growing a protection layer on the material; and removing a portion of the protection layer in an etching gas. | 10-27-2011 |
Kuei-Liang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120108040 | VAPORIZING POLYMER SPRAY DEPOSITION SYSTEM - A vaporizing spray deposition device for forming a thin film includes a processing chamber, a fluid line, and a spray head coupled to the fluid line proximate the processing chamber. The fluid line is configured to transfer a polymer fluid and solvent mixture to the spray head. The spray head is configured to receive the polymer fluid and solvent mixture and to atomize the polymer fluid and solvent mixture to emit it in a substantially vaporized form to be deposited on a surface and thereby forming a thin film of the polymer on the surface after evaporation of the solvent. In an embodiment, the vaporizing spray deposition device may include a heating device to perform a hard bake process on the polymer. In an embodiment, the vaporizing spray deposition device may be configured to provide a post deposition solvent spray trim process to the thin film polymer. | 05-03-2012 |
Kuo-Cheng Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090052456 | Packet-processing apparatus and method - The present invention provides a packet-processing apparatus for receiving and processing N packets in a series, wherein N is a natural number, and each of the packets has a current header. Additionally, the packet-processing apparatus includes an agent, a processing unit, a monitoring unit, a lookup table, and a control unit. Particularly, the packet-processing apparatus according to the invention can process the N packets effectively and flexibly. | 02-26-2009 |
| 20090210577 | DIRECT MEMORY ACCESS SYSTEM AND METHOD USING THE SAME - The invention discloses a DMA system capable of being adapted to various interfaces. The DMA system includes the following advantages: 1) the software porting effort can be reduced when different interfaces are integrated into a SoC; 2) a flexible DMA that could provide protocol transparency and could be ported into different interfaces easily; 3) a scalable DMA that can support unlimited TX/RX scattering/gathering data segments; 4) a reusable DMA that provides user defined TX information (or RX information) and TX message (or RX message) field; and 5) a high performance DMA that support unaligned segment data pointers and unlimited scattering/gathering data segments, so as to reduce extra memory copies by CPU. | 08-20-2009 |
| 20090262739 | NETWORK DEVICE OF PROCESSING PACKETS EFFICIENTLY AND METHOD THEREOF - A network device includes a first memory, a second memory, a receiver, a CPU, a transmitter, and a header cache controller (HCC). The HCC is coupled to the first memory and the second memory. The receiver, the CPU, and the transmitter access the first memory and the second memory via the HCC. The HCC can map an address of the first memory storing a header of a packet to an address of the second memory so as to store the header of the packet in the second memory. | 10-22-2009 |
| 20110103245 | BUFFER SPACE ALLOCATION METHOD AND RELATED PACKET SWITCH - A buffer space allocation method for a packet switch includes periodically performing a measurement process to obtain a plurality of measurement results at different times, each measurement result indicating a total size of accumulated packets in an output queue corresponding to one of a plurality of network ports of the packet switch, and adjusting a dedicated buffer space of the output queue according to the plurality of measurement results and a reserved space value for the dedicated buffer space. | 05-05-2011 |
| 20120166861 | METHOD FOR ADJUSTING CLOCK FREQUENCY OF A PROCESSING UNIT OF A COMPUTER SYSTEM AND RELATED DEVICE - A method for adjusting clock frequency of a processing unit of a computer system includes calculating a busyness ratio of the processing unit according to a status signal provided by the processing unit, determining whether the busyness ratio is in a busyness ratio range, when the busyness ratio is not in the busyness ratio range, determining whether a calculation result generated according to a clock frequency of the processing unit and a frequency difference is in a frequency range, and when the calculation result is in the frequency range, adjusting the clock frequency of the processing unit according to the calculation result and outputting the adjusted clock frequency to a clock generator, wherein the busyness ratio range, the frequency range and the frequency difference are decided according to an operation state of a peripheral unit of the computer system. | 06-28-2012 |
Shih-Chieh Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090171148 | Capsule endoscope system having a sensing and data discriminating device and discrimination method thereof - A capsule endoscope system having a sensing and data discriminating device and the discrimination method thereof are proposed. After a sensor captures data, a data processor performs the extraction of a characteristic value from the data and then comparison and discrimination. Data are then divided into two types: one to be transmitted and the other not to be transmitted. The redundancy of data transmission can be reduced, the amount of data transmission can be lowered, and the effect of power saving can also be accomplished. | 07-02-2009 |
| 20090185742 | METHOD FOR IMAGE COMPENSATION - In an image compensation method, formats of images are identified based on ambient color quantity information. If the image is in text format or of high contrast, over compensation is barred to avoid edge effect. A compensation coefficient is set basing on edge eigenvalue of images. The compensation value is fine tuned based on a threshold value to obtain finer compensation result. | 07-23-2009 |
Shin-Chii Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080311713 | MOBILITY ENHANCEMENT BY STRAINED CHANNEL CMOSFET WITH SINGLE WORKFUNCTION METAL-GATE AND FABRICATION METHOD THEREOF - The present invention provides a complementary metal-oxide-semiconductor (CMOS) device and a fabrication method thereof. The CMOSFET device includes a compressively strained SiGe channel for a PMOSFET, as well as a tensile strained Si channel for an NMOSFET, thereby enhancing hole and electron mobility for the PMOSFET and the NMOSFET, respectively. As such, the threshold voltages of the two types of transistors can be obtained in oppositely symmetric by single metal gate. | 12-18-2008 |
Su Tsai Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100207266 | CHIP PACKAGE STRUCTURE - A chip package structure including a substrate, a plurality of electrodes, a chip, and a plurality of bumps is provided. Each of the electrodes has a bottom portion and an annular element, wherein the bottom portion is disposed on the substrate, the annular element is disposed on the bottom portion, and the bottom portion and the annular element define a containing recess. The chip is disposed above the substrate and has an active surface facing the substrate and a plurality of pads disposed on the active surface. The bumps are respectively disposed on the pads and respectively inserted into the containing recesses. The melting point of the electrodes is higher than that of the bumps. A chip package method is also provided. | 08-19-2010 |
| 20110018117 | SEALED JOINT STRUCTURE OF DEVICE AND PROCESS USING THE SAME - A sealed joint structure of device includes a buffer bump layer, conductive joint portions and a sealed joint portion. The buffer bump layer disposed between a device and a substrate includes first parts and a second part surrounding the first parts. Each of the conductive joint portions includes a first electrode covering each of the first parts and a second electrode on the substrate, and each of the first electrodes is electrically connected to the second electrode. The sealed joint portion includes a joint ring located on the substrate and is jointed with the second part to form a hermetic space between the device and the substrate. | 01-27-2011 |
| 20110079895 | BUMP STRUCTURE, CHIP PACKAGE STRUCTURE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME - A bump structure includes a first substrate, a plurality of first bond pads, a plurality of dielectric bumps, a plurality of under bump metal layers, and a plurality of metal layers. The plurality of first bond pads are spaced apart on the first substrate. The plurality of dielectric bumps disposed corresponding to the first bond pads electrically isolate the first bond pads from each other. Each under bump metal layer is formed between the respective first bond pad and the dielectric bump, extending through a side surface of the respective dielectric bump, and correspondingly forming an extension portion between two adjacent dielectric bumps, wherein each extension portion has a length along the extending direction thereof shorter than the pitch between two adjacent dielectric bumps. Each metal layer is formed on the side surface of the respective dielectric bump and the respective extension portion. | 04-07-2011 |
| 20110227190 | ELECTRONIC DEVICE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - The invention provides an electronic device package structure and method of fabrication thereof. The electronic device package structure includes a chip having an active surface and a bottom surface. A dielectric layer is disposed on the active surface of the chip. At least one trench is formed through the dielectric layer. A first protection layer covers the dielectric layer and sidewalls of the trench. A second protection layer covers the first protection layer, filling the trench. | 09-22-2011 |
| 20120161336 | SEMICONDUCTOR DEVICE AND ASSEMBLING METHOD THEREOF - A semiconductor device and an assembling method thereof are provided. The semiconductor device includes a chip, a carrier, a plurality of first conductive elements and a plurality of second conductive elements. The chip has a plurality of first pads. The carrier has a plurality of second pads. The second pads correspond to the first pads. Each first conductive element is disposed between one of the first pads and one of the second pads. Each second conductive element is disposed between one of the first pads and one of the second pads. A volume ratio of intermetallic compound of the second conductive elements is greater than a volume ratio of intermetallic compound of the first conductive elements. | 06-28-2012 |
| 20120168933 | WAFER LEVEL MOLDING STRUCTURE - A wafer level molding structure and a manufacturing method thereof are provided. A molding structure includes a first chip and a second chip and an adhesive layer there between. The first chip includes a first back side, a first front side and a plurality of lateral sides, in which a plurality of first front side bumps are disposed on the first front side. The second chip includes a second back side and a second front side, and a plurality of second back side bumps and second front side bumps are respectively disposed on the second back side and the second front side. A plurality of through-hole vias is disposed in the second chip, and electrically connected the second back side bumps to the second front side bumps. Adhesive materials covering the lateral sides of the first chip, and electrically connect the second back side bumps with the first front side bumps. The adhesive materials include a plurality of conductive particles and/or a plurality of non-conductive particles. | 07-05-2012 |
Szu-Wei Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090174071 | Semiconductor device including electrically conductive bump and method of manufacturing the same - A semiconductor device and method of manufacturing are provided that include forming an electrically conductive bump on a substrate and forming at least one passivation layer on the bump to reduce solder joint failures. | 07-09-2009 |
| 20100093135 | STRATIFIED UNDERFILL METHOD FOR AN IC PACKAGE - A method includes joining an integrated circuit die having at least one low-k dielectric layer to a package substrate or printed circuit board using a plurality of solder bumps located between the die and the package substrate or printed circuit board. The low-k dielectric layer has a dielectric constant of about 3.0 or less. The solder bumps have a lead concentration of about 5% or less. A stratified underfill is formed between the die and the package substrate or printed circuit board. | 04-15-2010 |
Tsung Hsien Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110242859 | ISOLATED PRIMARY CIRCUIT REGULATOR - An isolated primary circuit regulator is applied to a primary side of a transformer of a power supply. The isolated primary circuit regulator outputs a switching signal, and switches the transformer by using the switching signal, thereby stabilizing an output current. The isolated primary circuit regulator includes a discharge time detector, an oscillator, a pulse width modulator and a control circuit. The discharge time detector is used for detecting a discharge time of a switching current generated at a secondary side of the transformer. The oscillator is used for generating an oscillation signal. The control circuit is used for outputting an adjustment signal. The pulse width modulator outputs a switching signal according to the oscillation signal output by the oscillator and the adjustment signal output by the control circuit. The switching signal has a duty cycle and a frequency corresponding to the oscillation signal and the adjustment signal. | 10-06-2011 |
Tung-Huang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110133670 | Street lamp capable of adjusting illuminating range thereof and having LEDs as light source - A street lamp capable of adjusting illuminating range thereof and having LEDs as its light source is provided. The street lamp comprises: a main supporting member; a substrate, one end of the substrate being pivotally fixed to the main supporting member by a first fastening member, and an LED light source being provided on the surface opposite to the main supporting member; and an adjusting member provided between the main supporting member and the substrate, one end of the adjusting member being pivotally fixed to the main supporting member by a second fastening member, wherein a fixing member for adjusting the angle of the substrate to adjust the illuminating angle is provided between the substrate and the adjusting member when the first fastening member and the second fastening member are pivotally movable. | 06-09-2011 |
Tzu-Ju Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120117839 | PICTURE-EXHIBITING DEVICE WITH AUDIO SYSTEM - A picture-exhibiting device with an audio system which can be used to demonstrate paintings or photos. The picture-exhibiting device with an audio system includes a frame, a picture fixed on the frame, an electret speaker positioned on the backside of the picture, a fixer disposed at a back side of the picture, a back frame fixed on the frame, a cover covering part of the back frame and the electret speaker, a post amplifier coupling the electret speaker, and an audio signal provider coupling the post amplifier. | 05-17-2012 |
Wan-Hua Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100060721 | THREE-DIMENSIONAL DISPLAY, FABRICATING METHOD AND CONTROLLING METHOD THEREOF - A three-dimensional display for the viewer to watch through glasses is provided, wherein the glasses have two lenses and the polarized directions thereof are perpendicular to each other. The three-dimensional display includes a display panel and a liquid crystal phase modulator. The display panel, suitable for displaying an image, has a plurality of pixels arranged in array and a polarizer having a transmission axis, wherein the polarizer disposed between the pixels and the glasses. The liquid crystal phase modulator suitable for providing phase retardation includes a liquid crystal layer and an alignment layer adjacent to the display panel. An included angle between an alignment direction of the alignment layer and the transmission axis is substantially equal to n×45 degrees, wherein an absolute value of n is an integer. The liquid crystal phase modulator adjusts a phase of the image and then outputs an image with three-dimensional information. | 03-11-2010 |
Wei-Lung Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110304768 | METHOD OF SAMPLING PHASE CALIBRATION AND DEVICE THEREOF - A method of sampling phase calibration and a device thereof is suitable for an analog-to-digital converter and phase lock loop (ADC-PLL). The ADC-PLL conducts sampling on a periodic analog signal according to a sampling phase so as to produce a plurality of digital signals. The sampling phase calibration device includes a storage unit, a motion-detecting unit and a control unit. The motion-detecting unit is to calculate the number of motion data corresponding to a sampling phase. The control unit is coupled to the motion-detecting unit for changing the sampling phase so as to obtain the number of motion data corresponding to each sampling phase and selecting the sampling phase corresponding to the minimum number of motion data as an optimal sampling phase. The ADC-PLL can correctly sample an analog signal by using the optimal sampling phase and reduce the influence of clock jitter to the minimum. | 12-15-2011 |
Wen-Chang Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110111490 | LIGHT TRANSFORMATION PARTICLE AND PHOTOBIOREACTOR - A light transformation particle is provided. The light transformation particle of the invention includes a light-shifting layer containing at least one light-emitting material, wherein the light-emitting layer transforms ultraviolet light, yellow-green light, or infrared light to red-orange light or blue-violet light. The light transformation particle further includes a core layer and/or a shell layer. The present invention further provides a photobioreactor containing the light transformation particle of the invention. | 05-12-2011 |
Weng-Jung Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100157595 | LED MODULE AND PACKAGING METHOD THEREOF - A light-emitting diode (LED) module and an LED packaging method. As the LED module is packaged under the consideration of candela distribution, each of the lead frames of the LED chips packaged in the LED module is bended for tilting the LED chips by different angles to exhibit various lighting effects. Meanwhile, in the LED packaging method, a plurality of LED chips can be loaded on board rapidly and aligned by one operation to result in less deviation in the candela distribution curve. | 06-24-2010 |
Wen-Min Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090108921 | Timing Control circuit with power-saving function and method thereof - A timing control circuit with a power-saving function includes a receiving circuit, a processor, and a first switch. The receiving circuit receives a first set of differential signals for generating a set of command signals. The processor is coupled to the receiving circuit and generates a first control signal according to the set of command signals. The switch is coupled between the receiving circuit and the processor for selectively decoupling the receiving circuit from a first power supply according to the first control signal. | 04-30-2009 |
| 20090125761 | Method for controlling a DRAM - A method for controlling a DRAM includes detecting failed memory cells of the DRAM, recording the rows corresponding to the failed memory cells, receiving a control signal for accessing the memory cell with column address X and row address Y, determining if the row address Y is in the recorded failed rows list, and if yes, replacing the memory cell to be accessed with the memory cell with the column address X and row address Z which is not same as Y. | 05-14-2009 |
| 20090153456 | Method for generating over-drive data - A method for generating over-drive data includes storing a reduced over-drive table and a predetermined weighting table, finding first and second reference values from the reduced over-drive table according to received previous current pixel values, finding first and second weighting values from the predetermined weighting table according to the received current pixel value, and generating a corresponding over-drive data according to the first and the second reference values, and the first and the second weighting values. | 06-18-2009 |
| 20090244103 | Method for driving a pixel by generating an over-drive grey level and driver thereof - A method for generating an over-drive grey level for driving a pixel includes providing a corresponding over-drive function according to an original grey level for the pixel in the previous frame, and generating the over-drive grey level according to the corresponding over-drive function and the original grey level for the pixel in the current frame. | 10-01-2009 |
| 20090245394 | Over-drive device and method thereof - A method for data compressing includes compressing an original data with DPCM, compressing again the compressed data with Huffman's encoding for generating a bit-stream, and storing the bit-stream. | 10-01-2009 |
| 20100073345 | IMAGE-PROCESSING CIRCUIT, RELATED SYSTEM AND RELATED METHOD CAPABLE OF REDUCING POWER CONSUMPTION - An image processing circuit turns off the writing unit of the controller of the DRAM when the previous frame is identical to the current frame. In this way, the writing unit of the controller of the DRAM does not write the current frame into the DRAM, thereby reducing power consumption. | 03-25-2010 |
Ya-Wen Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090316958 | MOVEMENT DETECTOR AND MOVEMENT DETECTION METHOD - The invention provides a movement detector for a composite signal, comprising a frame delay unit, a first combiner, a second combiner and a third combiner. The frame delay unit receives the composite signal to generate a one-frame delayed signal, a two-frame delayed signal, and a three-frame delayed signal. The first combiner generates a first difference from a first pair of the composite signal, the one-frame delayed signal, the two-frame delayed signal, and the three-frame delayed signal. The second mean generates a second difference from a second pair of the composite signal, the one-frame delayed signal, the two-frame delayed signal, and the three-frame delayed signal. The first pair is different from the second pair. The third combiner generates a third difference for detecting motion based on the first difference and the second difference. | 12-24-2009 |
Yen-Ju Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120023299 | CONTROLLING APPARATUS AND DATA TRANSMITTING SYSTEM APPLYING THE CONTROLLING APPARATUS AND METHOD THEREOF - A controlling apparatus includes: a storage device arranged for storing at least one Byte Enable property compatible to a processing device; and a controlling circuit coupled to the storage device for generating at least one Byte Enable signal to the processing device according to the Byte Enable property compatible with the processing device. | 01-26-2012 |
| 20120117326 | APPARATUS AND METHOD FOR ACCESSING CACHE MEMORY - The present invention relates to an apparatus and a method for accessing a cache memory. The cache memory comprises a level-one memory and a level-two memory. The apparatus for accessing the cache memory according to the present invention comprises a register unit and a control unit. The control unit receives a first read command and a reject datum of the level-one memory and stores the reject datum of the level-one memory to the register unit. Then the control unit reads and stores a stored datum of the level-two memory to the level-one memory according to the first read command. | 05-10-2012 |
| 20120191910 | PROCESSING CIRCUIT AND METHOD FOR READING DATA - A processing circuit includes a processing unit and a data buffer. When the processing unit receives a load instruction and determines that the load instruction has a load-use condition, the processing unit stores specific data into the data buffer, where the specific data is loaded by executing the load instruction. | 07-26-2012 |
Yen-Shuo Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100008308 | LINK ADAPTION IN WIRELESS COMMUNICATIONS - Methods and systems for providing generalized link adaptation in an orthogonal frequency-division multiple access wireless communications network can include determining a number of desired resource blocks (RBs) for each user of a plurality of users; calculating a maximal channel gain G | 01-14-2010 |
Yi-Chen Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110303556 | DEVICE AND METHOD FOR MEASURING PROTHROMBIN TIME AND HEMATOCRIT BY ANALYZING CHANGE IN REACTANCE IN A SAMPLE - Devices and methods for measuring prothrombin time (PT) and hematocrit (HCT) by analyzing the change in reactance in a sample are presented. A diagnostic device for measuring HCT and PT of a fluid includes a relative electrode-type sensor device and a blood test card assembly including one or more pairs of electrodes, wherein alternating current (AC) provided by the sensor device is used to measure and calculate HCT and PT of blood test using the reactance analysis. | 12-15-2011 |
Ying-Chih Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110197961 | CONDUCTIVE ALUMINUM PASTE AND THE FABRICATION METHOD THEREOF, THE SOLAR CELL AND THE MODULE THEREOF - This present disclosure relates to conductive aluminum paste for fabricating a silicon solar cell. Herein, the conductive aluminum paste is composed of organic carrier, aluminum powder, nano-scale metal particle, and glass frit, wherein the nano-scale metal particle has a particle size distribution D50 in the range from 10 nanometers to 1000 nanometers and the weight percentage of the nano-scale metal particle associated with the conductive aluminum paste is around 0.1 through 10 wt %. Furthermore, the characteristics of the conductive aluminum paste are for reducing the sheet resistance value of the electrode, increasing the adhesion in the silicon solar cell package module, and enhancing the electro-optical conversion efficiency of the silicon solar cell. | 08-18-2011 |
Yu-Tsung Lu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120188175 | Single Finger Gesture Determination Method, Touch Control Chip, Touch Control System and Computer System - A single finger gesture determination method is disclosed. The single touch gesture determination method includes steps of detecting one or more trigger signals, determining respective categories under a plurality of gesture groups to which the one or more trigger signals belong according to the one or more trigger signals, and deciding a finger gesture represented by the one or more trigger signals according to the determined respective categories under the plurality of gesture groups. | 07-26-2012 |
