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Lu, Hsin-Chu

Chi-Chang Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20110255643Digital Second-Order CDR Circuits - A method for performing a clock and data recovery includes providing data and a clock; determining early/late values of the data to generate a first-order phase code using the data and the clock; and accumulating first-order phase codes retrieved from different finite state machine (FSM) cycles to generate a second-order phase code. A plurality of candidate total phase codes is generated from the second-order phase code. A multiplexing is performed to the plurality of candidate total phase codes to output one of the plurality of candidate total phase codes as a total phase code. The multiplexing is controlled by the first-order phase code. A brake machine may be implemented to prevent over-compensation of phases.10-20-2011

Chi-Lun Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20100297538Holographic Reticle and Patterning Method - A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures or else used in a multi-surface imaging composition. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.11-25-2010

Patent applications by Chi-Lun Lu, Hsin-Chu TW

Chun Yi Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20110309234IMAGE SENSING MODULE - The present invention provides an image sensing module including an image sensing device and a calculation device. The image sensing device includes a plurality of pixels for acquiring an operation image containing an object image. The calculation device stores a look-up table regarding a temperature related parameter and a position deviation of the object image at each pixel associated with the temperature related parameter, and selects a deformation error from the look-up table according to the temperature related parameter corresponding to the operation image so as to correct a current position of the object image in the operation image.12-22-2011

David Ding-Chung Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20090090951Capacitors Integrated with Metal Gate Formation - A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate; and a capacitor over the substrate. The capacitor includes a first layer including a first capacitor electrode and a second capacitor electrode, wherein the first capacitor electrode is formed of a metal-containing material and is free from polysilicon. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate; and a metal-containing gate electrode on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material, and has a same thickness, as the first capacitor electrode.04-09-2009
20090136876SYSTEM AND METHOD FOR PHOTOLITHOGRAPHY IN SEMICONDUCTOR MANUFACTURING - A method for producing a pattern on a substrate includes providing at least one exposure of the pattern onto a layer of the substrate by a higher-precision lithography mechanism and providing at least one exposure of the pattern onto a layer of the substrate by a lower-precision lithography mechanism. The exposures can be done in either order, and additional exposures can be included. The higher-precision lithography mechanism can be immersion lithography and the lower-precision lithography mechanism can be dry lithography.05-28-2009
20100026601Antennas Integrated in Semiconductor Chips - An integrated circuit structure includes a semiconductor chip including a top surface, a bottom surface, and a side surface; a metal seal ring adjacent the side surface; and an antenna including a seal-ring antenna. The seal-ring antenna includes at least a portion of the metal seal ring.02-04-2010
20110309420Capacitors Integrated with Metal Gate Formation - A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate and a MIM capacitor over the substrate. The MIM capacitor includes a bottom plate, an insulating layer over the bottom plate, and a top plate over the insulating layer. The semiconductor structure further includes a MOS device including a gate dielectric over the substrate and a metal-containing gate electrode free from polysilicon on the gate dielectric, wherein the metal-containing gate electrode is formed of a same material and has a same thickness as the bottom plate.12-22-2011

Patent applications by David Ding-Chung Lu, Hsin-Chu TW

Hsiao-Tzu Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20090294685SYSTEM FOR OVERLAY MEASUREMENT IN SEMICONDUCTOR MANUFACTURING - Provided is a system for overlay measurement in semiconductor manufacturing that includes a generator for exposing an overlay target to radiation and a detector for detecting reflected beams of the overlay target. The reflected beams are for overlay measurement and include at least two different beams.12-03-2009

Szu Wei Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20100301477Silicon-Based Thin Substrate and Packaging Schemes - A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of traces are formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. A semiconductor chip may be mounted on the solder bumps. The silicon-based thin package substrate may be used as a carrier of semiconductor chips.12-02-2010

Wan-Hua Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20100157227LIQUID CRYSTAL DISPLAY PANEL - In a liquid crystal display panel, a pixel electrode includes at least a main electrode strip and a plurality of sub electrode branches. The sub electrode branches extend outwardly from two opposite edges of the main electrode strip. The main electrode strip includes at least a node-controlling portion, the controlling width of the node-controlling portion are different from a trunk width of the main electrode strip. Otherwise, a plurality of first sub electrode branches and a plurality of second sub electrode branches are extend outwardly from two opposite edges of the main electrode strip respectively. Relating to the position of the first sub electrode branches, the second sub electrode branches has a position-shift amount along the extending direction of the main electrode strip. The position-shift amount is smaller than the branch width of the first or second sub electrode branch.06-24-2010

Ying Chi Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20090273725LIQUID CRYSTAL DISPLAY PANEL AND PIXEL STRUCTURE THEREOF - A pixel structure includes a bright region and a pale region, and the pale region includes a first capacitance coupling region and a second capacitance coupling region. The first capacitance coupling region includes a first coupling capacitor, the second capacitance coupling region includes a second coupling capacitor, and the first coupling capacitor and the second coupling capacitor are connected in parallel.11-05-2009
20100007826Multidomain-Vertical-Alignment Transreflective LCD - A transreflective LCD has a TFT array plate, a color filter plate and a liquid crystal therebetween. A trench is in the overcoat layer of the TFT array plate and/or the color filter plate. The trench can be located in a transmission area or in a reflective area of a pixel. A conformal transparent electrode is located therein, and an overcoat material is filled up in the trench.01-14-2010
20100182558LIQUID CRYSTAL DISPLAY PANEL - According to the present invention, an LCD panel includes a first substrate, a second substrate placed opposite to the first substrate, and a liquid crystal layer placed between the first substrate and the second substrate. The first substrate includes a pixel electrode and a first common electrode. The pixel electrode includes a plurality of first protruding nodes, and the first common electrode includes a plurality of second protruding nodes interleaved with the plurality of first protruding nodes. The second substrate includes a second common electrode corresponding to the first common electrode. The second common electrode includes a plurality of third protruding nodes corresponding to the second protruding nodes.07-22-2010
20110148780TOUCH PANEL AND FABRICATING METHOD THEREOF - A method of fabricating touch panel includes the following steps. A base is provided. A first transparent conductive layer is formed on the base. A first screen printing process is performed to form a first patterned sacrificial layer on the first transparent conductive layer, and the first patterned sacrificial layer is used to pattern the first transparent conductive layer to form a patterned sensing pad layer. A second screen printing process is carried out to form a patterned insulating layer. A second transparent conductive layer is formed on the base. A third screen printing process is performed to form a second patterned sacrificial layer, and the second patterned sacrificial layer is used to pattern the second transparent conductive layer to form a patterned bridge line layer.06-23-2011

Patent applications by Ying Chi Lu, Hsin-Chu TW

Yi-Tien Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20110128636PROJECTION LENS - A projection lens includes a first lens group, a second lens group, and a third lens group. The first lens group is composed of a first lens. The first lens has a concave surface and a convex surface, and the concave surface of the first lens faces a reducing side of the projection lens. The second lens group has positive refractive power, and includes a second lens having positive refractive power and a third lens having negative refractive power. The second lens is a biconvex lens, and the third lens has a concave lens facing the reducing side. The third lens group is composed of a fourth lens, and the fourth lens has a convex surface facing a magnifying side of the projection lens. The first lens group, the second lens group, and the third lens group include at least two aspheric lenses.06-02-2011
20110176226LENS MODULE - A lens module has a magnified side and a reduced side having an imaging surface. The lens module includes a first, a second, and a third lens groups having positive refractive powers respectively. The first lens group includes a first and a second lenses. A value calculated by dividing a distance between a center of a surface of the first lens facing the magnified side and the imaging surface by the effective focal length of the lens module is greater than or equal to 1 and smaller than or equal to 3. The second lens group located between the first lens group and the reduced side includes a third and a fourth lenses. The third lens group located between the second lens group and the reduced side includes a fifth lens. Refractive powers of the first to the fifth lenses are negative, positive, positive, negative and positive, respectively.07-21-2011

Yung-Fong Lu, Hsin-Chu TW

Patent application numberDescriptionPublished
20100275167Cell-Context Aware Integrated Circuit Design - A method of designing an integrated circuit includes providing a standard cell database including a plurality of standard cells; providing an index file having cell-context information indexed to the plurality of standard cells; retrieving the cell-context information of one of the plurality of standard cells from the cell-context file; and applying the index information to a design of the integrated circuit.10-28-2010