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Loubet
Alain Loubet, Mervilla FR
| Patent application number | Description | Published |
|---|---|---|
| 20090009173 | PORTABLE WIRELESS METAL DETECTOR - The subject of invention is a portable electromagnetic metal detector, of the type comprising a detection head placed at the end of a support stick, the detection head includes a transmitting coil and a receiving coil. The metal detector has, an electronic command and control box making it possible to implement the detection head. An operator headset is provided for allowing the detector to transmit an audio detection signal to the operator. According to the invention, the detection head comprises all the means for generating a transmission signal and for analysing the signal received. The detection head, the electronic box and the operator headset furthermore comprise radio transmission means for establishing a multipoint wireless communication network between these three elements. This communication network advantageously makes it possible to provide a detector that does not comprise any wired links and to implement the detector according to the invention in various configurations. | 01-08-2009 |
Nicolas Loubet, Eindhoven NL
| Patent application number | Description | Published |
|---|---|---|
| 20110006280 | QUANTUM-DOT DEVICE AND POSITION-CONTROLLED QUANTUM-DOT-FABRICATION METHOD - The present invention relates to a method for position-controlled fabrication of a semiconductor quantum dot, the method comprising: providing a substrate ( | 01-13-2011 |
Nicolas Loubet, Grenoble FR
| Patent application number | Description | Published |
|---|---|---|
| 20080254580 | Realization of Self-Positioned Contacts by Epitaxy - Metal contacts are self-positioned on a wafer of semiconductor product. Respective placement areas for a metal contact are determined by a selective deposition of a growth material over a region of the substrate surface (for example, through epitaxial growth). The growth material is surrounded by an insulating material. The grown material is then removed to form a void in the insulating material which coincides with the desired location of the metal contact. This removal of the grown material exposes the region on the substrate surface. Conductive material is then deposited to fill the void and thus form the metal contact directly with the region of the substrate surface. | 10-16-2008 |
| 20090023275 | METHOD FOR FORMING SILICON WELLS OF DIFFERENT CRYSTALLOGRAPHIC ORIENTATIONS - A method for manufacturing silicon wells of various crystallographic orientations in a silicon support, including the steps of: forming a silicon layer having a first orientation on a silicon substrate having a second orientation; forming insulating walls, defining wells extend at least down to the border between the silicon substrate and the silicon layer; performing, in first wells, a chemical vapor etch (CVE) of the silicon layer by means of hydrochloric acid, in an epitaxy reactor, at a temperature ranging between 700° C. and 950° C.; and performing, in the first wells, a vapor-phase epitaxy on the silicon substrate in the presence of a precursor of silicon and hydrochloric acid, at a temperature ranging between 700° C. and 900° C. and up to the upper surface of the silicon layer. | 01-22-2009 |
| 20090032874 | METHOD FOR INTEGRATING SILICON-ON-NOTHING DEVICES WITH STANDARD CMOS DEVICES - A method is provided for fabricating transistors of first and second types in a single substrate. First and second active zones of the substrate are delimited by lateral isolation trench regions, and a portion of the second active zone is removed so that the second active zone is below the first active zone. First and second layers of semiconductor material are formed on the second active zone, so that the second layer is substantially in the same plane as the first active zone. Insulated gates are produced on the first active zone and the second layer. At least one isolation trench region is selectively removed, and the first layer is selectively removed so as to form a tunnel under the second layer. The tunnel is filled with a dielectric material to insulate the second layer from the second active zone of the substrate. Also provided is such an integrated circuit. | 02-05-2009 |
Nicolas Loubet, Guilderland, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110129983 | METHOD FOR FABRICATING A DUAL-ORIENTATION GROUP-IV SEMICONDUCTOR SUBSTRATE - The present invention relates to method for fabricating a dual-orientation group-IV semiconductor substrate and comprises in addition to performing a masked amorphization on a DSB-like substrate only in first lateral regions of the surface layer, and a solid-phase epitaxial regrowth of the surface layer in only the first lateral regions so as to establish their (100)-orientation. Subsequently, a cover layer on the surface layer is fabricated, followed by fabricating isolation regions, which laterally separate (1 1θ)-oriented first lateral regions and (100)-oriented second lateral regions from each other. Then the cover layer is removed in a selective manner with respect to the isolation regions so as to uncover the surface layer in the first and second lateral regions and a refilling of the first and second lateral regions between the isolation regions is performed using epitaxy. | 06-02-2011 |