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| 20090075027 | MANUFACTURING PROCESS AND STRUCTURE OF A THERMALLY ENHANCED PACKAGE - A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrate. Then, a prepreg and a heat dissipating metal layer are provided, and the heat dissipating metal layer is disposed on a first surface of the prepreg and a second surface of the prepreg faces toward the chip. Finally, the prepreg covers the chip by laminating the prepreg and the substrate. | 03-19-2009 |
| 20090087947 | FLIP CHIP PACKAGE PROCESS - A flip chip package process is provided. First, a substrate strip including at least one substrate is provided. Next, at least one chip is disposed on the substrate, and the chip is electrically connected to the substrate. Then, a stencil having at least one opening and an air slot hole is disposed on an upper surface of the substrate strip, an air gap is formed between the stencil and the substrate strip, the air gap connects the opening and the air slot hole, and the chip is located in the opening. Finally, a liquid compound is formed into the opening of the stencil to encapsulate the chip, and a vacuum process is performed through the air slot hole and the air gap, so as to prevent the air inside the opening from being encapsulated by the liquid compound to become voids. | 04-02-2009 |
| 20120032341 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a substrate, a semiconductor element, a package body and a conductive part. The substrate has an electrical contact. The semiconductor element is disposed on the substrate. The package body covers the semiconductor element and defines a through hole from which the electrical contact is exposed. Wherein, the package body includes a resin body and a plurality of fiber layers. The fiber layers are disposed in the resin body and define a plurality of fiber apertures which is arranged as an array. The conductive part is electrically connected to the substrate through the through hole. | 02-09-2012 |
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| 20090203160 | SYSTEM FOR DISPLAYING IMAGES INCLUDING THIN FILM TRANSISTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A system for displaying images. The system comprises a thin film transistor (TFT) device comprising a substrate comprising a driving circuit region and a pixel region. First and second active layers are disposed on the substrate in the driving circuit region and in the pixel region, respectively. The first active layer has a grain size greater than that of the second active layer. Two gate structures are disposed on the first and second active layers, respectively, in which each gate structure comprises a stack of a gate dielectric layer and a gate layer. A reflector is disposed on the substrate under the first active layer and insulated from the first active layer. A method for fabricating a system for displaying images including the TFT device is also disclosed. | 08-13-2009 |
| 20090206344 | System for displaying images - A system for displaying images is disclosed. The system includes a self-emitting display device including an array substrate having a pixel region. A light-emitting diode is disposed on the array substrate of the pixel region. First and second driving thin film transistors are electrically connected to a light-emitting diode. The first driving thin film transistor includes a first gate and an active layer stacked on the array substrate of the pixel region and the second driving thin film transistor includes the active layer and a second gate thereon. The first gate is coupled to a first voltage and the second gate is coupled to a second voltage different from the first voltage during the same frame. | 08-20-2009 |
| 20090206737 | Organic electroluminescent device and fabrication method thereof - The invention discloses an organic electroluminescent device includes a substrate. The substrate includes a first control area and a second control area, a polysilicon active layer disposed on the first control area, and a first conductivity type source/drain area disposed in the polysilicon active layer. A first dielectric layer is disposed on the polysilicon active layer serving as a first gate dielectric layer, a first gate and a second gate is disposed on the polysilicon active layer and the second control area, respectively, wherein the first gate and the first conductivity type source/drain area constitute a first conductivity type thin film transistor serving as a switch element. A second dielectric layer disposed on the first gate and the second gate serves as a second gate dielectric layer, a micro-crystal silicon active layer disposed over the second gate. | 08-20-2009 |
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| 20120119606 | MOTOR STATOR AND ASSEMBLING METHOD THEREOF - A motor stator includes a stator unit and an auxiliary induction unit. The stator unit includes a circuit substrate, and a plurality of induction coils embedded within the circuit substrate. The auxiliary induction unit includes an insulating member, a magnetic conductor, and at least one coil winding assembly. The coil winding assembly includes a conductive rod and an auxiliary coil. The rod has an insert rod section extending through the magnetic conductor, the insulating member, and the circuit substrate, and a wound rod section permitting the auxiliary coil to be wound thereon, such that the auxiliary coil is disposed outwardly of the magnetic conductor. During assembly, the induction coil assembly is mounted to the magnetic conductor, and the insulating member is superposed on the circuit substrate. Subsequently, the rod is inserted through the insulating member and into the circuit substrate. | 05-17-2012 |
| 20120119607 | MOTOR STATOR - A motor stator includes an insulating frame having a plurality of projecting rods, an induction unit, and a plurality of conductive members. The induction unit includes an induction circuit board, a plurality of induction coils embedded within the induction circuit board, and a plurality of coil windings wound respectively on the projecting rods. The conductive members extend through the insulating frame and the induction circuit board for establishing an electrical connection between each of the induction coils and a corresponding one of the coil windings. The turn numbers of the coil windings are not limited by the area and thickness of the induction circuit board, and can be increased. Alternatively, the coil windings may be positioned to increase the magnetic pole slot number when energized. As such, a driving force of the motor stator can be increased. | 05-17-2012 |
| 20120119608 | MOTOR STATOR - A motor stator includes a stator unit and at least one auxiliary unit. The stator unit includes a circuit substrate, and a plurality of spaced-apart induction coils embedded within the circuit substrate. The auxiliary unit includes an auxiliary coil attached to and disposed outwardly of the circuit substrate. | 05-17-2012 |
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| 20090115959 | Repair Structure and Method for Liquid Crystal Display - A data line repair structure for a liquid crystal display panel is disclosed. The data line repair structure includes a first repair line parallel to the scan line and crossing a first end of the data line; a fourth repair line formed in an oblique line area of the liquid crystal panel, coupled to the first repair line; a second repair line parallel to the data line, coupled to the gate driving chip and the fourth repair line; a third repair line parallel to the scan line, coupled to the second repair line and separated from a second end of the data line; and a floating line connected between the third repair line and the second end of the data line when the data line has a broken point. | 05-07-2009 |
| 20100225840 | GROUNDING STRUCTURE - A grounding structure for a display device is provided. The grounding structure includes a substrate, a first connecting pad, a second connecting pad, a connecting structure and a grounding line. The first and second connecting pads are disposed on the substrate. The connecting structure electrically connects the first and second connecting pads. The first grounding line is disposed on the substrate, and has a length larger than two thirds of the projected length of the connecting structure on the surface of the substrate. | 09-09-2010 |
| 20100259714 | ARRAY SUBSTRATE FOR FFS TYPE LCD PANEL AND METHOD FOR MANUFACTURING THE SAME - An array substrate for FFS type LCD panel includes a transparent substrate, gate lines, a gate insulating layer, data lines, pixel electrodes, a passivation layer and a common electrode. The gate lines are disposed on the transparent substrate. The gate insulating layer is disposed on the transparent substrate and covers the gate lines. The data lines are disposed on the gate insulating layer. The pixel electrodes are disposed on the gate insulating layer, wherein the pixel electrodes and the data lines are located on the same level. The passivation layer is disposed on the gate insulating layer and covers the pixel electrodes and the data lines. The common electrode is disposed on the passivation layer. | 10-14-2010 |
| 20110248943 | Touch Panel - A touch panel is provided. The touch panel having a pixel area and a sensing area includes a first substrate and an opposite second substrate. A press sensing spacer is disposed on the sensing area of the first substrate. A press sensing stage is disposed on the sensing area of the second substrate, corresponding to the press sensing spacer. An alignment layer is disposed over the second substrate, covering the press sensing stage and the pixel area of the second substrate. In an embodiment, the height of the press sensing stage is greater than the height from the surface of the second substrate at the pixel area to the bottom of the alignment layer by at least 0.05 μm. | 10-13-2011 |
| 20120021663 | REPAIR STRUCTURE AND METHOD FOR LIQUID CRYSTAL DISPLAY - A data line repair structure for a liquid crystal display panel is disclosed. The data line repair structure includes a first repair line parallel to the scan line and crossing a first end of the data line; a fourth repair line formed in an oblique line area of the liquid crystal panel, coupled to the first repair line; a second repair line parallel to the data line, coupled to the gate driving chip and the fourth repair line; a third repair line parallel to the scan line, coupled to the second repair line and separated from a second end of the data line; and a floating line connected between the third repair line and the second end of the data line when the data line has a broken point. | 01-26-2012 |
| 20120127121 | IN CELL TOUCH PANEL - Embodiments of the present invention employ resistance compensation to broaden voltage reading range of readout lines connected to a processing chip of an in cell touch panel. The resolution of the in cell touch panel is increased under the condition that the number of pins of the processing chip is not increased or is unchanged. | 05-24-2012 |
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| 20110291742 | OUTPUT BUFFER WITH PROCESS AND TEMPERATURE COMPENSATION - An output buffer with process and temperature compensation comprises an enable terminal, a clock generator, a PMOS threshold voltage detector, an NMOS threshold voltage detector, a first comparator, a second comparator, a first compensation code generator, a second compensation code generator and an output buffer stage, wherein the output buffer stage has an output stage, the output buffer stage means for controlling a drive current generated by the output stage, wherein the output stage has a first voltage output terminal, and the modulated drive current is capable of compensating slew rate of the first voltage output terminal. | 12-01-2011 |
| 20110298498 | CORNER DETECTOR - A corner detector comprises a PMOS threshold voltage detector and an NMOS threshold voltage detector, the PMOS threshold voltage detector is composed of a first clock terminal, a first CMOS inverter, a first capacitor, a PMOS threshold voltage function generator and a first voltage output terminal, wherein the PMOS threshold voltage function generator is electrically connected to the first capacitor and applied to generate a first formula of voltage signal as a function of threshold voltage, the NMOS threshold voltage detector is composed of a second clock terminal, a second CMOS inverter, a second capacitor, an NMOS threshold voltage function generator and a second voltage output terminal, wherein the NMOS threshold voltage function generator is electrically connected to the second capacitor and applied to generate a second formula of voltage signal as a function of threshold voltage. | 12-08-2011 |
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| 20090185759 | METHOD FOR SYNTHESIZING IMAGE WITH MULTI-VIEW IMAGES - A method for synthesizing an image with multi-view images includes inputting multiple images, wherein each of the reference images is corresponding to a reference viewing-angle for photographing; synthesizing an image corresponding to a viewpoint and an intended viewing-angle; segmenting the intended synthesized image to obtain a plurality of meshes and a plurality of vertices of the meshes. Each of the vertices and the viewpoint respectively establish a viewing-angle, and the method further includes searching a plurality of neighbouring images among the reference images referring to the viewing-angle. If at least one of the neighbouring images falls within an adjacent region of the vertex, a first mode is adopted without interpolation to synthesize the intended synthesized image; when none of the neighbouring images falls within the adjacent region of the vertex, a second mode is adopted, where a weighting-based interpolation mechanism is used for synthesizing the intended synthesized image. | 07-23-2009 |
| 20090207179 | PARALLEL PROCESSING METHOD FOR SYNTHESIZING AN IMAGE WITH MULTI-VIEW IMAGES - A parallel processing method for synthesizing multi-view images is provided, which may parallel process at least a potion of the following steps. First, multiple reference images are input, wherein each reference image is correspondingly taken from a reference viewing angle. Next, an intended synthesized image corresponding to a viewpoint and an intended viewing angle is determined. Next, the intended synthesized image is divided to obtain multiple meshes and multiple vertices of the meshes, wherein the vertices are divided into several vertex groups, and each vertex and the viewpoint form a view direction. Next, the view direction is referenced to find several near-by images from the reference images for synthesizing an image of a novel viewing angle. After the foregoing actions are totally or partially processed according to the parallel processing mechanism, separate results are combined for use in a next processing stage. | 08-20-2009 |
| 20100014781 | Example-Based Two-Dimensional to Three-Dimensional Image Conversion Method, Computer Readable Medium Therefor, and System - An example-based 2D to 3D image conversion method, a computer readable medium therefor, and a system are provided. The embodiments are based on an image database with depth information or with which depth information can be generated. With respect to a 2D image to be converted into 3D content, a matched background image is found from the database. In addition, graph-based segmentation and comparison techniques are employed to detect the foreground of the 2D image so that the relative depth map can be generated from the foreground and background information. Therefore, the 3D content can be provided with the 2D image plus the depth information. Thus, users can rapidly obtain the 3D content from the 2D image automatically and the rendering of the 3D content can be achieved. | 01-21-2010 |
| 20100188584 | DEPTH CALCULATING METHOD FOR TWO DIMENSIONAL VIDEO AND APPARATUS THEREOF - A depth calculating method is provided for calculating corresponding depth data in response to frame data, which includes macroblocks. The depth calculating method includes the following steps. First, a type of video is decided according to a video content. A motion vector is obtained from decompressed video information and is modified according to a shot change detection and camera motion data. Then, multiple pieces of macroblock motion parallax data respectively corresponding to the macroblocks are found according to motion vector data of the modified macroblocks. Thereafter, the depth data corresponding to the frame data is calculated according to the pieces of macroblock motion parallax data, variance data, contrast data and texture gradient data. | 07-29-2010 |
| 20110128282 | Method for Generating the Depth of a Stereo Image - A method for generating image depth of a stereo image is provided. The method includes the following steps. Firstly, a stereo image is received. Next, a number of paths with greater gradient are searched in the stereo image. Then, the image depths of a number of first pixels in the paths are generated. After that, the image depths of a number of second pixels not in the paths are generated according to the image depths of the first pixels. | 06-02-2011 |
| 20110157311 | Method and System for Rendering Multi-View Image - A method and a system for rendering a multi-view image are provided. The method for rendering the multi-view image includes the following steps. An image capturing unit provides an original image and depth information thereof. Multiple threads of one processing unit perform a pixel rendering process and a hole filling process on at least one row of pixels of the original image according to the depth information by way of parallel processing to render at least one new-view image. View-angles of the at least one new-view image and the original image are different. Each of the threads performs a view interlacing process on at least one pixel of the original image and the at least one new-view image by way of parallel processing to render the multi-view image. | 06-30-2011 |
| 20110157597 | SWEPT SOURCE OPTICAL COHERENCE TOMOGRAPHY (SS-OCT) SYSTEM AND METHOD FOR PROCESSING OPTICAL IMAGING DATA - A method for processing optical imaging data is provided. The method includes performing a phase error calibration procedure, performing a data acquisition procedure, and performing an imaging computation & analysis procedure. A reference clock signal and an A-scan signal are both received by a data acquisition unit during the phase error calibration procedure while only the A-scan signal is received by the data acquisition unit during the data acquisition procedure. A SS-OCT system for performing the above-mentioned method is provided also. Furthermore, a SS-OCT system having synchronization processing unit therein is provided. | 06-30-2011 |
| 20110158512 | Method and System for Developing New-View Image - A method and a system for developing a new-view image from an original image with a corresponding depth map is provided. The original image has a plurality of original pixels and the new-view image has at least a new-view pixel. The method for developing the new-view image comprises the following steps. According to a corresponding depth value of each original pixel, a corresponding position of each original pixel corresponding to the new-view pixel is estimated. An occupancy proportion of each original pixel occupying the new-view pixel is estimated according to the corresponding position of each original pixel. An estimated color of an estimated partial pixel of the new-view pixel is initially obtained according to the occupancy proportion of one selected original pixel. The estimated partial pixel is updated according to the occupancy proportions and estimated occlusion proportion of the other selected original pixels one by one. | 06-30-2011 |
| 20110216065 | Method and System for Rendering Multi-View Image - A method and a system for rendering a multi-view image are provided. The method for rendering a multi-view image executed by a computer includes the following steps. A plurality of single-view images whose view-angles are different from each other are provided using the computer. A resolution resizing process is performed using the computer on the single-view images to obtain at least a portion of the pixels of a plurality of new-resolution images. A view interlace process is performed using the computer on the at least a portion of the pixels of the new-resolution images to result in a multi-view image. | 09-08-2011 |
| 20120044244 | Method for Image Processing and an Apparatus Thereof - An image processing method is provided. Firstly, input data including a number of original data are received. Next, the original data are converted into a number of converted emulation voltage signals. Then, at least a simulation circuit model including at least a spatial data node, at least a diffusion node and at least a connection device is established, wherein, the at least a connection device is coupled to a part or all of the at least a spatial data node and the at least a diffusion node. Afterwards, a part or all of the converted emulation voltage signals are supplied to the diffusion node to achieve voltage diffusion among the spatial data nodes and the diffusion nodes via the connection device, so that at least a diffused emulation voltage signal is obtained on the diffusion nodes. After that, processed image data are generated according to the diffused emulation voltage signals. | 02-23-2012 |
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| 20090006807 | METHOD FOR MEMORY ADDRESS ARRANGEMENT - A method for memory address arrangement is provided. Data of different Y coordinates is moved to operation units divided by different X coordinates, or data of different X coordinates is moved to operation units divided by different Y coordinates, so as to realize the function of simultaneously longitudinally and laterally reading and writing a plurality of batches of data, thereby preventing the limitation of only longitudinally or laterally reading and writing a plurality of batches of data. | 01-01-2009 |
| 20090254687 | ELECTRONIC DEVICE FOR CONTENTION DETECTION OF BIDIRECTIONAL BUS AND RELATED METHOD - An electronic device of detecting contention of a bidirectional bus for avoiding failing to drive a bidirectional bus due to bus contention includes: an output terminal, an input terminal and a data output unit, a timing comparing controller and a comparing unit. The output terminal is coupled to the bidirectional bus and used for outputting a data output signal to the bidirectional bus. The input terminal is coupled to the output terminal and the bidirectional bus and used for receiving a data reception signal from the bidirectional bus. The data output unit is used for providing the data output signal. The timing comparing controller is used for generating a timing comparison signal according to the data output signal. The comparing unit is used for comparing the data reception signal with the data output signal according to the timing comparison signal to determine a contention state of the bidirectional bus. | 10-08-2009 |
| 20100164998 | DRIVING METHOD AND DISPLAY DEVICE CAPABLE OF ENHANCING IMAGE BRIGHTNESS AND REDUCING IMAGE DISTORTION - A driving method for a display device provides a first input pixel data corresponding to a pixel, and generates a second input pixel data by multiplying the first input pixel data by a predetermined rate. Next, an output pixel data corresponding to the second input pixel data is obtained from a predetermined gamma curve. When receiving the first input pixel data, the output pixel data is used for driving a display panel, and the second input pixel data is used for driving a backlight module of the display panel, | 07-01-2010 |
| 20100295874 | GAMMA VOLTAGE GENERATION DEVICE FOR A FLAT PANEL DISPLAY - A gamma voltage generation device for a flat panel display includes a first voltage dividing circuit coupled between a high voltage and a low voltage, for generating a plurality of primary voltages, a plurality of primary selectors coupled to the first voltage dividing circuit, each of the plurality of primary selectors for selecting a primary voltage from the plurality of primary voltages according to an original digital value, a second voltage dividing circuit coupled to the plurality of primary voltages, for generating a plurality of secondary voltages, and a plurality of secondary selectors coupled to the second voltage dividing circuit, each of the plurality of secondary selectors for selecting a secondary voltage to be a reference grayscale voltage of a gamma curve from a predetermined number of secondary voltages of the plurality of secondary voltages according to a target digital value. | 11-25-2010 |
| 20110292022 | POWER CONVERTING APPARATUS AND POWER CONVERTING METHOD - A power converting apparatus including a power converting unit and a control unit is provided. The power converting unit receives an input voltage and generates an output voltage for a display driving unit according to a control signal. The control unit provides the control signal to the power converting unit, wherein the control unit adjusts the duty cycle or the frequency of the control signal according to an image signal. In addition, a power converting method is also provided. | 12-01-2011 |
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| 20090130467 | TRANSFER COMPONENT AND LASER-ASSISTED TRANSFER SYSTEM USING THE SAME - A transfer component and a laser-assisted transfer system using the same are provided. The laser-assisted transfer system comprises: a multimode laser source; a beam transformer; a scanner module; and a transfer component. The beam transformer is capable of transforming a multimode laser beam generated from the multimode laser source into a rectangular beam and then feeding the rectangular beam into the scanner module to form a large-area scanning laser beam. The transfer component comprises a conductive thin film and an insulating thin film. The conductive thin film receives a scanning laser beam from the scanner module and is ablated while the ablation of the conductive thin film is transferred onto the insulating thin film. In an exemplary embodiment, the transfer component comprising a metal thin film and an organic thin film is used for enabling the system to perform large-area pattern transfer with high efficiency. | 05-21-2009 |
| 20090135863 | PROGRAMMABLE LASER DEVICE AND METHOD FOR CONTROLLING THE SAME - A programmable laser trigger device and the method for controlling the same are disclosed. The programmable laser trigger device comprises: an external signal module and a command executing module. The external signal module is capable of interfacing the inputs and outputs of waveform command and signals. The command executing module further comprises: a waveform command memory, for storing the waveform command; a waveform command decoder; a waveform generator; and a buffer memory, acting as a waveform trigger parameter buffer between the waveform command decoder and the waveform generator; wherein the waveform command decoder accesses the waveform command stored in the memory for pre-decoding an executing code while generating a sequence of waveform trigger parameters to be stored in the buffer memory, which provides the waveform generator with the sequence of waveform trigger parameters to be transformed into a pulse-width modulation (PWM) pulse train. With the aforesaid device and method, not only unequal pulse outputs can be generated with good flexibility for matching the needs of various manufacturing processes, but also through the instructions to an external feedback signal from the waveform command, the laser pulses outputted therefrom can be modulated in real time in response to the external feedback signal. | 05-28-2009 |
| 20090139297 | CALIBRATION STRIP AND THE LASER CALIBRATION SYSTEM USING THEREOF - A calibration strip and a laser calibration system using thereof are disclosed. The calibration strip is comprised of: a substrate; and a light impermissible layer, having a calibration pattern formed thereon while being formed on the substrate. The light impermissible layer is an opaque layer, being formed on the surface of the substrate by coating, electroplating or adhering. The substrate, manufactured by the principle for enabling the color or brightness of the substrate to have high contrast comparing with those of the light impermissible layer, can be a structure of a layer of transparent material and a light source; a layer of transparent material and a backlight source; or a metal film having a reflective layer formed thereon. Since, in the laser calibration system, the calibration strip with the calibration pattern is imaged by an imaging device and then the captured image is send to a processing unit where it is analyzed, the time-consuming and inaccurate off-line manual calibration is no longer required and the laser calibration system can be adapted for various lasers regardless of their spectra. | 06-04-2009 |
| 20100112889 | METHODS FOR FORMING GAS BARRIERS ON ELCTRONIC DEVICES - A method for forming gas barriers on electronic devices is provided. The fabrication method includes: providing a first substrate having at least one electronic device thereon; providing a second substrate and forming a gas barrier over the second substrate; disposing the second substrate over the first substrate, wherein the gas barrier faces the electronic device; providing an electromagnetic wave light source over the second substrate; and irradiating the second substrate by the electromagnetic wave light source to transfer the gas barrier to the electronic device and cover the electronic device. | 05-06-2010 |
| 20110128979 | LASER SCANNING DEVICE AND METHOD USING THE SAME - A laser scanning device and a method using the same are provided. The laser scanning device includes a laser output unit, a shape rotation unit, a scanning unit and a control unit. The laser output unit is used to output a laser beam. The shape rotation unit is disposed on a propagation path of the laser beam for rotating a spot of the laser beam by a predetermined angle. The scanning unit receives the laser beam whose spot has been rotated by the predetermined angle to scan a work piece set on a carrier unit. The control unit is set between the shape rotation unit and the scanning unit for generating the predetermined angle based on a scanning position of the scanning unit. | 06-02-2011 |
| 20120097833 | LASER SCANNING DEVICE - A laser scanning device includes a laser output unit, a scanner, a light splitting unit, an imaging compensation unit, a detection unit, and a control unit. A scanning focusing unit included in the scanner focuses a laser beam emitted by the laser output unit to scan an object. A visible light beam received by the canning focusing unit is reflected by the light splitting unit and is incident into the imaging compensation unit. Next, the detection unit receives the visible light beam passing through the imaging compensation unit, and outputs a detection signal. The control unit adjusts the detection signal according to the wavelength of the visible light beam, the wavelength of the laser beam, the scanning focusing unit, and the imaging compensation unit. Therefore, the laser scanning device may compensate the aberration and the dispersion caused when the visible light beam passes through the scanning focusing unit. | 04-26-2012 |
| 20120097834 | LASER SCANNING DEVICE - A laser scanning device includes a laser output unit, a scanner, a light splitting unit, an imaging compensation unit, a detection unit, and a control unit. A scanning focusing unit included in the scanner focuses a laser beam emitted by the laser output unit to scan an object. A visible light beam received by the canning focusing unit is reflected by the light splitting unit and is incident into the imaging compensation unit. Next, the detection unit receives the visible light beam passing through the imaging compensation unit, and outputs a detection signal. The control unit adjusts the detection signal according to the wavelength of the visible light beam, the wavelength of the laser beam, the scanning focusing unit, and the imaging compensation unit. Therefore, the laser scanning device may compensate the aberration and the dispersion caused when the visible light beam passes through the scanning focusing unit. | 04-26-2012 |
| 20120125901 | APPARATUS AND SYSTEM FOR IMPROVING DEPTH OF FOCUS - The present invention provides an apparatus and a system for improving depth of focus (DOF), wherein an optical lens for optical processing is actuated to vibrate whereby the DOF of the optical processing is increased due to the variation of focal point. In the embodiment of the present invention, an actuator is coupled to the optical lens for providing vibration energy wherein the optical lens is actuated by the vibration energy so as to vibrate on an optical axis thereof so as to increase the DOF during the optical processing, thereby improving the quality and efficiency of optical processing. | 05-24-2012 |
| 20120125902 | ABSORBING METHOD AND APPARATUS FOR REAR SIDE LASER PROCESS - An absorbing method and apparatus for rear side laser process is disclosed. A conductive plate contacts or separates above a flexible substrate which is deposited a conductive film therebelow. A power source electrically connects the conductive plate and the conductive film, or only the conductive plate. After the power source provides voltages, a Coulomb electrostatic force is produced between the conductive plate and the conductive film, so as to absorb the flexible substrate and the conductive film. A light source is disposed above the conductive plate and emits a laser beam which in series passes through the conductive plate and the flexible substrate, and then focuses on rear side of the conductive film to process. Therefore, it is able to avoid the flexible substrate bent or drooping, and improve yield rate. | 05-24-2012 |
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| 20090060006 | RECEIVER DETECTING SIGNALS BASED ON SPECTRUM CHARACTERISTIC AND DETECTING METHOD THEREOF - A receiver for receiving a target signal complying with a specific communication specification comprising a specific spectrum characteristic includes a detecting module for detecting a packet of an input signal, a transforming unit for transforming the packet from a time domain to a frequency domain to derive a spectrum characteristic of the input signal, and a determining unit for determining whether the input signal is the target signal according to the spectrum characteristic of the input signal. Therefore, the proposed receiver is able to reduce packet miss rate and false alarm rate while robust to a severe channel condition, and achieve fast and accurate signal quality detection. | 03-05-2009 |
| 20090207925 | Wireless communication system, OFDM communication apparatus and method thereof - A wireless communication system adapted for the IEEE 802.11 or IEEE 802.16 standard comprises a radio frequency (RF) receiver, an analog-to-digital converter (ADC), and an OFDM communication apparatus. The RF receiver receives a radio signal. The ADC converts the radio signal to a digital signal. The OFDM communication apparatus comprises a digital filter, a notch filter, a fast Fourier transform (FFT) processor, and a detection element. The digital filter processes the digital signal to generate a processed digital signal. The notch filter filters out interference of the processed signal to generate a notched signal according to a filter band. The FFT processor performs an FFT process on the notched signal to generate an FFT signal according to the processed digital signal. The detection element generates the filter band of the notch filter according to the FFT signal. | 08-20-2009 |
| 20090262688 | RATE ADAPTATION METHODS FOR WIRELESS COMMUNICATION APPARATUS, AND WIRELESS COMMUNICATION APPARATUS FOR PERFORMING WIRELESS COMMUNICATION WITH RATE ADAPTATION - A rate adaptation method for a wireless communication apparatus includes: determining whether to use a first mode or a second mode according to at least one estimation value, where the first mode and the second mode correspond to different values of an overall data rate of the wireless communication apparatus. A wireless communication apparatus for performing wireless communication with rate adaptation includes: a processing circuit; and a wireless receiver and a wireless transmitter, both coupled to the processing circuit. The processing circuit determines at least one estimation value regarding communication quality of the wireless communication apparatus, and further determines whether to use a first mode or a second mode according to the estimation value, where the first mode and the second mode correspond to different values of an overall data rate of the wireless communication apparatus. | 10-22-2009 |
| 20110134746 | METHOD OF REDUCING INTERFERENCE BETWEEN TWO COMMUNICATION SYSTEMS OPERATING IN ADJACENT FREQUENCY BANDS - A method of reducing interference between two communication systems operating in adjacent frequency bands and coexisting in a communication device is provided, and the two communication systems are a first communication system using TDD and a second communication system which is content-based. The method includes deciding whether to perform an arbitration procedure on a downlink subframe of the first communication system according to a CINR of the first communication system and a RSSI of the second communication system; deciding whether to perform the arbitration procedure on an uplink subframe of the first communication system according to a transmit power of the first communication system and a RSSI value of the second communication system; and when deciding to perform the arbitration procedure on the downlink or uplink subframe, further deciding whether to send a specific packet to request one or more stations not to send packets to the second communication system. | 06-09-2011 |
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| 20100099229 | METHOD FOR FORMING A THIN FILM RESISTOR - A method for forming a thin film resistor includes providing a substrate having a transistor region and a thin film resistor region defined thereon, sequentially forming a dielectric layer, a metal layer and a first hard mask layer on the substrate, patterning the first hard mask layer to form at least a thin film resistor pattern in the thin film resistor region, sequentially forming a polysilicon layer and a second hard mask layer on the substrate, patterning the second hard mask layer to form at least a gate pattern in the transistor region, and performing an etching process to form a gate and a thin film resistor respectively in the transistor region and the thin film resistor region. | 04-22-2010 |
| 20100148263 | SEMICONDUCTOR DEVICE STRUCTURE AND FABRICATING METHOD THEREOF - A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a second dielectric layer, and a semiconductor layer sequentially stacked on the substrate. The first gate structure is disposed on the substrate within the MOS transistor region. The first gate structure includes the first dielectric layer, the metal layer, and the semiconductor layer sequentially stacked on the substrate. | 06-17-2010 |
| 20100271750 | CAPACITOR STRUCTURE - A capacitor structure is provided. The capacitor structure comprises a plurality of parallel conductive line levels and a plurality of vias. Each conductive line level comprises first conductive lines parallel to each other and second conductive lines parallel to each other. Also, the first conductive lines on different conductive line levels are aligned to each other and the second conductive lines on different conductive line levels are aligned to each other so as to form first conductive line co-planes and second conductive line co-planes. The vias are located on the conductive line co-planes and between the conductive line levels for connecting the conductive lines on the neighboring conductive line levels. The vias, on a height level of each of the conductive line co-planes, are arranged only on one of the neighboring conductive line co-planes. | 10-28-2010 |
| 20100320540 | SEMICONDUCTOR DEVICE STRUCTURE AND FABRICATING METHOD THEREOF - A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a second dielectric layer, and a semiconductor layer sequentially stacked on the substrate. The first gate structure is disposed on the substrate within the MOS transistor region. The first gate structure includes the first dielectric layer, the metal layer, and the semiconductor layer sequentially stacked on the substrate. | 12-23-2010 |
| 20110292565 | CAPACITOR STRUCTURE - A capacitor structure includes a plurality of conductive line levels located over the substrate. Each of the conductive line levels includes a first conductive line and a second conductive line. The first conductive lines in the conductive line levels form a first conductive line co-plane and the second conductive lines in the conductive line levels form a second conductive line co-plane. A first conductive end is electrically connected to the first conductive lines on the conductive line levels. A second conductive end is electrically connected to the second conductive lines on the conductive line levels. A plurality of vias are located between the neighboring conductive line levels and placed on only one of the first and second conductive line co-planes on a same level. | 12-01-2011 |
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| 20090157782 | RANDOM NUMBER GENERATOR AND RANDOM NUMBER GENERATING METHOD THEREOF - A random number generator and a random number generating method thereof are provided. The random number generator includes a signal generating unit and a sampling unit. The signal generating unit is adapted for memorizing a status of a noise generated during a transient of an output signal of an output buffer, and accordingly generating a frequency conversion signal which changes according to time and ambient factors. The sampling unit is coupled to the signal generating unit for receiving the frequency conversion signal, and sampling the frequency conversion signal according to a sampling clock pulse, so as to obtain a plurality of sets of unpredictable random number codes. | 06-18-2009 |
| 20100066458 | OSCILLATOR AND DRIVING CIRCUIT AND OSCILLATION METHOD THEREOF - An oscillator, a driving circuit and an oscillation method are provided. The driving circuit and a crystal are coupled in parallel to generate a clock signal. The driving circuit includes a buffer unit and a control unit. The buffer unit is coupled in parallel to the crystal, and used to amplify an oscillation signal outputted from the crystal to generate the clock signal. The control unit is coupled to the buffer unit, and used to generate a control signal to the buffer unit. The control unit determines a voltage level of the control signal by detecting whether the clock signal or the oscillation signal satisfies an oscillation condition of the crystal, so as to control a gain value of the buffer unit. Therefore, noise of different frequency bands loaded into the clock signal can be avoided. | 03-18-2010 |
| 20110148475 | DRIVING CIRCUIT OF INPUT/OUTPUT INTERFACE - A driving circuit of an input/output (I/O) interface is provided. The driving circuit includes a main output stage and an enhancing unit. The main output stage receives at least one driving signal and outputs an output signal corresponding to an input signal accordingly. The enhancing unit is coupled to the main output stage. The enhancing unit receives and detects the level of the output signal so as to drive the output force of the main output stage in a first output level or a second output level, wherein the first output level is higher than the second output level. | 06-23-2011 |
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| 20100181574 | THIN FILM TRANSISTOR DEVICES WITH DIFFERENT ELECTRICAL CHARACTERISTICS AND METHOD FOR FABRICATING THE SAME - A system for displaying images. The system includes a thin film transistor (TFT) device including a first insulating layer covering a first region and a second region of a substrate. A first polysilicon active layer is disposed in the first region and between the substrate and the first insulating layer. A second polysilicon active layer is disposed on the first insulating layer in the second region. A polysilicon gate layer is disposed above the first polysilicon active layer. A second insulating layer covers the polysilicon gate layer and the second polysilicon active layer. A metal gate layer is disposed above the second polysilicon active layer. A method for fabricating the system for displaying images including the TFT device is also disclosed. | 07-22-2010 |
| 20100252833 | THIN FILM TRANSISTOR DEVICES HAVING TRANSISTORS WITH DIFFERENT ELECTRICAL CHARACTERISTICS AND METHOD FOR FABRICATING THE SAME - A system for displaying images is provided. The system includes a thin film transistor (TFT) device comprising a substrate having a pixel region, a driving thin film transistor and a switching thin film transistor. The driving thin film transistor and the switching thin film transistor are disposed on the substrate and in the pixel region. The driving thin film transistor includes a polysilicon active layer and the switching thin film transistor includes an amorphous silicon active layer. A method for fabricating the system for displaying images including the TFT device is also disclosed. | 10-07-2010 |
| 20100270541 | SYSTEM FOR DISPLAY IMAGES AND FABRICATION METHOD THEREOF - A system for displaying images including a display panel and a fabrication method thereof are provided. The display panel includes a substrate having a first, second and third areas, a first patterned semiconductor layer disposed over the first area of the substrate, a first insulating layer covering the first patterned semiconductor layer and the first, the second and the third areas of the substrate, a second patterned semiconductor layer disposed on the first insulating layer of the first and the third areas respectively, a second insulating layer covering the second patterned semiconductor layer and the first insulating layer, and a patterned conductive layer disposed on the second insulating layer to form a first thin-film transistor at the first area and a second thin-film transistor at the third area. | 10-28-2010 |
| 20100271349 | THIN FILM TRANSISTOR DEVICES FOR OLED DISPLAYS AND METHOD FOR FABRICATING THE SAME - A system for displaying images. The system includes a thin film transistor (TFT) device including a first gate layer disposed on a first region of a substrate and covered by a first insulating layer. A first polysilicon active layer is disposed on the first insulating layer and a second polysilicon layer is disposed on a second region of the substrate. A second insulating layer covers both of the first and second polysilicon gate layers. Second and third gate layers are respectively disposed on the second insulating layer above the first and second polysilicon active layers. A method for fabricating a system for displaying images including the TFT device is also disclosed. | 10-28-2010 |
| 20110284851 | SYSTEM FOR DISPLAYING IMAGES - A system for displaying images includes a multi-gate thin film transistor (TFT) device including an active layer, first and second gate structures, and first and second light-shielding layers. The active layer is disposed on a substrate in a pixel region. The first and second gate structures are disposed on the active layer. The first and second light-shielding layers are disposed between the substrate and the active layer. The active layer includes first and second source/drain regions and first and second channel regions. The first light-shielding layer corresponds to a first lightly doped region and laterally extends under at least a portion of the first channel region. The second light-shielding layer corresponds to the second lightly doped region and laterally extends under at least a portion of the second channel region. | 11-24-2011 |
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| 20110300047 | METHOD FOR RECYCLING SILICON - A method for recycling silicon, comprises a filtrating step, providing a siliceous mortar containing silicon carbide, silicon and a buffer, and further filtering out the buffer form the siliceous mortar to obtain a siliceous slurry; a removing step, heating the siliceous slurry till the buffer has evaporated to obtain a mixture of silicon and silicon carbide; a stirring step, placing the mixture of silicon and silicon carbide in a liquid-substrate followed by stirring and incubating for a while to obtain a sedimentation of the mixture of silicon and silicon carbide and a suspension containing the liquid-substrate and silicon; and a purifying step, filter off the liquid-substrate in the suspension, and silicon powders are obtained. | 12-08-2011 |
| 20110300048 | METHOD FOR RECYCLING SILICON CARBIDE - A method for recycling silicon carbide, comprises a filtrating step, providing a siliceous mortar with silicon carbide, silicon and a buffer, and further filtering out the buffer form the siliceous mortar to obtain a siliceous slurry; a first removing step, heating the siliceous slurry to evaporate the buffer and obtain a mixture of silicon and silicon carbide; a dissolving step, placing the mixture of silicon and silicon carbide in an alkaline solution to dissolve the silicon from the mixture of silicon and silicon carbide into the alkaline solution; and a second removing step, completely removing the alkaline solution containing dissolved silicon, in order to obtain purified silicon carbide. | 12-08-2011 |
| 20120020853 | METHOD OF MANUFACTURING ALUMINA BY RECYCLING NICKEL-ALUMINUM - A method of manufacturing alumina by recycling nickel-aluminum comprises a step of “soaking,” by soaking a purified mineral of nickel-aluminum into an alkaline buffer followed by keeping at an environment of 1 ATM to obtain a rough solution of aluminate; a step of “filtration,” by filtering out a purified mineral of nickel and cobalt from the rough solution of aluminate to obtain a solution of aluminate; a step of “purification,” by adding a de-impurity reagent into the solution of aluminate to remove the impurity of vanadates, molybdates and silicates from the solution of aluminate, in order to obtain a purified solution of aluminate; a step of “sedimentation,” by precipitating out aluminum hydroxide from the purified solution of aluminate; and a step of “calcination,” by calcining the aluminum hydroxide, finally to obtain alumina. | 01-26-2012 |
