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Liu, Hsin-Chu
Chang-Wei Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100297817 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A method for manufacturing a thin film transistor (TFT) is disclosed. The method is achieved by forming and defining a source and a drain of a thin film transistor through two lithographic processes cycles so that the channel length (L) of the thin film transistor can be reduced to 1.5 to 4.0 μm. Besides, the I | 11-25-2010 |
Chen Lung Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110151927 | PORTABLE ELECTRONIC DEVICE, SERIAL TRANSMISSION INTERFACE OF PORTABLE ELECTRONIC DEVICE AND DATA TRANSMISSION METHOD THEREOF - The present invention provides a serial transmission interface of a portable electronic device. The portable electronic device includes a control module, a display module and an image sensing module. The serial transmission interface includes a first line group coupled to between the control module and the image sensing module, and includes a second line group coupled to between the control module, the display module and the image sensing module; wherein when the control module sets the image sensing module to a master mode through the first line group, the image sensing module directly transmits captured image data to the display module through the second line group. The present invention further provides a portable electronic device and a data transmission method of the serial transmission interface of a portable electronic device. | 06-23-2011 |
Chia-Lung Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090041045 | SYSTEM AND METHOD FOR PROVIDING MULTICAST/BROADCAST SERVICES IN A WIRELESS NETWORK - A method for allocating a multicast connection identifier (MCID) to a new multicast/broadcast service (MBS) provided in a wireless network including a plurality of base stations. The method includes: calculating, for a new MBS zone and existing MBS zones, coverage area ratios each based on information regarding the new MBS zone and one of the existing MBS zones, the new MBS zone including a first group of base stations, the one of the existing MBS zones including a second group of base stations; and allocating an MCID to the new MBS based the coverage area ratios; wherein the first group of base stations include ones of the plurality of base stations to transmit data relating to the new MBS, and the second group of base stations include ones of the plurality of base stations to transmit data relating to at least one existing MBS. | 02-12-2009 |
Chih-Che Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110241060 | Glass sealing package and manufacturing method thereof - Disclosed herein are a glass sealing package and a manufacturing method thereof. The glass sealing package includes a first glass substrate, a second glass substrate and a frit. The coefficient of thermal expansion of the frit lies between that of the two glass substrates. A light emitting element on the first glass substrate is situated in a sealed room formed among the two substrates and the frit. The method includes the steps of proving a first and a second glass substrate, dispensing a frit on the second glass substrate, pre-sintering the frit, assembling the two substrates, and sealing the frit to join the two substrates. | 10-06-2011 |
| 20110241541 | Display Panel Package Structure and Fabricating Method Thereof - A display panel package structure is disclosed, which includes a first substrate, a metal wire layer formed on the first substrate, an insulating layer formed on the metal wire layer, a second substrate, a frit formed on an edge of the second substrate for sealing the first substrate and the second substrate, and a conductive layer formed between the frit and the insulating layer corresponding to the frit for conducting a heat when the frit is heated. | 10-06-2011 |
Chin-Wei Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110091006 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals to plural gate lines. Each shift register stage includes a pull-up unit, an input unit for receiving an input signal, an energy-store unit for providing a driving control voltage in response to the input signal, a discharging unit, a couple unit and a pull-down unit. The pull-up unit pulls up a first gate signal in response to the driving control voltage. The discharging unit performs a discharging operation for pulling down the driving control voltage. The couple unit is utilized for coupling the energy-store unit with a succeeding shift register circuit stage so that the falling edge of a second gate signal generated by the succeeding shift register stage is capable of shifting down the driving control voltage. The pull-down unit pulls down the first gate signal in response to the second gate signal. | 04-21-2011 |
Chung Wei Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080309866 | Display Panel with Photo-Curable Sealant and Manufacture Method Thereof - A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure. | 12-18-2008 |
| 20110025940 | DISPLAY PANEL AND METHOD FOR NARROWING EDGES AND INCREASING EDGE STRENGTH THEREOF - An edge narrowing method for a display panel is disclosed. The display panel includes a first substrate, a second substrate, a sealant and a light-shielding area. The sealant is disposed between the first substrate and the second substrate. The light-shielding area is disposed between the first substrate and the sealant. The method includes the steps of providing the display panel, a grinding apparatus and a polishing apparatus; tilting the display panel so that the first substrate and a grinding member of the grinding apparatus have a first grinding angle therebetween; grinding the first substrate and the light-shielding area with the grinding apparatus while the display panel is tilted at the first grinding angle, thereby forming a first grinding end surface; stopping grinding of the first substrate and the light-shielding area when the width of the light-shielding area is between 0.35 and 1 mm; and polishing the first grinding end surface with the polishing apparatus to form a first end surface. | 02-03-2011 |
| 20110117804 | Display Panel with Photo-Curable Sealant and Manufacture Method Thereof - A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure. | 05-19-2011 |
Chun-Tiao Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090085703 | INDUCTOR AND MANUFACTURE METHOD THEREOF - An inductor comprises a coil, a non-ferrite layer, two electrodes, a first ferrite layer, and a second ferrite layer, where the coil is encapsulated by the non-ferrite layer having a first surface and a second surface opposite to the first surface, two electrodes coupled to the coil are respectively extended out from the non-ferrite layer for connecting a module, and the first ferrite layer and the second ferrite layer are respectively arranged adjacent to the first surface and the second surface of the non-ferrite layer. | 04-02-2009 |
Chun Ting Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100192108 | METHOD FOR RECOGNIZING GESTURES ON LIQUID CRYSTAL DISPLAY APPARATUS WITH TOUCH INPUT FUNCTION - One aspect of the present invention discloses a method for detecting gestures on a liquid crystal display apparatus with touch input functions is disclosed, wherein the liquid crystal display apparatus includes a display region and a button region. The method comprises the steps of checking whether an object touches a first region of the liquid crystal display apparatus, checking whether the object slides into a second region of the liquid crystal display apparatus after touching the first region, and sending a gesture signal to perform a predetermined function if the object slides between the display region and button region. | 07-29-2010 |
| 20110169787 | Display Device and Display Driving Method - An exemplary display device includes multiple pixels, first through third gate lines and a data line. The pixels include first through third pixels. The first through third gate lines respectively are electrically coupled with the first through third pixels and for deciding whether to enable the first through third pixels. The first pixel is electrically coupled to the data line to receive a display data provided by the data line. The second pixel is electrically coupled to the first pixel to receive a display data provided by the data line through the first pixel. The third pixel is electrically coupled to the second pixel to receive a display data provided by the data line through both the first pixel and the second pixel. A display driving method adapted to be implemented in the display device also is provided. | 07-14-2011 |
| 20110173533 | Touch Operation Method and Operation Method of Electronic Device - A touch operation method and an operation method of an electronic device are provided. The touch operation method comprises judging whether an await-selection object displayed on a touch screen is touched; outputting a floating menu corresponding to an attribute of the await-selection object when a touch time period of touching the await-selection object lasts for a first predetermined time period; judging whether one of a plurality of menu fields in the floating menu is selected, and performing a first instruction corresponding to the selected menu field when one of the menu fields in the floating menu is selected; and performing a second instruction corresponding to the selected menu field when a touch time period of selecting the selected menu field lasts for a second predetermined time period. | 07-14-2011 |
Chun-Yen Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110041020 | SHIFT REGISTER CIRCUIT - A shift register circuit for providing plural scan signals and plural emission signals includes a plurality of shift register stages. Each shift register stage includes a scan signal generation module and an emission signal generation module. The scan signal generation module is utilized for generating a first scan signal and a second scan signal according to a first clock and a second clock having a phase opposite to the first clock. The first and second scan signals have pulses opposite to each other. The pulse width of the first scan signal is substantially twice that of the first clock. The emission signal generation module is utilized for generating an emission signal according to a third clock and a fourth clock having a phase opposite to the third clock. The pulse width of the emission signal is substantially identical to that of the third clock. | 02-17-2011 |
| 20110090137 | PIXEL CIRCUIT AND PIXEL DRIVING METHOD - An exemplary pixel circuit includes an OLED, a storage capacitor, a driving transistor and first through fourth switching transistors. The driving transistor is for driving the OLED at a predetermined brightness. The first source/drain electrode of the driving transistor is coupled to a terminal of the storage capacitor, the second source/drain electrode is coupled to the OLED, and the gate electrode is coupled to receive a data voltage through the first switching transistor. Gate-on voltages of the first and second switching transistors are in opposite phases to each other, and the first and second switching transistors are controlled by the same control signal. Likewise, gate-on voltages of the third and fourth switching transistors are in opposite phases to each other, and the third and fourth switching transistors are controlled by the same control signal. A pixel driving method is also disclosed. | 04-21-2011 |
Chu-Yu Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100015763 | RESCUE STRUCTURE AND METHOD FOR LASER WELDING - A rescue structure to repair an open wire includes a first metal layer having at least a rescue line, an isolation layer formed on the first metal layer, and a second metal layer formed on the isolation layer. The second metal layer has at least a signal line crossing the rescue line to form an enlarged intersection node. The intersection node is particularly arranged far from the side where the rescue line is used for signal transmission. | 01-21-2010 |
Da-Wei Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100271762 | SHIELDING DEVICE AND DISPLAY DEVICE HAVING THE SAME - A shielding device provides a housing, a lid and a connection hole, and the shielding device is fireproof, insulating, and easy for wire assembly. The housing is disposed on an electronic device and surrounds the electronic device. The housing has at least one opening corresponding to a connector of the electronic device. The perimeter of the lid is connected to the perimeter of the opening, so that the lid can cover the opening to shield the connector. The connection hole is disposed on at least one of the perimeter of the opening and the perimeter of the lid. When the lid covers the opening of the housing, at least one connecting wire of the electronic device can extend outwardly through the shielding device via the connection hole. | 10-28-2010 |
Geng-Yu Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100109979 | STEREOSCOPIC DISPLAY DEVICE AND STEREOSCOPIC IMAGE DISPLAYING METHOD - A stereoscopic display device includes a display panel, and a light modulator. The display panel provides a first display information and a second display information alternately by scanning. The light modulator is disposed on the side of a display surface of the display panel and receives the first display information and the second display information. The light modulator provides a first modulating mode and a second modulating mode alternately by scanning synchronously with the display panel. The first modulating mode corresponds to the first display information, and renders the first display information having a first polarization state; the second modulating mode corresponds to the second display information, and renders the second display information having a second polarization state. | 05-06-2010 |
Hsiang Sheng Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090109440 | Optical Sensor and Operating Method Thereof - The present invention discloses an optical sensor. The optical sensor comprises a sensor for sensing a reflected light, an image capture device coupling with the sensor for reading the reflected light and calculating an average light intensity of the reflected light, a controller coupling with the image capture device for outputting a control signal based on the average light intensity, a driver coupling with the controller for receiving the control signal to output a drive current based on the control signal, and a light source coupling with the driver for receiving the drive current to generate a light. | 04-30-2009 |
| 20090284298 | METHOD FOR AUTOMATICALLY ADJUSTING CLOCK FREQUENCY AND CLOCK FREQUENCY ADJUSTING CIRCUIT - A method for automatically adjusting the clock frequency for a USB interface including the steps of: generating a clock signal with an adjustable frequency; receiving a USB differential signal; counting the clock signal based on each frame time of the USB differential signal and obtaining a count value; and adjusting the frequency of the clock signal when the count value exceeds a predetermined count range. The present invention further provides a clock frequency adjusting circuit. | 11-19-2009 |
Hsiao-Chyang Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100116709 | VENTILATED FRONT-OPENING UNIFIED POD - An improved substrate transport pod for storing or transporting semiconductor wafer substrates during semiconductor wafer processing has a main body defined by a plurality of side panels. A substantial portion of at least one of the side panels being formed of a semi-permeable membrane allowing any corrosive gas molecules introduced to the interior of the pod to diffuse out of the transport pod through the semi-permeable membrane while preventing particulate contaminants from entering the transport pod. | 05-13-2010 |
I-Hsien Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090196040 | Light source module of projector - A light source module adapted to a projecting device including a light bulb, a fan, and an air tunnel structure is provided. The fan is located by the light bulb for cooling the light bulb. The air tunnel structure is located respective to the location of the light bulb, for removing the heat generated by the light bulb. The air tunnel structure has a curved inner wall, a plurality of fins, and a tank. The curved inner wall is located inside the air tunnel structure respective to the location of the light bulb. The fins are formed on the curved inner wall for blocking the fragments generated by the explosion of the light bulb. The tank is located by a side of the curved inner wall for carrying the fragments clashing the fins. | 08-06-2009 |
| 20110211171 | LIGHT SOURCE APPARATUS AND PROJECTION DEVICE - A light source apparatus adapted to a projection device having a casing and an optical engine base is provided. The light source apparatus includes a shell, a positioning element, a frame, and a light source. The shell is adapted to be disposed in the casing and lean against the optical engine base. The positioning element is assembled to the shell and has two positioning holes. The frame is disposed in the shell and has two positioning pins, wherein the two positioning pins are inserted into the two positioning holes respectively for positioning the frame with respect to the shell. The light source is fixed to the frame. A projection device is also provided. | 09-01-2011 |
I-Ming Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090289538 | LAMP MODULE - A lamp module suitable for a projector has an insulating base, a lamp, electrode lines, electrode terminals, electrode strips, conductive lines, an electrical connector and conductive terminals. The lamp is mounted on the insulating base. Each of the electrode lines has an end connected to the lamp. The electrode terminals are respectively connected to the other ends of the electrode lines. Each of the electrode strips has a first end and a second end, wherein the electrode terminals and the first ends are fastened on the insulating base, and the electrode terminals respectively contact the first ends. The electrical connector is connected to one ends of the conductive lines. The conductive terminals are respectively connected to another ends of the conductive lines. The conductive terminals and the second ends herein are fastened on the insulating base, and the conductive terminals respectively contact the second ends. | 11-26-2009 |
Jen-Shuo Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110083912 | Electromagnetic Whiteboard Eraser - An electromagnetic whiteboard eraser is disclosed, and particular an electromagnetic whiteboard eraser capable of erasing both of the writing written by ink and the writing inputted by electromagnetic induction simultaneously. The electromagnetic whiteboard eraser has an ink eraser for erasing the writing written by ink and a coil for emitting electromagnetic signals. An electromagnetic whiteboard defines an erasing area for erasing the writing inputted by electromagnetic induction by defining the position of the coil to be the center of the erasing area and defining the diameter or radius of the ink eraser to be the diameter or radius of the erasing area after the electromagnetic whiteboard induces the electromagnetic signals emitted by the coil. The coil is deposed on the place corresponding to the center of the ink eraser. Therefore, the erasing area and the ink eraser are matched together completely and the writing inputted by electromagnetic induction can be erased by the electromagnetic whiteboard eraser simultaneously when the writing written by ink is erased by the ink eraser. | 04-14-2011 |
| 20110214923 | LIGHT WEIGHT AND FULL PLANAR ELECTROMAGNETIC DIGITIZER - A light weight and full planar electromagnetic digitizer is disclosed. The electromagnetic digitizer comprises a upper board, a lower board, a circuit board and an antenna board and a cushion board. The circuit board has at least one electronic device to control the antenna board to transmit or receive electromagnetic signals and process received electromagnetic signals. The cushion board has at least one hole or cave to accommodate the electronic device. The circuit board, the antenna board and the cushion board are stacked between the upper board and the lower board. | 09-08-2011 |
Juita Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090219492 | DETECTING DEVICE - A detection device is mounted in a projector for detecting relations between an object and the projector. The detection device includes a detecting switch, a connector and a detecting circuit. When the object is placed into the detecting switch, the detecting switch is in an off state. When the object is withdrawn from the detecting switch, the detecting switch is in an on state. The connector is electrically connected to the detecting switch. The detecting circuit is electrically connected to the connector for activating the projector to be operated in a first mode in response to the off state of the detecting switch and activating the projector to be operated in a second mode in response to the on state of the detecting switch. The first mode and the second mode are associated with the temperature inside the projector. | 09-03-2009 |
Kang-Chung Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100135003 | Backlight Module and Liquid Crystal Display Module Using the Backlight Module - This present invention discloses a backlight module and a flat display device using the backlight module. The backlight module has a plastic base having a plastic plate and a plastic frame, wherein a light guide plate is disposed on the plastic plate. The plastic plate is light reflective and has a thickness ranging from 0.2 mm to 0.9 mm. The plastic plate is used to reflect light leaking from the light guide plate. The reflectivity of the plastic plate to the visible light with wavelength ranging from 410 nm to 780 nm ranges from 80% to 95%. | 06-03-2010 |
| 20100165658 | Light Guide Plate Having Lateral Optical Structures and Backlight Module Having the Light Guide Plate - The present invention discloses a light guide plate and a backlight module having the same. The light guide plate includes a light emitting surface, a light incident surface, a light reflecting surface, and a plurality of prisms disposed on the light reflecting surface. The disposition direction of the prisms can be parallel or perpendicular to the lengthwise direction of the light reflecting surface. An inclined angle may exist between the disposition direction of the prisms and the lengthwise of the light reflecting surface. The backlight module includes a light guide plate, a light source, and an optical film set, wherein the light source is disposed near the light incident surface. The optical film set partially covers the light emitting surface, wherein a distance exists between a vertex of the prism and an edge of the optical film set. | 07-01-2010 |
Keng-Ju Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090115930 | Backlight module and frame thereof - A backlight module and a frame thereof are provided, which comprises an outer frame, an elastic side frame, a connecting arm and a cantilever. Here, the elastic side frame is disposed on the at least one side of the outer frame. The connecting arm is connected to a surface of the elastic side frame. The cantilever is disposed on the connecting arm, and formed a first space with the elastic side frame. The frame of the backlight can protect optical films or panel and sustain optical films against higher stress. | 05-07-2009 |
| 20090168402 | Backlight Module - The present invention discloses a backlight module. The backlight module of the present invention includes a frame, a flexible circuit board, a light emitting unit, and a light guide plate. The frame has a bottom surface, an inner sidewall adjacent and perpendicular to the bottom surface, and a protrusion unit. Protrusion unit protrudes from the inner sidewall and is parallel to the bottom surface. The flexible circuit board is disposed beneath the protrusion unit and electrically connected to the light emitting unit. The light guide plate is disposed on the bottom surface and is adjacent to the light emitting unit. Furthermore, the protrusion unit is disposed at the corner of the two adjacent inner sidewalls of the frame, and a substrate presses the protrusion unit which further presses the flexible circuit board, and thus the flexible circuit board and the light emitting unit connected thereto can be fixed in the frame. | 07-02-2009 |
| 20100014015 | Backlight Module with Bended Reflector Sheet and Display Panel Device Using the Same - A backlight module and a display panel device using the same are provided. The backlight module includes a light source module, an open frame, and a reflector sheet. The open frame is disposed around the light source module and has a first free-end and a second free-end. A space interval exists between the first and second free-ends. The reflector sheet is disposed on a rear side of the light source module and has a body and a sidewall. The sidewall corresponds to the space interval between the first and second free-ends and extends over the light source module. The display panel further includes a liquid crystal display panel (LCD panel) on the light source module and a front frame which is disposed on the LCD panel enclosing a lateral side of the LCD panel. The sidewall of the reflector sheet extends between the lateral side of the LCD panel and the front frame to provide insulation. | 01-21-2010 |
Ken-Yu Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110157500 | STEREOSCOPIC DISPLAY DEVICE AND STEREOSCOPIC IMAGE DISPLAYING METHOD - An exemplary stereoscopic display device includes a backlight module, a display panel, and a polarizer panel. The backlight module provides a light source for the stereoscopic display device. The display panel is used for displaying a received image. The polarizer panel includes a plurality of polarizer elements. The states of the polarizer elements are switched by an ON/OFF operation for switching a polarization angle of the polarizer panel. The ON/OFF operation of the polarizer panel includes an enabled time interval and a disabled time interval. The polarizer elements provide two different polarization angles respectively in the enabled and disabled time intervals. The enabled time interval and the disabled time interval have different time lengths from each other. A stereoscopic image displaying method is also disclosed. | 06-30-2011 |
Kuang-Hsiang Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090179875 | Flat display and driving method thereof - A flat display includes a substrate, multiple data lines, multiple scan lines, a source driving unit and a gate driving unit. The substrate includes a pixel array. The data lines are electrically connected to the pixel array. The scan lines including p groups of scan lines are electrically connected to the pixel array, wherein p is a positive integer. Some of the scan lines in the same group are not adjacent to each other. The source driving unit is electrically connected to the data lines. The gate driving unit includes p shift register circuits respectively enabling the p groups of scan lines. In a first frame period, p groups of scan lines are enabled according to a first sequence of groups, and in a second frame period, p groups of scan lines are enabled according to a second sequence of groups which is different from the first sequence of groups. | 07-16-2009 |
| 20090206909 | BIDIRECTIONAL CONTROLLING DEVICE FOR INCREASING RESISTANCE OF ELEMENTS ON VOLTAGE STRESS - A bidirectional controlling device is utilized for receiving two input signals, which are respectively provided from a first input terminal and a second input terminal, and for respectively providing two output signals to a first output terminal and a second output terminal, by controlling a plurality of switch sets. | 08-20-2009 |
| 20100059758 | PIXEL STRUCTURE OF A DISPLAY PANEL - A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors. | 03-11-2010 |
| 20100238143 | HIGH-RELIABILITY GATE DRIVING CIRCUIT - A high-reliability gate driving circuit includes a plurality of odd shift register stages and a plurality of even shift register stages. Each odd shift register stage generates a corresponding gate signal furnished to a corresponding odd gate line according to a first clock and a second clock having a phase opposite to the first clock, and further functions to pull down a gate signal of at least one even gate line or at least one odd gate line different from the corresponding odd gate line. Each even shift register stage generates a corresponding gate signal furnished to a corresponding even gate line according to a third clock and a fourth clock having a phase opposite to the third clock, and further functions to pull down a gate signal of at least one odd gate line or at least one even gate line different from the corresponding even gate line. | 09-23-2010 |
| 20110080384 | Flat Panel Display with Circuit Protection Structure - A flat panel display with a circuit protection structure is provided. The flat panel display includes a substrate, an electrode array control circuit, a driving circuit, a display panel, and a protection unit. The substrate has a first surface. The electrode array control circuit is formed on the first surface. The driving circuit is formed on the first surface and on one side of the electrode array control circuit. The display panel including a plurality of display particles is disposed on the electrode array control circuit. The electrode array control circuit controls operations of the display particles. The protection unit is formed on one side of the display panel to cover the driving circuit. | 04-07-2011 |
Kuo-Chio Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110084391 | Reducing Device Mismatch by Adjusting Titanium Formation - An integrated circuit structure includes a semiconductor substrate; a first titanium layer over the semiconductor substrate, wherein the first titanium layer has a first thickness less than 130 Å; a first titanium nitride layer over and contacting the first titanium layer; and an aluminum-containing layer over and contacting the first titanium nitride layer. | 04-14-2011 |
Li-Ping Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090059142 | TRANSFLECTIVE LCD DEVICE - A transflective LCD device includes an array substrate and a color filter. The substrate includes a plurality gate lines, a plurality of common lines, and a plurality of data lines substantially crossing the gate lines to define a plurality of sub-pixel regions. Each sub-pixel region has a reflective area and a transmissive area. Two of the reflective area of two adjacent sub-pixel regions in the same column are juxtaposed to each other. The color filter has a plurality of sub-pixel regions respectively aligned with the sub-pixel regions of the array substrate. The color filter includes an insulating layer disposed on the reflective area of a respective sub-pixel region. An LC layer is disposed between the array substrate and the color filter. | 03-05-2009 |
| 20090115948 | Pixel Structure of Transflective Liquid Crystal Display Array Substrate and Method for Fabricating the Same - A pixel structure of a transflective liquid crystal display array substrate includes a first patterned conductive layer, a second patterned conductive layer and a transparent patterned conductive layer. The first patterned conductive layer is formed on a substrate and includes a first part coupled to a pixel electrode voltage. The second patterned conductive layer includes a first part coupled to a common electrode voltage. The transparent patterned conductive layer is coupled to the pixel electrode voltage. The first part of the second patterned conductive layer and the first part of the first patterned conductive layer form a first storage capacitor. The first part of the second patterned conductive layer and the transparent patterned conductive layer form a second storage capacitor. A method for fabricating the pixel structure of the transflective liquid crystal display array substrate is also disclosed. | 05-07-2009 |
| 20110242452 | TRANSFLECTIVE LCD DEVICE - A transflective LCD device includes an array substrate and a color filter. The substrate includes a plurality gate lines, a plurality of common lines, and a plurality of data lines substantially crossing the gate lines to define a plurality of sub-pixel regions. Each sub-pixel region has a reflective area and a transmissive area. Two of the reflective area of two adjacent sub-pixel regions in the same column are juxtaposed to each other. The color filter has a plurality of sub-pixel regions respectively aligned with the sub-pixel regions of the array substrate. The color filter includes an insulating layer disposed on the reflective area of a respective sub-pixel region. An LC layer is disposed between the array substrate and the color filter. | 10-06-2011 |
Louis Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080220565 | Design techniques for stacking identical memory dies - A semiconductor structure includes a first semiconductor die and a second semiconductor die identical to the first semiconductor die. The first semiconductor die includes a first identification circuit; and a first plurality of input/output (I/O) pads on the surface of the first semiconductor die. The second semiconductor die includes a second identification circuit, wherein the first and the second identification circuits are programmed differently from each other; and a second plurality of I/O pads on the surface of the second semiconductor die. Each of the first plurality of I/O pads is vertically aligned to and connected to one of the respective second plurality of I/O pads. The second semiconductor die is vertically aligned to and bonded on the first semiconductor die. | 09-11-2008 |
| 20080250182 | SIP (SYSTEM IN PACKAGE) DESIGN SYSTEMS AND METHODS - SiP design systems and methods. The system comprises a system partitioning module, a subsystem integration module, a physical design module, and an analysis module. The system partitioning module partitions a target system into subsystem partitions according to partition criteria. The subsystem integration module generates an architecture design and/or a cost estimation for the target system according to the subsystem partitions, at least one SiP platform, and IC geometry data. The physical design module generates a SiP physical design with physical routing for the target system according to the architecture design, the subsystem partitions, the SiP platform, and the IC geometry data. The analysis module performs a performance check within the subsystem partitions based on the SiP physical design and/or simulations of the target system. | 10-09-2008 |
Louis Chaochiuan Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090019409 | Method for Reducing Timing Libraries for Intra-Die Model in Statistical Static Timing Analysis - A method for performing statistical static timing analysis on an integrated circuit (IC) is disclosed, which comprises identifying a plurality of turned-on devices in the IC during a predetermined operation of the IC, choosing only the libraries of the plurality of turned-on devices, and calculating a time delay of the IC using only the chosen libraries, wherein the number of libraries used for the time delay calculation is reduced. | 01-15-2009 |
Louis Chao-Chiuan Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100199238 | Systematic Method for Variable Layout Shrink - A method for integrated circuit design includes providing a layout of an integrated circuit; determining key parameters of the integrated circuit; determining target values of the key parameters; and performing a first shrinkage of the layout using a first shrink percentage to generate a shrunk layout. The shrunk layout is evaluated by generating values of the key parameters from the shrunk layout. A portion of the values of the key parameters failing to meet respective ones of the target values is found. Guidelines for tuning manufacturing processes of the shrunk layout are provided, so that the portion of the values of the key parameters can meet the respective ones of the target values. | 08-05-2010 |
| 20100229137 | System and Method for Performance Modeling of Integrated Circuits - A system and method for performance modeling of integrated circuits is provided. A method for performing timing analysis on an integrated circuit is provided, the integrated circuit having a timing path. The method includes computing a number of non-common timing path elements in the timing path, assigning a timing de-rate factor to the timing path based on the number of non-common timing path elements, and computing a timing analysis on the integrated circuit using the assigned timing de-rate factor. | 09-09-2010 |
| 20100293514 | DESIGN-DRIVEN METAL CRITICAL DIMENSION (CD) BIASING - A method of designing an integrated circuit (“IC”) is provided that includes placing an IC design, where the IC design includes a first element, a second element, and a path coupling the first and second elements, and routing the IC design. Further, the method includes obtaining at least one of resistivity data and capacitance data related to the path, and obtaining timing data related to the path. The method also includes using at least one of the resistivity data, the capacitance data, and the timing data to determine a critical dimension (“CD”) bias to be applied to the path, and modifying the IC design, where modifying includes applying the CD bias to the path. | 11-18-2010 |
Pang-Hsuan Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080259635 | BACKLIGHT MODULE - A backlight module has a light guide plate and a light source. The light guide plate contains a top plane, a bottom plane opposite to the top plane, a light entrance plane positioned between the top plane and the bottom plane, and a widened edge plane opposite to the light entrance plane. The widened edge plane is slanted relative to the light entrance plane. | 10-23-2008 |
Pei-Ching Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110096298 | ILLUMINATION SYSTEM AND PROJECTION APPARATUS - An illumination system includes a chip package, a first dichroic film, a second dichroic film, and a third dichroic film. The first dichroic film, the second dichroic film, and the third dichroic film are not parallel to each other and do not cross each other. The chip package includes a first light-emitting chip capable of emitting a first light beam, a second light-emitting chip capable of emitting a second light beam, and a third light-emitting chip capable of emitting a third light beam. The first light-emitting chip, the second light-emitting chip, and the third light-emitting chip are arranged in a row. The first dichroic film reflects the first light beam and transmitting the second light beam, the second dichroic film reflects the second light beam, the first dichroic film and the second dichroic film transmit the third light beam, and the third dichroic film reflects the third light beam. | 04-28-2011 |
| 20110096299 | ILLUMINATION SYSTEM AND PROJECTION APPARATUS HAVING THE SAME - An illumination system includes a chip package, a first dichroic film, a second dichroic film, and a third dichroic film. The first dichroic film, the second dichroic film, and the third dichroic film are not parallel to each other and cross one another at an identical region. The chip package includes a first light-emitting chip capable of emitting a first light beam, a second light-emitting chip capable of emitting a second light beam, and a third light-emitting chip capable of emitting a third light beam. The first light-emitting chip, the second light-emitting chip, and the third light-emitting chip are arranged to form a delta arrangement. The first dichroic film is capable of reflecting the first light beam, and the second dichroic film is capable of reflecting the second light beam. The first dichroic film is capable of transmitting the third light beam, and the third dichroic film is capable of reflecting the third light beam. | 04-28-2011 |
Pin-Miao Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090213284 | Method for improving image sticking of liquid crystal displays - Improving image sticking of a liquid crystal display (LCD) including a plurality of pixels, each of which includes a first subpixel and a second subpixel, includes driving the first subpixels of the pixels with a first optimized common voltage, driving the second subpixels of the pixels with a second optimized common voltage, and driving the LCD with a panel voltage. The panel voltage is between the first and the second optimized common voltages. | 08-27-2009 |
| 20110080396 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 04-07-2011 |
| 20110115780 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 05-19-2011 |
Ruey-Hsin Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090001462 | Lateral Power MOSFET with High Breakdown Voltage and Low On-Resistance - A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring in the HVW and occupying a top portion of the HVW, wherein the field ring is of the first conductivity type; an insulation region over and in contact with the field ring and a portion of the HVW; a gate electrode partially over the insulation region; a drain region in the HVW, wherein the drain region is of the second conductivity type; and wherein the HVW horizontally extends further toward the drain region than the pre-HVW; and a source region adjacent to, and on an opposite side of the gate electrode than the drain region. | 01-01-2009 |
| 20090085101 | Lateral Power MOSFET with High Breakdown Voltage and Low On-Resistance - A semiconductor device with high breakdown voltage and low on-resistance is provided. An embodiment comprises a substrate having a buried layer in a portion of the top region of the substrate in order to extend the drift region. A layer is formed over the buried layer and the substrate, and high-voltage N-well and P-well regions are formed adjacent to each other. Field dielectrics are located over portions of the high-voltage N-wells and P-wells, and a gate dielectric and a gate conductor are formed over the channel region between the high-voltage P-well and the high-voltage N-well. Source and drain regions for the transistor are located in the high-voltage P-well and high-voltage N-well. Optionally, a P field ring is formed in the N-well region under the field dielectric. In another embodiment, a lateral power superjunction MOSFET with partition regions located in the high-voltage N-well is manufactured with an extended drift region. | 04-02-2009 |
| 20100203691 | High Voltage CMOS Devices - A transistor suitable for high-voltage applications is provided. The transistor is formed on a substrate having a deep well of a first conductivity type. A first well of the first conductivity type and a second well of a second conductivity type are formed such that they are not immediately adjacent each other. The well of the first conductivity type and the second conductivity type may be formed simultaneously as respective wells for low-voltage devices. In this manner, the high-voltage devices may be formed on the same wafer as low-voltage devices with fewer process steps, thereby reducing costs and process time. A doped isolation well may be formed adjacent the first well on an opposing side from the second well to provide further device isolation. | 08-12-2010 |
| 20110163376 | HIGH VOLTAGE DEVICES AND METHODS OF FORMING THE HIGH VOLTAGE DEVICES - A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type. | 07-07-2011 |
| 20110220995 | Semiconductor Device Having Multi-Thickness Gate Dielectric - A semiconductor device is provided that, in an embodiment, is in the form of a high voltage MOS (HVMOS) device. The device includes a semiconductor substrate and a gate structure formed on the semiconductor substrate. The gate structure includes a gate dielectric which has a first portion with a first thickness and a second portion with a second thickness. The second thickness is greater than the first thickness. A gate electrode is disposed on the first and second portion. In an embodiment, a drift region underlies the second portion of the gate dielectric. A method of fabricating the same is also provided. | 09-15-2011 |
Ru-Gun Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100199253 | Routing Method for Double Patterning Design - A method of designing a double patterning mask set includes dividing a chip into a grid comprising grid cells; and laying out a metal layer of the chip. In substantially each of the grid cells, all left-boundary patterns of the metal layer are assigned with a first one of a first indicator and a second indicator, and all right-boundary patterns of the metal layer are assigned with a second one of the first indicator and the second indicator. Starting from one of the grid cells in a row, indicator changes are propagated throughout the row. All patterns in the grid cells are transferred to the double patterning mask set, with all patterns assigned with the first indicator transferred to a first mask of the double patterning mask set, and all patterns assigned with the second indicator transferred to a second mask of the double patterning mask set. | 08-05-2010 |
| 20100205577 | Design Methods for E-Beam Direct Write Lithography - A method of forming integrated circuits for a wafer includes providing an E-Beam direct write (EBDW) system. A grid is generated for the wafer, wherein the grid includes grid lines. An integrated circuit is laid out for the wafer, wherein substantially no sensitive features in the integrated circuit cross the grid lines of the grid. An EBDW is performed on the wafer using the EBDW system. | 08-12-2010 |
| 20110244378 | DEVICE AND METHOD FOR PROVIDING WAVELENGTH REDUCTION WITH A PHOTOMASK - Disclosed is a photomask having a wavelength-reducing material that may be used during photolithographic processing. In one example, the photomask includes a transparent substrate, an absorption layer having at least one opening, and a layer of wavelength-reducing material (WRM) placed into the opening. The thickness of the WRM may range from approximately a thickness of the absorption layer to approximately ten times the wavelength of light used during the photolithographic processing. In another example, the photomask includes at least one antireflection coating (ARC) layer. | 10-06-2011 |
Shih-Chang Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110248328 | STUCTURE FOR FLASH MEMORY CELLS - A semiconductor structure is provided. The semiconductor structure includes a first floating gate on the semiconductor substrate, the floating gate having a concave side surface; a first control gate on the first floating gate; a first spacer adjacent to the first control gate; a first word line adjacent a first side of the first floating gate with a first distance; and an erase gate adjacent a second side of the first floating gate with a second distance less than the first distance, the second side being opposite the first side. | 10-13-2011 |
Shih-Chian Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100053232 | Image Optimization Method for Liquid Crystal Display Device - The present invention provides an image optimization method for performing data update on pixel units in the pixel matrix of the liquid crystal displays. The pixel matrix includes at least a first row and a second row, wherein the first row and the second row respectively include a plurality of pixel units. In one frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a first sequence. In another frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a second sequence. | 03-04-2010 |
Shou-Lie Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090021665 | Active array substrate for flat panel display - An active array substrate for a flat panel display is disclosed. The active array substrate includes a substrate, a plurality of first conductive lines, a plurality of second conductive lines, a plurality of first repair lines, a plurality of second repair lines, a plurality of third repair lines. The substrate has a display area. The first repair lines cross and are electrically separated from the second conductive lines. The second repair lines cross and are electrically separated from the second conductive lines. Each of the third repair lines is in electrical connection respectively with one of the first repair lines and one of the second repair lines. The second conductive lines are divided into a plurality of second conductive line groups and each of the second conductive line groups respectively corresponds to one of the third repair lines. | 01-22-2009 |
Sung-Kao Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100053483 | LIQUID CRYSTAL DISPLAY PANEL AND PIXEL STRUCTURE THEREOF - A pixel structure includes at least a pixel electrode, and at least an aligning electrode. The pixel electrode, which has a central opening, is disposed on a substrate. The aligning electrode, which is disposed between the pixel electrode and substrate, includes an aligning part disposed under and corresponding to the central part of the pixel electrode. The aligning voltage applied to the aligning electrode is greater than the pixel voltage applied to the pixel electrode. | 03-04-2010 |
Tsu-Chun Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100027407 | TRANSCEIVER AND ECHO CANCELLATION METHOD - A transceiver and an echo cancellation method are disclosed. The echo cancellation method includes producing an echo cancellation signal according to a transmission signal; adjusting the amplitude, the delay time or a combination of the amplitude and the delay time of the echo cancellation signal according to an adjusting parameter; receiving an echo signal derived from the transmission signal and performing a subtraction operation on the echo signal by using the echo cancellation signal so as to obtain an echo residual; and producing the adjusting parameter according to the echo residual. The provided method can effectively reduce the interference caused by the echo signal. | 02-04-2010 |
| 20100029217 | TRANSCEIVER DEVICE AND POWER SAVING METHOD THEREOF - A transceiver device and a power saving method thereof are provided. The transceiver device includes an attenuation estimation module, a transmitter, and a control module. The attenuation estimation module is coupled to a transmission path for estimating an attenuation value caused when a signal passes through the transmission path. The transmitter is coupled to the transmission path, for outputting a transmission signal. The control module is coupled to the attenuation estimation module and the transmitter. When the attenuation value is smaller than a default value, the output power of the transmitter is adjusted to be lower. Thereby, the power consumption of the transceiver device is decreased. | 02-04-2010 |
| 20100048137 | ECHO CANCELLER AND ECHO CANCELLATION METHOD - An echo canceller and an echo cancellation method are provided. In the echo cancellation method, a transmitting data sequence is received, and M taps are provided accordingly. In addition, the M taps are received, and N taps are output according to an echo distribution information, in which the M and N are natural numbers, and M>N. Besides, the N taps are multiplied by N tap coefficients respectively to generate N products. Further, the N products are summed up to generate an echo cancellation signal. Thereby, the cost of the echo cancellation is decreased. | 02-25-2010 |
| 20100086011 | TRANSCEIVER APPARATUS, RECEIVER AND POWER SAVING METHOD THEREOF - A transceiver apparatus, a receiver and a power saving method thereof are provided. The receiver includes an analog-to-digital converter, an equalizer, a slicer, a delay unit, a decoder, a select unit and a control unit. The analog-to-digital converter transforms a received signal into a digital signal. The equalizer adjusts the digital signal to generate an equalized signal. The slicer receives and slices the equalized signal and generates a sliced signal. The delay unit delays the sliced signal. The decoder determines whether to decode the equalized signal or not according the control signal. The select unit selects one of the output of the delayed sliced signal and the output of the decoder to be an output signal according to a second control signal. The control unit determines whether to enable the control signal and the second control signal according to the state of the sliced signal and the output signal. | 04-08-2010 |
| 20100118984 | NETWORK TRANSMITTING APPARATUS AND POWER SAVING METHOD THEREOF - A network transmitting apparatus and a power saving method thereof are provided. The network transmitting apparatus includes a chip, a transformer, and a power regulating unit. The chip includes a detecting and controlling unit, an analog circuit, and a digital circuit. The detecting and controlling unit receives a received signal and detects the received signal and a state of the chip to generate a first control signal. The transformer has a first side coupled to the chip and a second side. The power regulating unit coupled to the detecting and controlling unit and a center tap of the first side of the transformer is used for receiving a voltage, generating a first regulated voltage according to the first control signal, and connecting the first regulated voltage to the center tap of the first side of the transformer, the analog circuit, and the digital circuit. | 05-13-2010 |
Tzu-Wei Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110157505 | LIQUID CRYSTAL DISPLAY DEVICE WITH TOUCH FUNCTION AND TOUCH PANEL - A touch panel includes multiple sensing units and each thereof includes a first transistor, a reference capacitor, a liquid crystal capacitor and a second transistor. ON/OFF states of the first transistor are determined by a potential provided by a corresponding scan line. The reference capacitor and the liquid crystal capacitor are coupled in series between another scan line adjacent to the corresponding scan line and a common potential. A capacitance value of the liquid crystal capacitor changes with a pressed degree of the sensing unit. ON/OFF states the second transistor are determined by a potential at a connection node between the reference capacitor and the liquid crystal capacitor. The first transistor transmits a first potential to the connection node when the first transistor is turned on, and the second transistor transmits a second potential different from the first potential to a readout line when the second transistor is turned on. | 06-30-2011 |
| 20110169772 | Touch Device, Display Substrate, Liquid Crystal Display and Operation Method for Photo Sensor - A touch device is disposed on a substrate having a plurality of gate lines. The touch device comprises a power line, a photo sensor and a readout line. The photo sensor is electrically coupled to the power line and two specific gate lines of the gate lines, and generated a different output signal according to irradiation with a different level. The readout line is electrically coupled to the photo sensor for outputting the output signal. The photo sensor comprises a readout switch and a photosensitive switch. The readout switch is electrically coupled to one of the two specific gate lines. The photosensitive switch is electrically coupled to another of the two specific gate lines and the power line. Signals in another of the two specific gate lines and the power line cooperate to determine whether the photosensitive switch is in an off state. | 07-14-2011 |
Tzu-Yi Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090009679 | Backlight Module - A backlight module includes a frame, an optical element, a bottom plate, a holder, and a light source. The optical elements are located on the frame and a space between the sidewall of the frame and the optical elements. The bottom plate located under the optical elements. The light source is on the holder inserted into the space, The holder is inserted into the space along the direction toward the bottom surface of the bottom plate, and is removed from the space along the opposing direction. | 01-08-2009 |
| 20090034177 | Supporting Assembly for a Liquid Crystal Display - A supporting assembly for a LCD includes a front bezel, a cover, a first fastener, a back bezel, a second fastener, a frame, a lighting carrier. The cover is extended from the front bezel. The first fastener is disposed on the cover. The back bezel is coupled to the front bezel and has an opening opposite the cover. The second fastener is disposed on the back bezel and fastened to the first fastener. The frame is disposed between the front bezel and the back bezel and has a carrier socket opposite the cover. The lighting carrier is plugged into the carrier socket. | 02-05-2009 |
| 20090052176 | Replacable Light Source for Light Source Module and Back Light Module - The present invention provides a light source module for using in a backlight module which includes a frame, a light source and a lid. The frame has two opposite side walls, and each of the side walls includes an inner side surface, a top surface and a cave. The cave has a first opening and a second opening connected with each other on the inner surface and the top surface respectively. Each of the inner surfaces is facing the other side wall, and the top surface intersects the inner surface with an angle. A light source has two opposite ends, and each of ends includes a positioning block. The positioning block engages with the cave through the second opening, and the light source extends along a first direction perpendicular to the inner surface, through the first opening and towards the opposite side wall of the frame. The lid covers the second opening and restricts the positioning block from moving relatively to the cave from the second opening. | 02-26-2009 |
| 20100238371 | Backlight Module - A backlight module includes a frame, an optical element, a bottom plate, a holder, and a light source. The optical elements are located on the frame and a space between the sidewall of the frame and the optical elements. The bottom plate located under the optical elements. The light source is on the holder inserted into the space, The holder is inserted into the space along the direction toward the bottom surface of the bottom plate, and is removed from the space along the opposing direction. | 09-23-2010 |
| 20110109832 | Supporting Assembly for a Liquid Crystal Display - A supporting assembly for a LCD includes a front bezel, a cover, a first fastener, a back bezel, a second fastener, a frame, a lighting carrier. The cover is extended from the front bezel. The first fastener is disposed on the cover. The back bezel is coupled to the front bezel and has an opening opposite the cover. The second fastener is disposed on the back bezel and fastened to the first fastener. The frame is disposed between the front bezel and the back bezel and has a carrier socket opposite the cover. The lighting carrier is plugged into the carrier socket. | 05-12-2011 |
Wan-Yi Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100013001 | METHOD FOR MANUFACTURING NON-VOLATILE MEMORY AND STRUCTURE THEREOF - A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer. | 01-21-2010 |
| 20100244033 | OPTICAL SENSOR, METHOD OF MAKING THE SAME, AND DISPLAY PANEL HAVING OPTICAL SENSOR - An optical sensor, method of making the same, and a display panel having an optical sensor. The optical sensor includes a first electrode, a second electrode, a photosensitive silicon-rich dielectric layer, and a first interfacial silicon-rich dielectric layer. The photosensitive silicon-rich dielectric layer is disposed between the first and second electrodes. The first interfacial silicon-rich dielectric layer is disposed between the first electrode and the photosensitive silicon-rich dielectric layer. | 09-30-2010 |
| 20100327289 | FLAT DISPLAY PANEL, UV SENSOR AND FABRICATION METHOD THEREOF - A UV sensor comprises a silicon-rich dielectric layer with a refractive index in a range of about 1.7 to about 2.5 for serving as the light sensing material of the UV sensor. The fabrication method of the UV sensor can be integrated with the fabrication process of semiconductor devices or flat display panels. | 12-30-2010 |
Wen-Pin Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110112678 | ADVANCED PROCESS CONTROL FOR NEW TAPEOUT PRODUCT - The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe. | 05-12-2011 |
Wo-Chung Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090040168 | LIQUID CRYSTAL DISPLAY WITH BLOCKING CIRCUITS - A gate driver of a liquid crystal display includes a plurality of cascaded gate-driving circuits for outputting a plurality of scanning signals. Each of the gate-driving circuits includes a shift register for outputting scanning signals according to the clock pulses and the scanning signal outputted by the former gate-driving circuit, and a blocking circuit for blocking the scanning signals a predetermined time period. Thus the scanning signals generated by adjacent gate-driving circuits do not overlap, and the image quality of the liquid crystal display can be improved. | 02-12-2009 |
Yu Chen Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090128760 | FLAT DISPLAY PANEL HAVING STRENGTH ENHANCING STRUCTURE - A flat display panel includes a first substrate, a second substrate opposite to the first substrate, a sealant disposed between the first and second substrates. The sealant, the edge of the inner surface of the first substrate, and the edge of the inner surface of the second substrate form a space, and the flat display panel further includes a protection layer disposed inside the space so as to reinforce the structural strength of the flat display panel. | 05-21-2009 |
| 20090258565 | Method for Manufacturing Display Panel within Substrates having Different Thickness - The present invention provides a method for manufacturing display panel with substrates having different thickness. The display panel manufacturing method includes assembling a first substrate and a second substrate, positioning the anti-etching layer on the outer surface of the first substrate and etching the substrates at the first etching process. Because the anti-etching layer is disposed on the first substrate, the first substrate is protected by the anti-etching layer from being etched or later etched. Simultaneously, the second substrate is etched to reduce its thickness in order to adjust the thickness difference between the first substrate and the second substrate. | 10-15-2009 |
| 20110025940 | DISPLAY PANEL AND METHOD FOR NARROWING EDGES AND INCREASING EDGE STRENGTH THEREOF - An edge narrowing method for a display panel is disclosed. The display panel includes a first substrate, a second substrate, a sealant and a light-shielding area. The sealant is disposed between the first substrate and the second substrate. The light-shielding area is disposed between the first substrate and the sealant. The method includes the steps of providing the display panel, a grinding apparatus and a polishing apparatus; tilting the display panel so that the first substrate and a grinding member of the grinding apparatus have a first grinding angle therebetween; grinding the first substrate and the light-shielding area with the grinding apparatus while the display panel is tilted at the first grinding angle, thereby forming a first grinding end surface; stopping grinding of the first substrate and the light-shielding area when the width of the light-shielding area is between 0.35 and 1 mm; and polishing the first grinding end surface with the polishing apparatus to form a first end surface. | 02-03-2011 |
Yu-Chuan Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090091950 | POWER CONVERTING CIRCUIT WITH OPEN LOAD PROTECTION FUNCTION - A power converting circuit with an open load protection function is electrically connected to a power supply providing a first voltage level, and outputs a second voltage level to drive a load. The power converting circuit includes a DC/DC converter and a rectifying element disposed between an output node and an input node of the DC/DC converter that forms a discharging loop with the DC/DC converter. The DC/DC converter receives the power, converts the first voltage level into the second voltage level and outputs the second voltage level to the load. The rectifying element is utilized to release a surge voltage produced by the DC/DC converter in an open load condition. | 04-09-2009 |
| 20090116153 | POWER CONVERSION SYSTEM AND OVER-LOAD PROTECTION DEVICE THEREOF - A power conversion system and over-load protection device thereof includes a first detection circuit, a charging/discharging circuit, and a second detection circuit. The discharging/charging circuit charges based on a feedback signal relative to output of the power conversion system. A switching-disabling control signal is produced based on the charge of the discharging/charging circuit, to disable the power conversion system. | 05-07-2009 |
| 20090147548 | CONTROL CIRCUIT FOR ADJUSTING LEADING EDGE BLANKING TIME AND POWER CONVERTING SYSTEM USING THE SAME CONTROL CIRCUIT - A control circuit for adjusting leading edge blanking time is disclosed. The control circuit is applied to a power converting system. The control circuit adjusts a leading edge blanking time according to a feedback signal relative to a load connected to the output terminal of the power converting system. An over-current protection mechanism of the power converting system is disabled within the leading edge blanking time. | 06-11-2009 |
| 20100026268 | CONTROL METHOD FOR ADJUSTING LEADING EDGE BLANKING TIME IN POWER CONVERTING SYSTEM - A control method for adjusting leading edge blanking time in a power converting system is disclosed. The control method includes: receiving a feedback signal relative to a load connected to an output terminal of the power converting system; determining the leading edge blanking time to be a first value if the feedback signal has a magnitude about a first voltage; and determining the leading edge blanking time to be a second value if the feedback signal has a magnitude about a second voltage, wherein the first value is smaller than the second value, and the first voltage is greater than the second voltage. | 02-04-2010 |
Yu-Jung Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090278779 | LCD DEVICE BASED ON DUAL SOURCE DRIVERS WITH DATA WRITING SYNCHRONOUS CONTROL MECHANISM AND RELATED DRIVING METHOD - An LCD device having dual source drivers and related driving method are disclosed for performing data signal driving operation by making use of a data writing synchronous control mechanism. The operation of the data writing synchronous control mechanism includes furnishing all image data signals to both the first and second source drivers, latching odd and even image data signals by the first and second source drivers respectively, performing a signal processing process on the odd image data signals for generating a first set of analog data signals by the first source driver, performing a signal processing process on the even image data signals for generating a second set of analog data signals by the second source driver, writing the first set of analog data signals into a plurality of first pixel units, and writing the second set of analog data signals into a plurality of second pixel units. | 11-12-2009 |
| 20110090196 | LIQUID CRYSTAL DISPLAY HAVING PIXEL DATA SELF-RETAINING FUNCTIONALITY AND OPERATION METHOD THEREOF - A liquid crystal display having pixel data self-retaining functionality includes a gate line for delivering a gate signal, a data line for delivering a data signal, a control unit for providing a first control signal and a second control signal, a data switch, a voltage-control inverter, a liquid crystal capacitor, and a pass transistor. The data switch is utilized for inputting the data signal to become a first data signal according to the gate signal. The voltage-control inverter is utilized for inverting the first data signal to generate a second data signal furnished to the liquid crystal capacitor according to the enable operation of the first control signal. The pass transistor is used for passing the second data signal to become the first data signal or for passing the first data signal to become the second data signal according to the second control signal. | 04-21-2011 |
Yung-Hsin Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090180052 | LIQUID CRYSTAL DISPLAY DEVICE AND BACK LIGHT UNIT THEREOF - A back light unit adapted to provide light to a liquid crystal display panel includes a housing, at least a light generator, and an optical filter. The light generator is disposed inside the housing for generating white light beams. The optical filter is disposed in an optical path of the white light beams between the light generator and the liquid crystal display panel for filtering the white light beams within a particular wavelength range of visible light. The hue of the white light beams before and after passing through the optical filter are the same. | 07-16-2009 |
Yun-I Liu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090273745 | Color filter and liquid crystal display panel using the same - A color filter including a substrate, a black matrix and a plurality of color filter films is provided. The black matrix is disposed on the substrate and the black matrix has a plurality of openings. The black matrix has a bottom surface contacting with the substrate and a top surface having an area equal to that of the bottom surface. Besides, a plurality of color filter films are disposed on the substrate exposed by the openings respectively and each of the color filter films has a flat top surface. In the above mentioned color filter, coincidence between the black matrix and the color filter films is excellent. | 11-05-2009 |
| 20100171910 | Display Device and Display Panel and Color Filter thereof - A display device and a display panel and a color filter thereof are provided. The color filter includes a transparent substrate, at least a red filter film, at least a green filter film, at least a plurality of blue filter film and at least a white filter film. The red filter films, the green filter films, the blue filter films and the white filter films are disposed on the transparent substrate. The blue filter films have a first largest transmittance when a light with first wavelength transmits it. The green filter films have a second largest transmittance when a light with second wavelength transmits it. The white filter films have a third largest transmittance when a light with third wavelength transmits it. The third largest transmittance is larger than the first largest transmittance and the second largest transmittance. The third wavelength is between the first wavelength and the second wavelength. Therefore, the images displayed by the display device with the color filter may have accurate color-level and high brightness. | 07-08-2010 |
| 20110157871 | Display Device and Manufacturing Method Thereof - A display device and a manufacturing method thereof are provided. The display device includes a backlight module and a color resist layer. The backlight module generates an output light, wherein the output light has an emitting spectrum function BL(λ) corresponding to a wave length λ. The color resist layer has a blue resist unit, a green resist unit, a red resist unit, and a white resist unit, respectively formed on the backlight module, for filtering the output light generated by the backlight module. The color resist layer has an index function S(λ). The index function S(λ) has an interval maximum value in the wave length between 480 nm and 580 nm, wherein the interval maximum value is between 1.1 and 1.2. The manufacturing method includes providing a backlight module to generate an output light; selecting a blue resist unit, a green resist unit, a red resist unit, and a white resist unit in accordance with an index function S(λ); and combining the blue resist unit, the green resist unit, the red resist unit, and the white resist unit together to form a color resist layer on the backlight module for filtering the output light emitted by the backlight module. | 06-30-2011 |
