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Ling-Wei Ke
Ling-Wei Ke, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100264993 | PLL WITH LOOP BANDWIDTH CALIBRATION CIRCUIT - A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU. | 10-21-2010 |
Ling-Wei Ke, Hsinchu County TW
| Patent application number | Description | Published |
|---|---|---|
| 20100073048 | PHASE LOCKED LOOP AND CALIBRATION METHOD - A phase locked loop (PLL) directly uses a charge pump and loop filter therein for fast and low-costly calibration. The PLL comprises a charge pump, a loop filter, a voltage comparator, a counting device, and a calibration device. The loop filter comprises a voltage storage device coupled to the charge pump for charging by the charge pump, wherein the voltage storage device comprises a variable impedance. The voltage comparator is coupled to a voltage reference and to the voltage storage device for comparing a voltage of the storage device and a voltage of the voltage reference. The counting device is coupled to the voltage comparator to measure the charge time required for the voltage of the voltage storage device to substantially equal to the voltage of the voltage reference. The calibration device adjusts the variable impedance to adjust the time measured by the counting device to a desired time. | 03-25-2010 |
| 20100244969 | TEMPERATURE COMPENSATED OSCILLATION CIRCUITS - A temperature compensated oscillation circuit capable of providing a stable frequency output over temperature is provided, in which an oscillator with a crystal resonator is arranged to generate an oscillation signal with an output frequency, and a temperature sensor provides a temperature compensation voltage of which a function is linear with respect to an ambient temperature of the oscillator. A first accumulation mode MOS varactor is coupled to the oscillator, and the first accumulation mode MOS varactor adjusts a capacitance thereof in response to the temperature compensation voltage, such that the coupled oscillator has a frequency compensation over temperature for the oscillation signal, wherein the frequency compensation substantially varies as an inverse function of a deviation of the crystal resonator over temperature when the ambient temperature is within a predetermined temperature range. | 09-30-2010 |
Ling-Wei Ke, Hsin-Chu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20080232443 | SIGNAL GENERATING APPARATUS - A signal generating apparatus for generating a synthesized signal according to an input signal is provided. The signal generating apparatus includes a phase-locked loop device and a control unit. The phase-locked loop device has a phase/frequency detector for generating a detected signal according to a reference oscillating signal and a feedback signal, a control signal generator for generating a control signal according to the detected signal, a voltage controlled oscillator for generating the synthesized signal according to the control signal, and a divider for dividing the synthesized signal according to a dividing factor to generate the feedback signal. The control unit is for controlling the control signal generator to adjust the control signal in a calibration mode to thereby adjust a frequency of the synthesized signal. The phase/frequency detector does not output the detected signal to the control signal generator in the calibration mode. | 09-25-2008 |
| 20080272811 | SIGNAL GENERATING APPARATUS AND METHOD THEREOF - A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode. | 11-06-2008 |
| 20090072911 | SIGNAL GENERATING APPARATUS AND METHOD THEREOF - A signal generating apparatus is disclosed. The signal generating apparatus includes a phase-locked loop device for generating a synthesized signal, wherein the phase-locked loop device includes a phase detector, a charge pump device, a filtering device, a controllable oscillator, and a switch device coupled to the controllable oscillator for selectively coupling the controllable oscillator to the filtering device or a tuning reference signal; a calibration controller generates a tuning reference signal and controls the switch device; and a first calibrator tunes the controllable oscillator into a predetermined sub-band according to a reference oscillating signal and a synthesized signal when the switch device couples the controllable oscillator to the tuning reference signal of the calibration controller. | 03-19-2009 |
| 20090080563 | SIGNAL GENERATING APPARATUS AND METHOD THEREOF - A signal generating apparatus is disclosed. The signal generating apparatus includes a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device. | 03-26-2009 |
Ling-Wei Ke, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20080272851 | LC voltage controlled oscillator with tunable capacitance unit - A tunable capacitance unit coupled between a pair of circuit nodes. The tunable capacitance unit comprises a tuning input supplying a tuning voltage, and first and second tuning capacitance units. Each of the tuning capacitance units comprises a pair of accumulation-mode MOS varactors with source/drains thereof coupled to the tuning input, a pair of blocking capacitors coupled to a respective gate of the accumulation-mode MOS varactors and to a respective one of the circuit nodes, and a pair of biasing resistors coupled to a respective gate of the accumulation-mode MOS varactors and to a respective bias terminal receiving a respective reference voltage. The reference voltages received by the first and second tuning capacitance units are symmetrical to a predetermined voltage. | 11-06-2008 |