Patent application number | Description | Published |
20090317447 | Biodegradable bone graft for orthopedic use - In the present invention, a biodegradable bone graft is disclosed, which includes: a scaffold made of a biodegradable material; and a collagen-embedding matrix portion which completely encompasses the scaffold. The above-mentioned bone graft can increase the micro-porosity of the scaffold to enable cells to grow adhesively thereon. Compared with the scaffold only, the above-mentioned bone graft has high hydrophilicity. Hence, the bone graft of the present invention can efficiently retain tissue fluid, cell growth factors, blood and/or bone marrow which are mixed with the bone graft beforehand to achieve osteoinduction. Furthermore, the collagen-embedding matrix portion can also serve as a carrier to encompass other bone graft materials and drug molecules. The present invention also relates to a method for manufacturing the above-mentioned bone graft. | 12-24-2009 |
20100098924 | Collagen membrane for medical use and method for manufacturing the same - The present invention relates to a method for manufacturing a collagen membrane, which comprises the following steps: preparing a collagen slurry; degassing the collagen slurry, and then forming collagen gel at a predetermined collagen concentration, ionic strength, pH value, and temperature; removing water in the collagen gel by an absorbent device to form a collagen mat; and flattening and drying the collagen mat under vacuum by a gel dryer. The present invention provides the collagen membranes manufactured by the above-mentioned method. Such membranes are of good biocompatibility, high tensile strength, hydrophilicity, flexibility and easy handling features. Hence, these membranes can function as medical material suitable for repair of tissue and wound healing. | 04-22-2010 |
20110280924 | Biodegradable filler for restoration of alveolar bones - A biodegradable filler for restoration of alveolar bones is disclosed, which includes: first cross-linked collagen fibers prepared from reacting Non-crosslinked collagen fibers with a cross-linking agent; and supporting particles which are biomedical ceramic particles, bioactive glass, or a combination thereof, and distributed among the first cross-linked collagen fibers. | 11-17-2011 |
Patent application number | Description | Published |
20100062591 | N2 BASED PLASMA TREATMENT AND ASH FOR HK METAL GATE PROTECTION - The present disclosure provides a method for making a semiconductor device. The method includes forming a first material layer on substrate; forming a patterned photoresist layer on the first material layer; applying an etching process to the first material layer using the patterned photoresist layer as a mask; and applying a nitrogen-containing plasma to the substrate to remove the patterned photoresist layer. | 03-11-2010 |
20100068861 | METHOD OF DEFINING GATE STRUCTURE HEIGHT FOR SEMICONDUCTOR DEVICES - Provided is a method of semiconductor fabrication including process steps allowing for defining and/or modifying a gate structure height during the fabrication process. The gate structure height may be modified (e.g., decreased) at one or more stages during the fabrication by etching a portion of a polysilicon layer included in the gate structure. The method includes forming a coating layer on the substrate and overlying the gate structure. The coating layer is etched back to expose a portion of the gate structure. The gate structure (e.g., polysilicon) is etched back to decrease the height of the gate structure. | 03-18-2010 |
20100068876 | METHODS OF FABRICATING HIGH-K METAL GATE DEVICES - Methods of fabricating semiconductor devices with high-k/metal gate features are disclosed. In some instances, methods of fabricating semiconductor devices with high-k/metal gate features are disclosed that prevent or reduce high-k/metal gate contamination of non-high-k/metal gate wafers and production tools. In some embodiments, the method comprises forming an interfacial layer over a semiconductor substrate on a front side of the substrate; forming a high-k dielectric layer and a capping layer over the interfacial layer; forming a metal layer over the high-k and capping layers; forming a polysilicon layer over the metal layer; and forming a dielectric layer over the semiconductor substrate on a back side of the substrate. | 03-18-2010 |
20100071719 | METHOD TO PRE-HEAT AND STABILIZE ETCHING CHAMBER CONDITION AND IMPROVE MEAN TIME BETWEEN CLEANING - A method for cleaning an etching chamber is disclosed. The method comprises providing an etching chamber; introducing a first gas comprising an inert gas into the etching chamber for a first period of time; and transporting a first wafer into the etching chamber after the first period of time, wherein the first wafer undergoes an etching process. | 03-25-2010 |
20110031562 | SEALING LAYER OF A FIELD EFFECT TRANSISTOR - An exemplary structure for a gate structure of a field effect transistor comprises a gate electrode; a gate insulator under the gate electrode having footing regions on opposing sides of the gate electrode; and a sealing layer on sidewalls of the gate structure, wherein a thickness of lower portion of the sealing layer overlying the footing regions is less than a thickness of upper portion of the sealing layer on sidewalls of the gate electrode, whereby the field effect transistor made has almost no recess in the substrate surface. | 02-10-2011 |
20120108046 | Patterning Methodology for Uniformity Control - The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patternable layer over a substrate. The method includes forming a first layer over the patternable layer. The method includes forming a second layer over the first layer. The second layer is substantially thinner than the first layer. The method includes patterning the second layer with a photoresist material through a first etching process to form a patterned second layer. The method includes patterning the first layer with the patterned second layer through a second etching process to form a patterned first layer. The first and second layers have substantially different etching rates during the second etching process. The method includes patterning the patternable layer with the patterned first layer through a third etching process. | 05-03-2012 |
20130221443 | FINFETS AND METHOD OF FABRICATING THE SAME - The disclosure relates to a fin field effect transistor (FinFET). An exemplary structure for a FinFET comprises a substrate comprising a major surface; a plurality of first trenches having a first width and extending downward from the substrate major surface to a first height, wherein a first space between adjacent first trenches defines a first fin; and a plurality of second trenches having a second width less than first width and extending downward from the substrate major surface to a second height greater than the first height, wherein a second space between adjacent second trenches defines a second fin. | 08-29-2013 |
20140134759 | METHOD OF FORMING A PATTERN - An embodiment of a method of forming a substrate pattern including forming a bottom layer and an overlying middle layer on the substrate. A photo resist pattern is formed on the middle layer. An etch coating layer is deposited on the photo resist pattern. The etch coating layer and the photo resist pattern are used as a masking element to pattern at least one of the middle layer and the bottom layer. The substrate is etched to form the substrate pattern using the at least one of the patterned middle layer and the patterned bottom layer as a masking element. The substrate pattern may be used as an element of an overlay measurement process. | 05-15-2014 |
20140242775 | METHOD OF FABRICATING FINFETS - The disclosure relates to a method of fabricating a semiconductor device including forming a patterned hardmask layer over a substrate comprising a major surface. The method further includes forming a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (ESC) temperature between about 90° C. to 120° C. in the substrate. The plurality of first trenches have a first width and extend downward from the substrate major surface to a first height, and the plurality of second trenches have a second width less than first width and extend downward from the substrate major surface to a second height greater than the first height. | 08-28-2014 |