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Lin, Hsin-Chu City

An-Pang Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080297694BACKLIGHT MODULE OF REDUCING LIGHT LEAKAGE FOR USE IN A LIQUID CRYSTAL DISPLAY DEVICE - A backlight module includes a frame, a plurality of light tubes disposed on the frame, an optical sheet, a first light tube fixing component disposed on a side of the frame, and a second light tube fixing component disposed on a bottom surface of the frame. The frame includes a plurality of holes defined on a bottom surface of the frame. The first light tube fixing component is used for fixing the plurality of light tubes on the frame. The first light tube fixing component includes light proof member and a light reflective component. The light proof member is used for blocking light from the plurality of light tubes. The light reflective component is used for reflecting light from the plurality of light tubes toward the optical sheet. The light proof member and the light reflective component are integrally formed. The second light tube includes a substrate plate, a plurality of supporting holders disposed on a first side of the substrate plate, and a plurality of engaging portions disposed on a second side opposite to the first side. Each engaging portion is made of light proof materials and corresponds to one of the plurality of holes. The substrate plate, the plurality of supporting holders, and the plurality of engaging portions are integrally formed.12-04-2008

Chia-Chi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20090187866Electrical Parameter Extraction for Integrated Circuit Design - A system, method, and computer readable medium for generating a parameterized and characterized pattern library for use in extracting parasitics from an integrated circuit design is provided. In an embodiment, a layout of an interconnect pattern is provided. A process simulation may be performed on the interconnect pattern. In a further embodiment, the interconnect pattern is dissected into a plurality of segments taking into account OPC rules. A parasitic resistance and/or parasitic capacitance associated with the interconnect pattern may be determined by a physical model and/or field solver.07-23-2009

Chih-Hsin Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20090153479Positioning Device of Pointer and Related Method - A positioning device for positioning an aim point of a pointer on a screen includes a screen, a pointer and a processor. The screen is utilized for displaying a plurality of characteristic points having already-known coordinate values. The pointer is utilized for forming an aim point, and includes an image acquisition unit for acquiring an image and a calculation unit for calculating image coordinate values of the plurality of characteristic points in the image. The processor is coupled to the screen and the pointer, and is utilized for establishing a transformation matrix according to the already-known coordinate values of the plurality of characteristic points and the image coordinate values of the plurality of characteristic points in the image and for deciding the position of the aim point according to the transformation matrix.06-18-2009
20100328244DISPLACEMENT DETECTION SYSTEM OF AN OPTICAL TOUCH PANEL AND METHOD THEREOF - At a first time, a first image sensor and a second image sensor capture a first image and a second image including images of an object respectively. At a second time, the first image sensor and the second image sensor capture a third image and a fourth image including images of the object respectively. A coordinate calculation device calculates a first coordinate of the object at the first time according to the first image and the second image, and a second coordinate of the object at the second time according to the third image and the fourth image. A coordinate correction device calculates a displacement between the first time and the second time according to the first coordinate and the second coordinate, and corrects an output coordinate of the object at the second time according to the displacement.12-30-2010
20100328270OBJECT DETECTION CALIBRATION SYSTEM OF AN OPTICAL TOUCH SCREEN AND METHOD THEREOF - A first image sensor captures a first image of a panel of a touch screen. The first image includes a first object, a second object, a first set of reference marks, a second set of reference marks, and a first boundary mark. The touch screen establishes relationships of relative positions among the first image sensor, the first object, the second object, and the reference marks according to positions of the first object, the second object, and the reference marks in the first image. And the touch screen calculates a relative position between the first image sensor and the panel according to the relationships of relative positions among the first image sensor, the first object, the second object, and the reference marks and relative positions among the first object, the second object, and the panel.12-30-2010
20110193823Optical sensing system - An optical sensing system includes a sensing area, a reflective mirror, a first image-sensing device, a second image-sensing device, and a processing circuit. The sensing area is an area in which a plurality of pointing objects may execute touch operation. The reflective mirror generates a mirror image of the sensing area. The first image-sensing device and the second image-sensing device respectively capture images including all or part of the pointing objects in the sensing area, and all or part of the pointing objects in the reflective mirror. The processing circuit generates candidate coordinates according to the images captured by the first and the second image-sensing devices, and obtains the locations of the pointing objects from the candidate coordinates by means of the symmetric relationship between the point objects and the corresponding mirror images with respect to the reflective mirror. In this way, the optical sensing system can perform multi-touch operation.08-11-2011

Patent applications by Chih-Hsin Lin, Hsin-Chu City TW

Chin-Yen Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100141033EFFICIENT PWM CONTROLLER - This patent discloses an efficient PWM controller for generating a pulse signal in response to a feedback signal, capable of operating in a normal mode or a green mode, comprising: a capacitor for building a saw-tooth signal by current integration, the saw-tooth signal having a ramp-up period and a ramp-down period; a first composite current source for the ramp-up period, detachable into a first constant current source and a first variable current source; and a second composite current source for the ramp-down period, detachable into a second constant current source and a second variable current source; wherein, the first variable current source is attached to the first constant current source and the second variable current source is attached to the second constant current source respectively in the green mode.06-10-2010

Cho-Yi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100113093Serial Transmission Interface between an Image Sensor and a Baseband Circuit - A serial transmission interface between an image sensor and a baseband circuit includes a transmission end and a reception end. The transmission end is set in the image sensor, and is utilized for transmitting image data sensed by the image sensor. The reception end is set in the baseband circuit, and is utilized for receiving the image data transmitted from the transmission end. The transmission end is one of a master control end and a slave control end, and the reception end is correspondingly the other.05-06-2010
20100220210INTERACTIVE SYSTEM CAPABLE OF IMPROVING IMAGE PROCESSING - An interactive system capable of improving image processing includes a reference device, a processing module and a controller. The reference device is used for transmitting and/or reflecting light signals within a predetermined spectrum. The processing module includes an image sensor, an estimation unit and a transmission interface. The image sensor is used for sensing an image so as to generate pixel signals; the estimation unit is used for determining static parameters of at least one image object according to the pixel signals; and the transmission interface is used for serially outputting the static parameters of the at least one image object. The controller is used for controlling operation of the interactive system according to the static parameters of the at least one image object outputted from the transmission interface. The image sensor, the estimation unit, and the transmission interface can all be formed on the same substrate.09-02-2010
20100328244DISPLACEMENT DETECTION SYSTEM OF AN OPTICAL TOUCH PANEL AND METHOD THEREOF - At a first time, a first image sensor and a second image sensor capture a first image and a second image including images of an object respectively. At a second time, the first image sensor and the second image sensor capture a third image and a fourth image including images of the object respectively. A coordinate calculation device calculates a first coordinate of the object at the first time according to the first image and the second image, and a second coordinate of the object at the second time according to the third image and the fourth image. A coordinate correction device calculates a displacement between the first time and the second time according to the first coordinate and the second coordinate, and corrects an output coordinate of the object at the second time according to the displacement.12-30-2010
20100328270OBJECT DETECTION CALIBRATION SYSTEM OF AN OPTICAL TOUCH SCREEN AND METHOD THEREOF - A first image sensor captures a first image of a panel of a touch screen. The first image includes a first object, a second object, a first set of reference marks, a second set of reference marks, and a first boundary mark. The touch screen establishes relationships of relative positions among the first image sensor, the first object, the second object, and the reference marks according to positions of the first object, the second object, and the reference marks in the first image. And the touch screen calculates a relative position between the first image sensor and the panel according to the relationships of relative positions among the first image sensor, the first object, the second object, and the reference marks and relative positions among the first object, the second object, and the panel.12-30-2010
20110193823Optical sensing system - An optical sensing system includes a sensing area, a reflective mirror, a first image-sensing device, a second image-sensing device, and a processing circuit. The sensing area is an area in which a plurality of pointing objects may execute touch operation. The reflective mirror generates a mirror image of the sensing area. The first image-sensing device and the second image-sensing device respectively capture images including all or part of the pointing objects in the sensing area, and all or part of the pointing objects in the reflective mirror. The processing circuit generates candidate coordinates according to the images captured by the first and the second image-sensing devices, and obtains the locations of the pointing objects from the candidate coordinates by means of the symmetric relationship between the point objects and the corresponding mirror images with respect to the reflective mirror. In this way, the optical sensing system can perform multi-touch operation.08-11-2011

Chrong Jung Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20110095394ANTIFUSE AND METHOD OF MAKING THE ANTIFUSE - A method of making an antifuse includes providing a substrate having a bit line diffusion region and a capacitor diffusion region. A gate dielectric layer is formed over the substrate, and a word line is formed on the gate dielectric layer. An oxide layer is formed on the capacitor diffusion region, in a separate process step from forming the gate dielectric layer. A select line contact is formed above and contacting the oxide layer to form a capacitor having the oxide layer as a capacitor dielectric layer of the capacitor. The select line contact is configured for applying a voltage to cause permanent breakdown of the oxide layer to program the antifuse.04-28-2011

Chu-Hsien Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20090101922LED ARRANGEMENT FOR PRODUCING PURE MONOCHOMATIC LIGHT - In an LED arrangement, two or more LEDs are particularly positioned for the color lights emitted therefrom to be fully mixed to produce a pure monochromatic light. The LEDs may include at least two identical LEDs, and each of the LEDs includes at least two light emitting chips that separately emit a different color light. The LEDs are positioned in a particular manner, so that the light emitting chips located in different LEDs at the same corresponding positions emit different lights. In this manner, the color lights emitted from the LEDs are fully overlapped and mixed to produce a pure monochromatic light having increased illumination intensity and area.04-23-2009

Han-Chang Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100113093Serial Transmission Interface between an Image Sensor and a Baseband Circuit - A serial transmission interface between an image sensor and a baseband circuit includes a transmission end and a reception end. The transmission end is set in the image sensor, and is utilized for transmitting image data sensed by the image sensor. The reception end is set in the baseband circuit, and is utilized for receiving the image data transmitted from the transmission end. The transmission end is one of a master control end and a slave control end, and the reception end is correspondingly the other.05-06-2010

Hsien-Hsin Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080246057Silicon layer for stopping dislocation propagation - A composite semiconductor structure and method of forming the same are provided. The composite semiconductor structure includes a first silicon-containing compound layer comprising an element selected from the group consisting essentially of germanium and carbon; a silicon layer on the first silicon-containing compound layer, wherein the silicon layer comprises substantially pure silicon; and a second silicon-containing compound layer comprising the element on the silicon layer. The first and the second silicon-containing compound layers have substantially lower silicon concentrations than the silicon layer. The composite semiconductor structure may be formed as source/drain regions of metal-oxide-semiconductor (MOS) devices.10-09-2008
20110042729METHOD FOR IMPROVING SELECTIVITY OF EPI PROCESS - The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, forming a material layer over the substrate and the gate structure, implanting Ge, C, P, F, or B in the material layer, removing portions of the material layer overlying the substrate at either side of the gate structure, forming recesses in the substrate at either side of the gate structure, and depositing a semiconductor material in the recesses by an expitaxy process.02-24-2011
20110079820DEVICE WITH SELF ALIGNED STRESSOR AND METHOD OF MAKING SAME - A method includes providing a substrate comprising a substrate material, a gate dielectric film above the substrate, and a first spacer adjacent the gate dielectric film. The spacer has a first portion in contact with a surface of the substrate and a second portion in contact with a side of the gate dielectric film. A recess is formed in a region of the substrate adjacent to the spacer. The recess is defined by a first sidewall of the substrate material. At least a portion of the first sidewall underlies at least a portion of the spacer. The substrate material beneath the first portion of the spacer is reflowed, so that a top portion of the first sidewall of the substrate material defining the recess is substantially aligned with a boundary between the gate dielectric film and the spacer. The recess is filled with a stressor material.04-07-2011
20110084355Isolation Structure For Semiconductor Device - A semiconductor device is provided. The semiconductor device includes a substrate, an isolation feature disposed on the substrate, and an active area disposed adjacent the isolation feature. The isolation feature may be a shallow trench isolation feature. The STI feature has a first width at the top of the feature and a second width at the bottom of the feature. The first width is less than the second width. Methods of fabricating a semiconductor device is also provided. A method includes forming shallow trench isolation features and then growing an epitaxial layer adjacent the STI features to form an active region.04-14-2011
20110108894METHOD OF FORMING STRAINED STRUCTURES IN SEMICONDUCTOR DEVICES - The present disclosure provides a method of fabricating that includes providing a semiconductor substrate; forming a gate structure on the substrate; performing an implantation process to form a doped region in the substrate; forming spacers on sidewalls of the gate structure; performing an first etching to form a recess in the substrate, where the first etching removes a portion of the doped region; performing a second etching to expand the recess in the substrate, where the second etching includes an etchant and a catalyst that enhances an etching rate at a remaining portion of the doped region; and filling the recess with a semiconductor material.05-12-2011
20110147846METHOD FOR INCORPORATING IMPURITY ELEMENT IN EPI SILICON PROCESS - The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.06-23-2011
20110193141METHOD OF FABRICATING A FINFET DEVICE - A FinFET device and method for fabricating a FinFET device is disclosed. An exemplary FinFET device includes a substrate of a crystalline semiconductor material having a top surface of a first crystal plane orientation; a fin structure of the crystalline semiconductor material overlying the substrate; a gate structure over a portion of the fin structure; an epitaxy layer over another portion of the fin structure, the epitaxy layer having a surface having a second crystal plane orientation, wherein the epitaxy layer and underlying fin structure include a source and drain region, the source region being separated from the drain region by the gate structure; and a channel defined in the fin structure from the source region to the drain region, and aligned in a direction parallel to both the surface of the epitaxy layer and the top surface of the substrate.08-11-2011
20110210393DUAL EPITAXIAL PROCESS FOR A FINFET DEVICE - A method includes forming a first fin and a second fin extending above a semiconductor substrate, with a shallow trench isolation (STI) region between them. A space is defined between the first and second fins above a top surface of the STI region. A first height is defined between the top surface of the STI region and top surfaces of the first and second fins. A flowable dielectric material is deposited into the space. The dielectric material has a top surface above the top surface of the STI region, so as to define a second height between the top surface of the dielectric material and the top surfaces of the first and second fins. The second height is less than the first height. First and second fin extensions are epitaxially formed above the dielectric, on the first and second fins, respectively, after the depositing step.09-01-2011

Huang-Chi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100321957STANDBY POWER METHOD AND APPARATUS FOR POWER MODULE APPLICATIONS - The present invention discloses a standby power saving method for power module applications, comprising the steps of: generating a mode signal according to voltage comparison of a feedback signal and a threshold voltage, wherein the mode signal has a normal mode state and a standby mode state; generating a pulse signal according to the mode signal, wherein the pulse signal has a normal PWM mode responsive to the normal mode state of the mode signal, and a V12-23-2010
20110068751SAFETY CAPACITOR DISCHARGING METHOD AND APPARATUS FOR AC-TO-DC CONVERTERS - The present invention discloses a safety capacitor discharging method for AC-to-DC converters, wherein the AC-to-DC converters have a safety capacitor connected between two line voltages, the method comprising the steps of: detecting at least one line voltage to generate a line-off signal, wherein the line-off signal is at a first state when the peak voltage of the at least one line voltage is above a reference voltage, and the line-off signal is at a second state when the peak voltage of the at least one line voltage is below the reference voltage; and performing discharge of the safety capacitor by generating a conduction path between two plates of the safety capacitor when the line-off signal is at the second state. The present invention also provides a safety capacitor discharging apparatus for AC-to-DC converters.03-24-2011

Hung-Chi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100162088XOR CIRCUIT, RAID DEVICE CAPABLE OF RECOVERING A PLURALITY OF FAILURES AND METHOD THEREOF - An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high efficient flow data route and which at the same time correct the three or more failures during operation of the RAID device.06-24-2010

Shih-Fang Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080267488Apparatus and method for monitoring overlapped object - An apparatus and a method for monitoring overlapped objects are disclosed. The monitoring apparatus comprises a projection device and a camera for projecting images to a target plane at different angles and shooting the pictures from the target plane. When an object is placed on the target plane, the pictures present the part of the image overlapping the surface of the object for determining whether there are overlapped objects or not.10-30-2008

Sung-Bin Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20090179256MEMORY HAVING SEPARATED CHARGE TRAP SPACERS AND METHOD OF FORMING THE SAME - A silicon-oxide-nitride-oxide-silicon (SONOS) memory and the corresponding forming method are disclosed. The memory includes a plurality of select gate structures arranged in an array, a plurality of charge trap spacers that do not contact each other, and a plurality of word lines. The word lines can directly contact the select gates' surfaces of the select gate structures. All of the select gate structures disposed in one line can share two charge trap spacers, and the two charge trap spacers are disposed on the opposed sidewalls of these select gate structures.07-16-2009

Ta-Cheng Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100044748ELECTROSTATIC DISCHARGE PROTECTION DEVICE - An ESD protection device includes a p-well with first protrudent portions, an N-well with second protrudent portions, a P-well/N-well boundary, a PMOS transistor disposed in the N-well, an NMOS transistor disposed in the P-well, first P+ diffusion regions in the first protrudent portions, first N+ diffusion regions in the second protrudent portions, second P+ diffusion regions disposed between the PMOS transistor and the second protrudent portions, second N+ diffusion regions disposed between the NMOS transistor and the first protrudent portions, third P+ diffusion regions disposed between the NMOS transistor, the boundary, and two adjacent second P+ diffusion regions, and third N+ diffusion regions disposed between the PMOS transistor, the boundary, and two adjacent second N+ diffusion regions, wherein the first and second protrudent portions are interlacedly arranged at the boundary.02-25-2010
20100163924LATERAL SILICON CONTROLLED RECTIFIER STRUCTURE - A lateral silicon controlled rectifier structure includes a P-type substrate; an N-well region in the P-type substrate; a first P07-01-2010

Tse-Chi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080218487Capacitive-type touch pad having special arrangement of capacitance sensor - A touch pad has a controller circuitry for generating an X-Y coordinate signal; a touch screen connecting with the controller circuitry, which has a transparent substrate and a transparent conductive film provided at the transparent substrate. The transparent conductive film having a plurality of capacitance sensors distributed along an X-coordinate direction and a Y-coordinate direction. The plurality of capacitance sensors are patterned for averaging the resistance capacitance distribution.09-11-2008

Tsu-Ping Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080247455Video signal processing apparatus to generate both progressive and interlace video signals - A video signal processing apparatus includes a main picture processor, an interlace recovering module and a video encoder. The main picture processor produces corresponding main picture signals based on video signals from a memory. The main picture signals are converted to progressive scan signals through a predetermined video signals processing. The interlace recovering module receives the progressive scan signals, retrieves the even portion and the odd portion of the progressive video signals alternately, and generates a set of interlace-scan signals. The video encoder receives both the progressive scan signals and the interlace scan signals and generates a set of progressive video signals and a set of interlace video signals to corresponding video display apparatuses. Thereupon, the video reproduction system can simultaneously provide both the progressive video signals and interlace video signals to the video display apparatuses.10-09-2008

Wei-Chieh Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20110254050REVERSE CONDUCTING IGBT - An insulated gate bipolar transistor (IGBT) is provided comprising a semiconductor substrate having the following regions in sequence: (i) a first region of a first conductive type having opposing surfaces, a column region of a second conductive type within the first region extending from a first of said opposing surfaces; (ii) a drift region of the second conductive type; (iii) a second region of the first conductive type, and (iv) a third region of the second conductive type. There is provided a gate electrode disposed to form a channel between the third region and the drift region, a first electrode operatively connected to the second region and the third region, a second electrode operatively connected to the first region and the column region. The arrangement of the IGBT is such that the column region is spaced from a second surface of the opposing surfaces of the first region, whereby a forward conduction path extends sequentially through the third region, the second region, the drift region, and the first region, and whereby a reverse conduction path extends sequentially through the second region, the drift region, the first region and the column region. Reverse conduction of the IGBT occurs through a thyristor structure which is embedded in the IGBT. Such an IGBT structure is advantageous over a reverse conducting IGBT structure in which an anti-parallel diode is integrated or embedded because it provides improved reverse conduction and snapback performance.10-20-2011

Wen-Hsiang Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20090127581NITRIDE-BASED LIGHT-EMITTING DEVICE - A nitride-based light-emitting device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a nitride-based buffer layer formed by nitrogen, a first group III element, and optionally, a second group III element, a first nitride-based semiconductor layer, a light-emitting layer, and a second nitride-based semiconductor layer.05-21-2009

Yen-Tai Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080218252VOLTAGE REGULATOR OUTPUTTING POSITIVE AND NEGATIVE VOLTAGES WITH THE SAME OFFSETS - A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit.09-11-2008

Patent applications by Yen-Tai Lin, Hsin-Chu City TW

Ying-Hsi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100066327VOLTAGE CONVERSION APPARATUS - A voltage conversion apparatus includes a DC-to-DC conversion circuit, a sensing circuit, and a compensation circuit. The voltage conversion apparatus is capable of adaptively adjusting the system bandwidth according to the load. The system bandwidth is increased to make the converted voltage responding to the load rapidly when the voltage conversion apparatus is operated at a transient state; and the system bandwidth is decreased to increase the system stability when the voltage conversion circuit is operated at a steady state.03-18-2010
20110115570CLOCK GENERATOR - This invention discloses a clock generator capable of automatically adjusting output clock when process, voltage, or temperature variation occurred. The clock generator comprises: a current generator, for generating a first current and a second current according to a bias signal; an oscillator, coupled to the current generator, for generating a clock signal according to the first current; a frequency detector, coupled to the oscillator, for generating a control signal according to the clock signal and a reference signal; and a bias voltage adjuster, coupled to the current generator and the frequency detector, for adjusting the bias signal according to the control signal; wherein, when the signal frequency of the clock signal changes, the bias signal corresponds to the bias voltage adjuster, to adjust the first current and the second current.05-19-2011

Patent applications by Ying-Hsi Lin, Hsin-Chu City TW

Ying-Shiou Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080237746Gated diode with non-planar source region - A gated-diode semiconductor device or similar component and a method of fabricating the device. The device features a gate structure disposed on a substrate over a channel and adjacent a source and a drain. The top of the source or drain region, or both, are formed so as to be at a higher elevation, in whole or in part, than the bottom of the gate structure. This configuration may be achieved by overlaying the gate structure and substrate with a profile layer that guides a subsequent etch process to create a sloped profile. The source and drain, if both are present, may be symmetrical or asymmetrical. This configuration significantly reduces dopant encroachment and, as a consequence, reduces junction leakage.10-02-2008

Ying-Yao Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20100026252Low Drop-Out Voltage Regulator with Efficient Frequency Compensation - A low drop-out (LDO) voltage regulator with efficient frequency compensation is disclosed. The LDO voltage regulator includes an error amplifier, a transmission element, a voltage divider and a pole control unit. The error amplifier generates a control signal according to a reference voltage and a feedback voltage. The transmission element is coupled to the error amplifier, and adjusts an input voltage to generate an output voltage according to the control signal. The voltage divider is coupled to the transmission element, and performs a voltage division operation on the output voltage to generate the feedback voltage. The pole control unit is coupled to the transmission element, and provides and adjusts an output capacitor of the LDO voltage regulator to fix a frequency of a pole according to variation of an output impedance of the transmission element, so as to maintain loop stability.02-04-2010
20100054378CENTER FREQUENCY ADJUSTMENT DEVICE AND RELATED METHOD FOR A COMMUNICATIONS RECEIVER - A center frequency adjustment device for a communications receiver includes an A/D converter coupled to an analog filter in the communications receiver for converting an output signal of the analog filter to a digital signal, a carrier frequency offset estimator coupled to the A/D converter for estimating a carrier frequency offset of the communications receiver according to the digital signal, and a control circuit coupled to the analog filter and the carrier frequency offset estimator for adjusting a center frequency of the analog filter according to the carrier frequency offset.03-04-2010
20110223878Signal Strength Detecting Device and Related Method - A signal strength detecting device of a communication system is disclosed. The signal strength detecting device is coupled to a frequency down mixer of the communication system and the frequency down mixer is used for receiving and converting a first signal to a second signal whose frequencies are lower than frequencies of the first signal. The signal strength detecting device comprises a frequency up converter for receiving and converting the second signal to a third signal whose frequencies are higher than the frequencies of the second signal and a detecting unit for detecting strength of the third signal and generating a signal strength indicator to the communication system according to a detecting result corresponding to the strength of the third signal, wherein the signal strength indicator represents the strength of the first signal received by the frequency down mixer.09-15-2011

Yuan-Chi Lin, Hsin-Chu City TW

Patent application numberDescriptionPublished
20080267488Apparatus and method for monitoring overlapped object - An apparatus and a method for monitoring overlapped objects are disclosed. The monitoring apparatus comprises a projection device and a camera for projecting images to a target plane at different angles and shooting the pictures from the target plane. When an object is placed on the target plane, the pictures present the part of the image overlapping the surface of the object for determining whether there are overlapped objects or not.10-30-2008
20080290884Probe card assembly with ZIF connectors, method of assembling, wafer testing system and wafer testing method introduced by the same - This invention discloses a probe card assembly with adjustable ZIF connectors. The probe card assembly comprises a substrate, a plurality of ZIF connectors and a plurality of adjustable fastening means for assembling and disassembling the ZIF connectors on the substrate. The substrate is a disc-like plate, having a first surface, a second surface, a plurality of concave sections disposed on the second surface and a plurality of first through holes perpendicular to the first surface. The first through holes are circularly arranged toward the substrate center. Pairs of first contacts are provided on the first surface adjacent to both sides of first through holes. A plurality of terminals are protruded from the second surface of the substrate for contacting and testing the wafer. The ZIF connectors are also circularly arranged toward the substrate center. Each ZIF connector has parallelly arranged second through holes from the top to the bottom of the connector and pairs of contact terminals for contacting the first contacts of the substrate. The adjustable fastening means are disposed from the concave section through the first and second through holes to assembling and disassembling the ZIF connectors on the first surface of the substrate.11-27-2008