Li, Pleasanton
Donghong Li, Pleasanton, CA US
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20120216378 | METHOD AND SYSTEM FOR PROVIDING A PIEZOELECTRIC MULTILAYER - A method and system for fabricating a piezoelectric multilayer are described. The method and system include providing conductive layers. Alternating conductive layers are electrically connected. A first plurality of alternating conductive layers is electrically isolated from a second plurality of alternating conductive layers. Piezoelectric layers are interleaved with the conductive layers. Apertures are provided in the piezoelectric layers. A first conductive plug electrically connects the first plurality of alternating conductive layers, includes a first plurality of segments, and is in apertures in the piezoelectric layers. Each of the first plurality of segments extends through one of the piezoelectric layers. A second conductive plug electrically connects the second plurality of alternating conductive layers, includes a second plurality of segments, and is in a second portion of the plurality of apertures. Each of the second plurality of segments extends through one of the plurality of piezoelectric layers. | 08-30-2012 |
Kiu Li, Pleasanton, CA US
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20140279641 | IDENTITY AND ASSET RISK SCORE INTELLIGENCE AND THREAT MITIGATION - Techniques are provided that produce a risk profile consisting of a risk score and trends of risk scores across entities such as user identities and other objects. For example, an identity is assigned a risk score which is based on baseline factors such as HR attributes, such as training and screening status; access to and conflicts across physical, logical, and operational systems; historical and current usage of these systems, as well as anomalies from normal behavior patterns. Techniques herein encompass the management of a risk profile (“behavior profile”) for each entity, e.g. identity, and maintains a risk score that is correlated with behavior, e.g. an individual's behavior, to track anomalies or irregularities in every day routines of the entity, e.g. individual. | 09-18-2014 |
Philip H. Li, Pleasanton, CA US
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20150035028 | Image Sensor with Buried Light Shield and Vertical Gate - A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region. | 02-05-2015 |
Shenggao Li, Pleasanton, CA US
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20120243300 | COMBINED DATA LEVEL-SHIFTER AND DE-SKEWER - Various embodiments of this disclosure may describe a circuit for transmitting data from a transmitting region of an integrated circuit to a receiving region of the integrated circuit. The circuit may level-shift the data to the appropriate voltage level and may have good tolerance to clock skews. Other embodiments, including an integrated circuit having the circuit or a system with the integrated circuit, may also be disclosed or claimed. | 09-27-2012 |
20130154691 | MULTI-PHASE CLOCK GENERATION APPARATUS AND METHOD - A multi-phase clock generator may receive an input clock signal as an input. The clock generator may also receive an inverse of the input clock signal. The clock generator may produce a plurality of output clock signals having different phases. The phases of the output clock signals may be evenly spaced. The output clock signals may have a similar waveform to the input clock signal, with a frequency that is lower than the input clock signal by a division factor. | 06-20-2013 |
20130278347 | COMPENSATION FOR DIGITALLY CONTROLLED OSCILLATOR APPARATUS AND METHOD - Automatic digital sensing and compensation of frequency drift caused by temperature, aging, and/or other effects may be provided by including a compensation capacitor array and a sensing logic. The sensing logic may be configured to detect a drift in a first control signal and to provide the compensation capacitor array with a second control signal. The second control signal is configured to cause an adjustment of capacitance in the compensation capacitor array based on the detected drift in the first control signal. | 10-24-2013 |
20140077841 | PHASE FREQUENCY DETECTOR - Described is an apparatus comprising: a first phase frequency detector (PFD) to determine a coarse phase difference between a first clock signal and a second clock signal, the first PFD to generate a first output indicating the coarse phase difference; and a second PFD, coupled to the first PFD, to determine a fine phase difference between the first clock signal and the second clock signal, the second PFD to generate a second output indicating the fine phase difference. | 03-20-2014 |
20140079177 | HIGH SPEED DUAL MODULUS DIVIDER - Described is an apparatus comprising a plurality of logic units arranged in a ring, wherein an output terminal of each logic unit from the plurality of logic units is coupled to an input terminal of a next logic unit from the plurality of logic units, wherein the plurality of logic units includes a first multiple input logic unit having input nodes coupled to at least two output terminals of logic units from the plurality of logic units; and a plurality of latch units coupled to the output terminals of the plurality of logic units. | 03-20-2014 |
20140176193 | LOW POWER SQUELCH DETECTOR CIRCUIT - Described is an apparatus comprising: a reference generator to provide a first reference and a second reference; a first input coupled to the first reference; a second input coupled to the second reference; and a comparator coupled to the first and second inputs, the comparator to receive a clock signal and to update an output signal according to a phase of the clock signal. | 06-26-2014 |
Zhanjie Li, Pleasanton, CA US
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20140307349 | MAGNETIC RECORDING TRANSDUCERS HAVING SLIM SHAPED ADDITIONAL POLES - A magnetic transducer has an air-bearing surface (ABS). The magnetic transducer has a main pole, at least one coil for energizing the main pole and at least one additional pole. The main pole has a yoke and a pole tip having an ABS facing surface. The at least one additional pole is adjacent to the main pole in a down track direction. The additional pole is recessed from the ABS, has a front surface facing the ABS, has at least one side surface, and has at least one flare angle between the front surface and the at least one side surface. The at least one flare angle is measured from the ABS to the at least one side surface and is at least fifty degrees and less than ninety degrees. | 10-16-2014 |