Patent application number | Description | Published |
20120289848 | METHOD AND SYSTEM FOR DISCRIMINATING HEART SOUND AND CARDIOPATHY - A method for discriminating heart sound is provided. The method comprises the following steps. A heart-sound signal is provided. A specific function calculation is performed on the heart-sound signal to generate a first calculation signal and suppress the noise of the heart-sound signal. The filtering signal is transformed to generate data for an image plots. The image plot corresponding to the data generated in the previous step is generated and compared with data of heart-sound plots and the comparison result is used for discriminating the heart sound. | 11-15-2012 |
20120325019 | FORCE SENSING DEVICE AND FORCE SENSING SYSTEM - A force sensing device and a force sensing system are provided. The force sensing device comprises at least one magnetic material layer and a force sensing layer which can move with respect to each other. The force sensing layer comprises two sensing elements. The first sensing element, disposed along a first axis of the magnetic material layer, generates a sensing signal varying with a first lateral force applied on the force sensing device. The first lateral force enables the first sensing element to move relatively with respect to the magnetic material layer along the first axis. The second sensing element, disposed along a second axis of the magnetic material layer, generates a sensing signal varying with a second lateral force applied on the force sensing device. The second lateral force enables the second sensing element to move relatively with respect to the magnetic material layer along the second axis. | 12-27-2012 |
20130163839 | SIGNAL AND IMAGE ANALYSIS METHOD AND ULTRASOUND IMAGING SYSTEM - A time domain signal analysis method is provided. The signal analysis method includes the following steps. A signal to be analyzed is received. The signal to be analyzed is iteratively sifted by using Empirical Mode Decomposition (EMD) to extract at least one intrinsic function (IMF). A normalized Hilbert transform is performed on the IMF. The transformed IMF includes phase information. The transformed IMF is processed by means of phase processing to obtain the processed IMF including angular frequency information. The foregoing signal analysis method could be utilized in an ultrasound imaging system to identify image information of ultrasound images. | 06-27-2013 |
20130163840 | IMAGING SYSTEM AND IMAGE PROCESSING METHOD THEREOF - An image processing method is provided. The image processing method includes the following steps. A plurality of raw signal is received by a signal transceiving module of the ultrasound imaging system. It is determined whether each of the raw signals satisfies any condition in a condition group, and the raw signal satisfying any condition in the condition group is mapped to one of a plurality of preset constants to generate a plurality of first data. The raw signals not satisfying any condition in the condition group are processed according to a calculation formula to generate a plurality of second data. A beamforming procedure is simultaneously performed on the first and second data to obtain a beamformed image. The beamformed image is transformed to obtain an image of a region to be detected. Furthermore, an imaging system using the foregoing image processing method is also provided. | 06-27-2013 |
Patent application number | Description | Published |
20130179398 | DEVICE FOR SYNCHRONOUSLY SHARING FILES AND METHOD FOR SYNCHRONOUSLY SHARING FILES - A device for synchronously sharing files includes a processor and a database. The processor is used for utilizing a synchronous data folder to record a newest modified version of a file generated by a user operating the file, and synchronously transmitting the newest modified version of the file to other client devices. The database is used for storing historical modified versions of the file generated by the user operating the file and the newest modified version of the file. | 07-11-2013 |
20130179492 | SYSTEM FOR PROVIDING A BIDIRECTIONAL DATA ACCESS SERVICE AND METHOD THEREOF - A system for providing a bidirectional data access service includes a relay server and a service server. The relay server is located in the Internet. The service server registers an internal Internet Protocol (IP) address, an external IP address, and a corresponding server identification in the relay server, and establishes a data channel. When a user wants to utilize a predetermined service provided by the service server through a client device, the client device transmits the corresponding server identification to the relay server, and the relay server transmits the internal IP address and the external IP address to the client device according to the corresponding server identification. The client device automatically determines a connection method between the client device and the service server according to an application program, the internal IP address, the external IP address, and a network on which the client device is located. | 07-11-2013 |
20150149533 | METHOD FOR CONTROLLING OPERATIONS OF NETWORK SYSTEM - A method for controlling operations of a network system is provided. The network system has a server and a plurality of client terminals linked to the server. According to the method, the server establishes a file set, each client terminal establishes a directory, and a first criterion and a second criterion of each client terminal are set respectively. Each client terminal selectively uploads file(s) to the server according to the first criterion, such that the server updates file(s) of the file set with the file(s) received from the client terminal. The server selectively transmits updates of the file(s) of the file set to each client terminal according to the second criterion of each client terminal. Each client terminal stores the updates of the file(s) received from the server in the directory of each client terminal. | 05-28-2015 |
Patent application number | Description | Published |
20130105912 | SEMICONDUCTOR DEVICE | 05-02-2013 |
20140094017 | MANUFACTURING METHOD FOR A SHALLOW TRENCH ISOLATION - A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one trench is then formed in the substrate through an etching process, the hard mask layer is removed. Afterwards, a filler is formed at least in the trench and a planarization process is then performed on the filler. Since the planarization process is performed only on the filler, so the dishing phenomenon can effectively be avoided. | 04-03-2014 |
20140273371 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the resistor region of the substrate; forming a tank in the STI; and forming a resistor in the tank and on two sides of the top surface of the STI outside the tank. | 09-18-2014 |
20150079780 | METHOD OF FORMING SEMICONDUCTOR STRUCTURE - A method of forming a semiconductor device is disclosed. A gate structure is formed on a substrate. The gate structure includes a dummy gate and a spacer at a sidewall of the dummy gate. A dielectric layer is formed on the substrate outside of the gate structure. A metal hard mask layer is formed to cover tops of the dielectric layer and the spacer and to expose a surface of the gate structure. The dummy gate is removed to form a gate trench. A low-resistivity metal layer is formed on the metal hard mask layer filling in the gate trench. The low-resistivity metal layer outside of the gate trench is removed. The metal hard mask layer is removed. | 03-19-2015 |
20150140819 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate having trenches with different sizes is provided. A first oxide layer is formed to entirely cover the substrate. A prevention layer is formed on the first oxide layer. A first filling layer is formed on the prevention layer and fills the trenches until the first filling layer is higher than the substrate. A first polishing process is performed to polish the first filling layer until exposing the prevention layer. A second polishing process is performed to polish the first filling layer, the prevention layer and the first oxide layer until the substrate is exposed. | 05-21-2015 |
20150147874 | METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE - The present invention provides a manufacturing method for forming a semiconductor structure, in which first, a substrate is provided, a hard mask is disposed on the substrate, the hard mask is then patterned to form a plurality of fin hard masks and a plurality of dummy fin hard masks, afterwards, a pattern transferring process is performed, to transfer the patterns of the fin hard masks and the fin hard masks into the substrate, so as to form a plurality of fin groups and a plurality of dummy fins. Each dummy fin is disposed on the end side of one fin group, and a fin cut process is performed, to remove each dummy fin. | 05-28-2015 |
20150162419 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes the following steps. A substrate including at least a fin structure is provided, and a material layer is formed to cover the fin structure. Then, a first planarization process is performed on the material layer to form a first material layer, and an oxide layer is formed on the first material layer. Subsequently, the oxide layer is totally removed to expose the first material layer, and a second material layer is formed in-situ on the first material layer after totally removing the oxide layer. | 06-11-2015 |
20150214114 | MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE - A manufacturing method of a semiconductor structure is disclosed. The manufacturing method includes the following steps. A substrate with a plurality of dummy gate structures formed thereon and a first dielectric layer covering the dummy gate structures is provided, the dummy gate structures comprising a plurality of dummy gates and a plurality of insulating layers formed on the dummy gates, wherein at least two of the dummy gate structures have different heights. A first planarization process is performed to expose at least one of the dummy gate structures having the highest height. A first etching process is performed to expose the insulating layers. A chemical mechanical polishing (CMP) process with a non-selectivity slurry is performed to planarize the dummy gate structures. The planarized dummy gate structures are removed to form a plurality of gate trenches. | 07-30-2015 |