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Lembach

Holly J. Lembach, Sagamore Hills, OH US

Patent application numberDescriptionPublished
20120035038DUNNAGE CONVERSION SYSTEM AND METHOD WITH STOCK MATERIAL SPLICING - A method that includes the steps of (i) attaching a leading portion of a supply of stock material to a trailing portion of a preceding supply of stock material by means of a mechanical fastener, an electromagnetic field, electrostatic charges, or an activatable bonding agent, and (ii) converting the stock material into a relatively less dense dunnage product. The attaching step may include (a) embossing, punching, stitching, stapling, riveting, clipping, snapping, buttoning, attaching with male and female interlocking devices or hook-and-loop fasteners, (b) integrating one or more elements into the stock material to provide a stock material with magnetic or magnetizable material in the leading or trailing portion, (c) imparting opposing and attractive magnetic charges in respective leading and trailing portions, (d) inducing an electrostatic charge or a magnetic field in at least one of the leading and trailing portions, and/or (e) activating a bonding agent.02-09-2012

Oliver Lembach, Sindelfingen DE

Patent application numberDescriptionPublished
20110278116BRAKE DISC FOR A VEHICLE AND METHOD FOR THE PRODUCTION THEREOF - The invention relates to a brake disc (BS) for a vehicle, comprising a main body (G) that is made of a metal material, particularly gray cast iron, which has friction surfaces (R) having a coating (B) made of a hard material.11-17-2011
20110293849METHOD FOR PRODUCING A BRAKE DISC - The invention relates to a method for producing a brake disc (BS) for a vehicle, comprising a main body (G) of a metal material, in particular gray cast iron, which has friction surfaces (R).12-01-2011

Robert Francis Lembach, Rochester, MN US

Patent application numberDescriptionPublished
20120089955IMPLEMENTING ROUTING FIRST FOR RAPID PROTOTYPING AND IMPROVED WIRING OF HETEROGENEOUS HIERARCHICAL INTEGRATED CIRCUITS - A method, system and computer program product are provided for implementing routing first for rapid prototyping and improved wiring of heterogeneous hierarchical integrated circuit chips. Placement for each of a plurality of random logic macros (RLMs) is identified. Predefined wiring shapes are created for each of the identified RLMs. Full chip wire routing is defined responsive to the created predefined wiring shapes for each of the identified RLMs.04-12-2012