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Lee, Milpitas

Eal H. Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20110031109DESIGN AND USE OF DC MAGNETRON SPUTTERING SYSTEMS - Field-enhanced sputtering targets are disclosed that include: a core material; and a surface material, wherein at least one of the core material or the surface material has a field strength design profile and wherein the sputtering target comprises a substantially uniform erosion profile. Target assembly systems are also disclosed that include a field-enhanced sputtering target; and an anodic shield. Additionally, methods of producing a substantially uniform erosion on a sputtering target are described that include: providing an anodic shield; providing a cathodic field-enhanced target; and initiating a plasma ignition arc, whereby the arc is located at the point of least resistance between the anodic shield and the cathodic field-enhanced target.02-10-2011

Patent applications by Eal H. Lee, Milpitas, CA US

Evans Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20110265814METHODS FOR PROCESSING SUBSTRATES IN PROCESS SYSTEMS HAVING SHARED RESOURCES - Methods for processing substrates in twin chamber processing systems having first and second process chambers and shared processing resources are provided herein. In some embodiments, a method may include flowing a process gas from a shared gas panel to a processing volume of the first process chamber and to a processing volume of the second process chamber; forming a first plasma in the first processing volume to process the first substrate and a second plasma to process the second substrate; monitoring the first processing volume and the second processing volume to determine if a process endpoint is reached in either volume; and either terminating the first and second plasma simultaneously when a first endpoint is reached; or terminating the first plasma when a first endpoint is reached in the first processing volume while continuing to provide the second plasma in the second processing volume until a second endpoint is reached.11-03-2011
20110265884TWIN CHAMBER PROCESSING SYSTEM WITH SHARED VACUUM PUMP - Methods and apparatus for twin chamber processing systems are disclosed, and, in some embodiments, may include a first process chamber having a first vacuum pump to maintain a first operating pressure in a first processing volume selectively isolatable by a first gate valve disposed between the first processing volume and the first vacuum pump; a second process chamber having a second vacuum pump for maintaining a second operating pressure in a second processing volume selectively isolatable by a second gate valve disposed between the second processing volume and the second vacuum pump; and a shared vacuum pump coupled to the first and second processing volumes to reduce a pressure in each processing volume below a critical pressure level, wherein the shared vacuum pump can be selectively isolated from any of the first or second process chambers or the first or second vacuum pumps.11-03-2011
20110265951TWIN CHAMBER PROCESSING SYSTEM - Methods and apparatus for twin chamber processing systems are disclosed, and, in some embodiments, may include a first process chamber and a second process chamber having independent processing volumes and a plurality of shared resources between the first and second process chambers. In some embodiments, the shared resources include at least one of a shared vacuum pump, a shared gas panel, or a shared heat transfer source.11-03-2011
20110266256METHODS FOR PROCESSING SUBSTRATES IN PROCESS SYSTEMS HAVING SHARED RESOURCES - Methods for processing substrates in twin chamber processing systems having first and second process chambers and shared processing resources are provided herein. In some embodiments, a method may include providing a substrate to the first process chamber of the twin chamber processing system, wherein the first process chamber has a first processing volume that is independent from a second processing volume of the second process chamber; providing one or more processing resources from the shared processing resources to only the first processing volume of the first process chamber; and performing a process on the substrate in the first process chamber.11-03-2011

Jeffrey Koon Yee Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20090323392SMART DETECTION CIRCUIT FOR WRITING TO NON-VOLATILE STORAGE - A memory system includes a substrate, control circuitry on the substrate, a three dimensional memory array (above the substrate) that includes a plurality of memory cells with reversible resistance-switching elements, and a circuit for detecting the setting and resetting of the reversible resistance-switching elements.12-31-2009
20110141788PAGE REGISTER OUTSIDE ARRAY AND SENSE AMPLIFIER INTERFACE - A non-volatile storage device includes a substrate, a monolithic three-dimensional memory array of non-volatile storage elements arranged above a portion of the substrate, a plurality of sense amplifiers in communication with the non-volatile storage elements, a plurality of temporary storage devices in communication with the sense amplifiers, a page register in communication with the temporary storage devices, and one or more control circuits. The one or more control circuits are in communication with the page register, the temporary storage devices and the sense amplifiers. The sense amplifiers are arranged on the substrate underneath the monolithic three-dimensional memory array. The temporary storage devices are arranged on the substrate underneath the monolithic three-dimensional memory array. The page register is arranged on the substrate in an area that is not underneath the monolithic three-dimensional memory array. Data read from the non-volatile storage elements by the sense amplifiers is transferred to the temporary storage devices and then to the page register in response to the one or more control circuits. Data to be programmed into the non-volatile storage elements is transferred to the temporary storage devices from the page register in response to the one or more control circuits.06-16-2011

Tsung-Wen Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20120063192THREE-DEVICE NON-VOLATILE MEMORY CELL - A three-device non-volatile memory cell includes a first resistive device, a second resistive device connected to the first resistive device in a mutual complementary manner, and a third resistive device connected to both said first resistive device and said second resistive device in a mutual complementary manner. A memory array includes a set of read lines intersecting a set of bit lines, a set of program lines intersecting said bit lines, memory cells disposed at intersections between the intersecting set of bit lines. Each of the memory cells includes a program resistive device connected to one of the program lines, a read resistive device connected to one of the read lines, and a bit resistive device connected to one of the bit lines and connected to the program device and the read device in a mutual complementary manner.03-15-2012

Wai Mun Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20110065622NOVEL NITRILE AND AMIDOXIME COMPOUNDS AND METHODS OF PREPARATION FOR SEMICONDUCTOR PROCESSING - Semiconductor processing compositions comprising amidoxime compounds having two or more amidoxime functional groups and their use in semiconductor processing to remove photoresist, polymeric materials, etching residues and copper oxides from semiconductor substrates, particularly substrates comprising copper, low-k dielectric material, titanium nitride, and/or titanium oxynitride.03-17-2011
20110094536Troika Acid Semiconductor Cleaning Compositions and Methods of Use - Semiconductor processing compositions for use with silicon wafers having an insulating layers, and metallization layers on the wafers comprising water and one or more Troika acids which is also referred to as a, α-disubstituted trifunctional oximes or α-(Hydroxyimino) Phosphonoacetic acids, their salts, and their derivatives.04-28-2011
20110098205COMPOSITION AND METHOD FOR CLEANING SEMICONDUCTOR SUBSTRATES - The compositions and methods herein relate to the method for the removal of residues and contaminants from metal or dielectric surfaces. Particularly, a composition and method of cleaning residues after chemical mechanical polishing of a copper or aluminum surface of the semiconductor substrates. A method of cleaning semiconductor substrates comprising contacting the substrates with a solution of water, and sufficient amount of alkyl diphosphonic acid comprising alkyl diphosphonic acid selected from the group of 1 hydroxyethane 1,1 diphosphonic acid, methylene disphosphonic acid, hydroxymethylene diphosphonic acid, dichloromethylene disphosphonic acid, hydroxycyclohexylmethylene disphosphonic acid, 1-hydroxy-3-aminopropane 1,1 diphosphonic acid, 1-hydroxy-4-aminobutane 1,1 diphosphonic acid mixed with dodecylbenzenesulfonic acid, xylenesulfonic acid, toluenesulfonic acid, phosphonoformic acid, sulfamic acid, 2-amino ethane sulfonic acid, or fluoroboric acid or an organic carboxylic acid and pH is adjusted to from greater than 6 to about 10 with a metal ion free base, and a surfactant.04-28-2011
20110118165COMPOSITION AND METHOD FOR TREATING SEMICONDUCTOR SUBSTRATE SURFACE - The present invention is directed to compositions and method of use for treating semiconductor substrate comprising a sulfonium compound and a nucleophilic amine in the fabrication of electronic devices. Optionally, the said composition further comprises a chelating agent, and solvent. The pH of the said solution can be adjusted with the addition of acid or base. The semiconductor manufacturing processes include steps for post etch residue, photoresist removal and steps during chemical mechanical planarization and post chemical mechanical planarization.05-19-2011
20110146724PHOTORESIST STRIPPING SOLUTIONS - The present invention discloses a photoresist stripper for removing positive and negative tone photoresist, bonding adhesive, ink mark and post etch residue etc. from semiconductor substrates. The photoresist stripper comprises: 06-23-2011
20110180747Trioka Acid Semiconductor Cleaning Compositions and Methods of Use - Semiconductor processing compositions for use with silicon wafers having an insulating layers and metalization layers on the wafers comprising water and one or more Troika acids which is also referred to as α,α-disubstituted trifunctional oximes or α-(Hydroxyimino) Phosphonoacetic acids, their salts, and their derivatives.07-28-2011
20110247650COMPOSITION AND METHOD FOR CLEANING SEMICONDUCTOR SUBSTRATES - The compositions and methods for the removal of residues and contaminants from metal or dielectric surfaces comprises at least one alkyl diphosphonic acid, at least one second acidic substance at a mole ratio of about 1:1 to about 10:1 in water, and pH is adjusted to from about 6 to about 10 with a basic compound, and optionally a surfactant. Particularly, a composition and method of cleaning residues after chemical mechanical polishing of a copper or aluminum surface of the semiconductor substrates. One of the embodiment is the method of using the compositions in dilution, wherein the solution may be diluted with DI water at dilution ratios, for example, of up to 1:10, up to 1:50, up to 1:100, up to 1:150, up to 1:250, and up to about 1:500 or any ratios therein.10-13-2011
20110247660PHOTORESIST STRIPPING SOLUTION - The present invention discloses a method of making a photoresist stripper for removing a positive or negative tone photoresist, bonding adhesive, ink mark, and/or post etch residue from a semiconductor substrate, comprising a) an organic sulfonic acid, (b) a halogen-free organic solvent, and (c) an alkanolamine and (d) amine sulfonate or amine sulfonamide or mixtures thereof from semiconductor substrates.10-13-2011

Whay Sing Lee, Milpitas, CA US

Patent application numberDescriptionPublished
20110228860Multi-Value Logic Signaling in Multi-Functional Circuits - Methods and circuits provide function-appropriate signaling to multi-functional circuits on a constrained set of communication lines. A first communication line receives digital signals. The second communication line is employed for digital signaling related to a first function. In further steps, the method comprises initiating, based on a multi-value logic digital signal on the first communication line, an activation process that generates a second-function activation signal. Upon receipt of the second-function activation signal, the second communication line is employed for digital signaling related to a second function. Preferred activation processes involve monitoring the second communication line for a digital signature and sending the activation signal upon detection of an appropriate signature.09-22-2011