| Patent application number | Description | Published |
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| 20100091640 | COMMUNICATIONS DEVICE CAPABLE OF ADJUSTING POWER CONSUMED THEREBY AND METHOD THEREOF, AND ETHERNET COMMUNICATIONS DEVICE - A communications device is capable of adjusting power consumed thereby and includes a receiver and a control circuit. The receiver includes an analog-to-digital converter and a decoding circuit. The analog-to-digital converter receives receive-data from another communications device, converts the receive-data into a digital signal, and provides the digital signal to the decoding circuit for decoding. Based on the digital signal, the control circuit obtains a signaling index that indicates a communications quality of the receiver. The control circuit determines an operating state of the analog-to-digital converter and the decoding circuit in accordance with the signaling index and a receiving index. When the signaling index conforms with a reference range, the control circuit reduces a reference signal so as to reduce linearity of the analog-to-digital converter in accordance with the receiving index, and reduces a decoding capability of the decoding circuit in accordance with the receiving index. | 04-15-2010 |
| 20100098140 | NETWORK COMMUNICATIONS DEVICE CAPABLE OF PROMOTING CONNECTION QUALITY AND METHOD THEREOF - A network communications device is capable of promoting connection quality, and includes: a plurality of transmitting units for outputting a plurality of analog transmit-signals to another network communications device based on a plurality of digital transmit-signals; a plurality of receiving units for outputting a plurality of digital receive-signals based on a plurality of analog receive-signals sent from the another network communications device; an echo canceller for providing a signal for canceling an echo in one of the digital receive-signals; a near end crosstalk canceller for providing a signal for canceling near end crosstalk in one of the digital receive-signals; a decoding circuit for generating a decoded signal based on one of the digital receive-signals subsequent to cancellation of the echo and the near end crosstalk therein; and a power-increasing control circuit for increasing operating power so as to promote connection quality. | 04-22-2010 |
| 20100128625 | Remote Control Method for Physical Layer Device and Related Physical Layer Device - A remote control method for a local physical layer device includes receiving a received packet, determining a coding of the received packet according to a packet format to generate a first determining result, determining an identification of the received packet according to the packet format to generate a second determining result, discarding the received packet according to the first determining result and the second determining result or decoding the received packet according to the packet format to generate a decoding result, and controlling or negotiating with a remote physical layer device according the decoding result. | 05-27-2010 |
| Patent application number | Description | Published |
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| 20090039424 | HIGH-VOLTAGE MOS TRANSISTOR DEVICE - A high-voltage transistor device has a substrate, an isolation structure, a source, a gate, a drain, a plurality of doped regions, a plurality of ion wells, and a first dielectric layer disposed on the substrate. The high-voltage transistor device further has a first conductive layer and a plurality of first field plate rings. The first conductive layer is electrically connected to the drain and at least one of the first field plate rings. | 02-12-2009 |
| 20090111252 | METHOD FOR FORMING DEEP WELL REGION OF HIGH VOLTAGE DEVICE - A method of fabricating a deep well region of a high voltage device is provided. The method includes designating a deep well region that includes a designated highly doped region and a designed scarcely doped region in a substrate. A mask layer, which covers a periphery of the designated deep well region, is formed over the substrate, wherein the mask layer includes a plurality of shielding parts to cover a portion of the designated scarcely doped region. Using the mask layer as an implantation mask, an ion implantation process is performed to implant dopants into the substrate exposed by the mask and to form a plurality of undoped regions in the designated scarcely doped region covered by the shielding parts. The dopants in the designated scarcely doped region are then induced to diffuse to the undoped regions. | 04-30-2009 |
| 20110080213 | SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME - A semiconductor device includes a lateral double diffused metal oxide semiconductor (LDMOS) , a junction field effect transistor (JFET) and an inner circuit. The lateral double diffused metal oxide semiconductor includes a first source, a common drain and a first gate. The junction field effect transistor includes a second source, the common drain and a second gate. The second source is electrically connected to the first gate. The inner circuit is electrically connected to the first source. | 04-07-2011 |
| 20110233673 | LATERAL-DIFFUSION METAL-OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a lateral-diffusion metal-oxide semiconductor (LDMOS) device is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a first region and a second region both having a first conductive type in the semiconductor substrate, wherein the first region not contacting the second region; and performing a thermal process to diffuse the dopants within the first region and the second region into the semiconductor substrate to form a deep well, wherein the doping concentration of the deep well is less than the doping concentration of the first region and the second region. | 09-29-2011 |
