| Patent application number | Description | Published |
|---|
| 20100029049 | METHOD OF FABRICATING ORGANIC THIN FILM TRANSISTOR USING SURFACE ENERGY CONTROL - Provided is a method of fabricating an organic thin film transistor (OTFT) using surface energy control. The method changes a polarity of a gate insulating layer to a polarity of a semiconductor channel layer to be formed on the gate insulating layer by controlling surface energy of the gate insulating layer, thereby promoting growth of the semiconductor channel layer on the gate insulating layer. According to the method, the interface characteristics between the gate insulating layer and the semiconductor channel layer are improved, and thus it is possible to implement an OTFT that can minimize leakage current and has high field effect mobility and low turn-on voltage. | 02-04-2010 |
| 20100187552 | HYBRID WHITE ORGANIC LIGHT EMITTTNG DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a hybrid white organic light emitting diode (OLED) and a method of fabricating the same. A HOMO level difference between a fluorescent emission layer and an electron transport layer in an organic emission layer (OLED) becomes higher than that between the other layers or a LUMO level difference between a fluorescent emission layer and a hole transport layer is higher than that between the other layers, so that a recombination region is restricted to a part of an emission layer to obtain high-efficiency fluorescent light emission. In addition, triplet excitons that are not used in a fluorescent emission layer are transferred to an auxiliary emission layer formed to be spaced apart from a recombination region by a predetermined distance to emit light in a different color from the fluorescent emission layer, so that both singlet and triplet excitons formed in the OLED are used to obtain high-efficiency white light emission. | 07-29-2010 |
| 20110084603 | INORGANIC ELECTROLUMINESCENT DEVICE AND MANUFACTURING METHOD THEREOF - An inorganic electroluminescent device includes: patterned metal electrodes periodically disposed at pre-set intervals; and a phosphor layer positioned on the patterned metal electrodes, wherein as a first voltage and a second voltage are alternately applied to the patterned metal electrodes according to the order of their disposition, light emitted from the phosphor layer is discharged to the spaces between the patterned metal electrodes. | 04-14-2011 |
| 20110097853 | VIA FORMING METHOD AND METHOD OF MANUFACTURING MULTI-CHIP PACKAGE USING THE SAME - A via forming method is provided. The via forming method includes: forming via-holes in a substrate; putting the substrate having the via-holes in a first solution to fill the via-holes with the first solution; sinking the metal particles into the via-holes by supplying a second solution containing metal particles to the first solution, in which there is the substrate; and performing a first curing process of heat-treating the substrate having the via-holes filled with the metal particles so as to form vias in the via-holes. Further, a method of manufacturing a multi-chip package using the via forming method is provided. | 04-28-2011 |
| 20110104322 | TEMPLATES USED FOR NANOIMPRINT LITHOGRAPHY AND METHODS FOR FABRICATING THE SAME - Provided are a template used for nanoimprint lithography and a method for fabricating the same. A raised first deposition layer pattern including at least one downwardly sloped side surface is formed on a substrate. A second deposition layer pattern covering the side surface of the raised first deposition layer pattern and progressively decreasing in width downward along the side surface of the raised first deposition layer pattern is formed. A third deposition layer is formed on the entire surface of a structure on which the second deposition layer pattern. A second deposition layer nano pattern between the raised first deposition layer pattern and a planarized third deposition layer is formed by planarizing the third deposition layer to expose upper surfaces of the raised first deposition layer pattern and the second deposition layer pattern. An intaglio nano pattern defined by side surfaces sloped downward from upper surfaces of the raised first deposition layer pattern and the planarized third deposition layer to the surface of the substrate is formed by removing the second deposition layer nano pattern. | 05-05-2011 |
| 20110136338 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent. | 06-09-2011 |
| 20110147468 | RFID TAG - Provided is a radio frequency identification (RFID) tag whose data can be stably read at a long distance on the basis of a passive RFID tag. The RFID tag includes a rechargeable unit charged to a predetermined voltage, and a power source including a direct current (DC) power source including a rectifier for converting an RF signal into DC power and a regulator for supplying a predetermined DC voltage, an interceptor disposed between the rechargeable unit and the DC power source to connecting or disconnecting the power to the rechargeable unit, and an overvoltage preventor connected to an output terminal of the DC power source in parallel. | 06-23-2011 |
| 20110147787 | ORGANIC LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF - An organic light emitting diode (OLED) and a method for manufacturing the same are provided. In the OLED, patterned metal electrodes are positioned on one or more of upper and lower portions of a light emission layer to allow light generated from the light emission layer to emit to an area between the patterned metal electrodes. | 06-23-2011 |
