Patent application number | Description | Published |
20080220234 | Method of Preparing Wear-Resistant Coating Layer Comprising Metal Matrix Composite and Coating Layer Prepared Thereby - The invention provides a method of preparing a wear-resistant coating layer comprising metal matrix composite and a coating layer prepared by using the same and more particularly, it provides a method of preparing a wear-resistant coating layer comprising metal matrix composite, which comprises the steps of providing a base material, preparing a mixture powder comprising a metal, alloy or mixture particle thereof having an average diameter of 50 to 100 um and a ceramic or mixture particle thereof having an average diameter of 25 to 50 um in a ratio of 1:1 to 3:1 by volume, injecting the mixture powder into a spray nozzle for coating, and coating the mixture powder on the surface of the base material by accelerating the mixture powder in the state of non-fusion at a rate of 300 to 1,200 m/s by the flow of transportation gas flowing in the nozzle and a coating layer prepared by using the same whereby the coating layer with high wear resistance and excellent resistance against fatigue crack on the surface of the base material without causing damages such as heat strain to the base material during the formation of the coating layer can be provided. | 09-11-2008 |
20090120539 | Method of Preparing Metal Matrix Composite and Coating Layer and Bulk Prepared Thereby - This invention provides a method of preparing a metal matrix composite, and a coating layer and bulk prepared by using the same and in particular, it provides a method of preparing a metal matrix composite, which comprises the steps of providing a substrate; preparing a mixed powder comprising i) a first metal powder comprising a metal, alloy or mixture particle thereof, ii) a second metal powder comprising an intermetallic compound forming metal particle which forms an intermetallic compound along with the metal or the alloy element of the alloy, and iii) a ceramic powder comprising a ceramic or mixture particle thereof; injecting the mixed powder prepared above into a spray nozzle for coating; coating the mixed powder on the surface of the substrate by accelerating the mixed powder in the state of non-fusion at a speed of 300 to 1,200 m/s by the flow of transportation gas flowing in the spray nozzle; and forming the intermetallic compound by the thermal treatment of the coated coating layer, and a coating layer and bulk prepared by using the same, whereby the coating layer and bulk material with high wear resistance and excellent resistance against fatigue crack on the surface without causing damages such as heat strain to the substrate during the preparation of the coating layer can be provided. | 05-14-2009 |
Patent application number | Description | Published |
20100176407 | METHOD FOR MANUFACTURING LIGHT EMITTING DIODE PACKAGE AND PACKAGE STRUCTURE THEREOF - The present invention relates to a method for forming a package structure for a light emitting diode (LED) and the LED package structure thereof. By employing the same sawing process to cut through the trenches of the leadframe, the package units are singulated and different lead portions are simultaneously separated from each other in each package unit. Therefore, the overflow issues of the encapsulant can be avoided without using extra taping process. | 07-15-2010 |
20110278609 | PACKAGE STRUCTURE AND PACKAGE PROCESS OF LIGHT EMITTING DIODE - A light emitted diode (LED) package structure and an LED package process are provided. The LED package structure comprises a carrier, a spacer, at least one LED chip, a junction coating, a plurality of phosphor particles, and an encapsulant. The spacer is disposed on the carrier and provided with a reflective layer covering a top surface of the spacer. The LED chip is disposed on the reflective layer and electrically connected to the carrier. The junction coating is disposed over the spacer and covers the LED chip. The phosphor particles are distributed within the junction coating. The encapsulant is disposed on the carrier and encapsulates the LED chip, the spacer and the junction coating. Uniform light output and high illuminating efficiency can be obtained by the phosphor particles uniformly distributed in the junction coating. The junction coating is formed by package level dispensing process to reduce the fabrication cost. | 11-17-2011 |
20110278610 | PACKAGE STRUCTURE AND PACKAGE PROCESS OF LIGHT EMITTING DIODE - A light emitting diode (LED) package structure comprising a carrier, an LED chip, a first encapsulant, at least one bonding wire, a plurality of phosphor particles and a second encapsulant is provided. The LED chip is disposed on the carrier. The LED chip has at least one electrode. The first encapsulant is disposed on the carrier and covering the LED chip. The first encapsulant is provided with at least one preformed opening exposing at least a portion of the at least one electrode. The at least one bonding wire is electrically connected between the at least one electrode and the carrier via the at least one preformed opening. The phosphor particles are distributed within the first encapsulant. The second encapsulant is disposed on the carrier and encapsulates the LED chip, the first encapsulant and the at least one bonding wire. | 11-17-2011 |
Patent application number | Description | Published |
20090177479 | Method for Encoding and Decoding Object-Based Audio Signal and Apparatus Thereof - Methods and apparatuses for encoding and decoding an object-based audio signal are provided. The method of decoding an object-based audio signal includes extracting a down-mix signal and object-based parameter information from an input audio signal, generating an object-audio signal using the down-mix signal and the object-based parameter information, and generating an object audio signal with three-dimensional (3D) effects by applying 3D information to the object audio signal. Accordingly, it is possible to localize a sound image for each object audio signal and thus provide a vivid sense of reality during the reproduction of object audio signals. | 07-09-2009 |
20090210238 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal, which is obtained by downmixing a plurality of object signals, and object side information, extracting metadata from the object-side information and displaying an information regarding the object signals based on the metadata. | 08-20-2009 |
20090210239 | Method for Encoding and Decoding Object-Based Audio Signal and Apparatus Thereof - The present invention relates to a method and apparatus for encoding and decoding object-based audio signals. This audio decoding method includes extracting a first audio signal and a first audio parameter in which a music object are encoded on a channel basis and a second audio signal and a second audio parameter in which a vocal object are encoded on an object basis, from an audio signal, generating a third audio signal by employing at least one of the first and second audio signals, and generating a multi-channel audio signal by employing at least one of the first and second audio parameters and the third audio signal. Accordingly, the amount of calculation in encoding and decoding processes and the size of a bitstream that is encoded can be reduced efficiently. | 08-20-2009 |
20090265164 | Method for Encoding and Decoding Object-Based Audio Signal and Apparatus Thereof - The present invention relates to a method for encoding and decoding object-based audio signal and an apparatus thereof. The audio decoding method includes extracting a first audio signal in which one or more music objects are grouped and encoded, a second audio signal in which at least two vocal objects are grouped step by step and encoded, and a residual signal corresponding to the second audio signal, from an audio signal, and generating a third audio signal by employing at least one of the first and second audio signals and the residual signal. A multi-channel audio signal is then generated by employing the third audio signal. Accordingly, a variety of play modes can be provided efficiently. | 10-22-2009 |
20090326958 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving first and second audio signals, which are object-encoded; generating third object energy information based on first object energy information included in the first audio signal and second object energy information included in the second audio signal; and generating a third audio signal by combining the first and second object signals and the third object energy information. | 12-31-2009 |
20100076772 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal and object-based side information, the downmix signal comprising at least two downmix channel signals; extracting gain information from the object-based side information and generating modification information for modifying the downmix channel signals on a channel-by-channel basis based on the gain information; and modifying the downmix channel signals by applying the modification information to the downmix channel signals. | 03-25-2010 |
20110200197 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal and object-based side information, the downmix signal comprising at least two downmix channel signals; extracting gain information from the object-based side information and generating modification information for modifying the downmix channel signals on a channel-by-channel basis based on the gain information; and modifying the downmix channel signals by applying the modification information to the downmix channel signals. | 08-18-2011 |
20110202356 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal, which is obtained by downmixing a plurality of object signals, and object side information, extracting metadata from the object-side information and displaying an information regarding the object signals based on the metadata. | 08-18-2011 |
20110202357 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal, which is obtained by downmixing a plurality of object signals, and object side information, extracting metadata from the object-side information and displaying an information regarding the object signals based on the metadata. | 08-18-2011 |
20140297294 | Methods and Apparatuses for Encoding and Decoding Object-Based Audio Signals - An audio decoding method and apparatus and an audio encoding method and apparatus which can efficiently process object-based audio signals are provided. The audio decoding method includes receiving a downmix signal and object-based side information, the downmix signal comprising at least two downmix channel signals; extracting gain information from the object-based side information and generating modification information for modifying the downmix channel signals on a channel-by-channel basis based on the gain information; and modifying the downmix channel signals by applying the modification information to the downmix channel signals. | 10-02-2014 |
Patent application number | Description | Published |
20080220234 | Method of Preparing Wear-Resistant Coating Layer Comprising Metal Matrix Composite and Coating Layer Prepared Thereby - The invention provides a method of preparing a wear-resistant coating layer comprising metal matrix composite and a coating layer prepared by using the same and more particularly, it provides a method of preparing a wear-resistant coating layer comprising metal matrix composite, which comprises the steps of providing a base material, preparing a mixture powder comprising a metal, alloy or mixture particle thereof having an average diameter of 50 to 100 um and a ceramic or mixture particle thereof having an average diameter of 25 to 50 um in a ratio of 1:1 to 3:1 by volume, injecting the mixture powder into a spray nozzle for coating, and coating the mixture powder on the surface of the base material by accelerating the mixture powder in the state of non-fusion at a rate of 300 to 1,200 m/s by the flow of transportation gas flowing in the nozzle and a coating layer prepared by using the same whereby the coating layer with high wear resistance and excellent resistance against fatigue crack on the surface of the base material without causing damages such as heat strain to the base material during the formation of the coating layer can be provided. | 09-11-2008 |
20090120539 | Method of Preparing Metal Matrix Composite and Coating Layer and Bulk Prepared Thereby - This invention provides a method of preparing a metal matrix composite, and a coating layer and bulk prepared by using the same and in particular, it provides a method of preparing a metal matrix composite, which comprises the steps of providing a substrate; preparing a mixed powder comprising i) a first metal powder comprising a metal, alloy or mixture particle thereof, ii) a second metal powder comprising an intermetallic compound forming metal particle which forms an intermetallic compound along with the metal or the alloy element of the alloy, and iii) a ceramic powder comprising a ceramic or mixture particle thereof; injecting the mixed powder prepared above into a spray nozzle for coating; coating the mixed powder on the surface of the substrate by accelerating the mixed powder in the state of non-fusion at a speed of 300 to 1,200 m/s by the flow of transportation gas flowing in the spray nozzle; and forming the intermetallic compound by the thermal treatment of the coated coating layer, and a coating layer and bulk prepared by using the same, whereby the coating layer and bulk material with high wear resistance and excellent resistance against fatigue crack on the surface without causing damages such as heat strain to the substrate during the preparation of the coating layer can be provided. | 05-14-2009 |
Patent application number | Description | Published |
20100038239 | DEVICE FOR FABRICATING FLEXIBLE FILM - A device for fabricating a flexible film is provided. The device includes a serving unit providing an insulation film; a main processing unit including at least one of a dust removing unit, an etching unit, a neutralizing unit, a coupling unit, a catalyst bonding unit, a plating unit, and a drying unit; an assistant power unit controlling a tension of the insulation film; a top transporter disposed at an upper part of the main processing unit; and a bottom transporter disposed at a lower part of the main processing unit, wherein the top transporter includes a squeezing unit pressing a material on the insulation film. The device can improve the quality of a flexible film by pressing the flexible film using the squeezing unit. | 02-18-2010 |
20100072246 | DEVICE FOR TRANSFERRING FILM - A device for transferring a film is provided. The device includes a roller transferring a film; a balancing unit connected to the roller by fixed supporters, the fixed supporters being disposed on both sides of the roller; and springs disposed on both sides of the balancing unit, wherein, if the film is out of balance, the balancing unit restores balance to the film by vibrating the both sides of the balancing unit. That is, if a film becomes out of balance during the transfer of the film, the device may restore balance to the film with the aid of the balancing unit which can vibrate on both sides of the balancing unit due to the springs. | 03-25-2010 |
Patent application number | Description | Published |
20100148316 | Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV - A semiconductor device has a core semiconductor device with a through silicon via (TSV). The core semiconductor device includes a plurality of stacked semiconductor die and semiconductor component. An insulating layer is formed around the core semiconductor device. A conductive via is formed through the insulating layer. A first interconnect structure is formed over a first side of the core semiconductor device. The first interconnect structure is electrically connected to the TSV. A second interconnect structure is formed over a second side of the core semiconductor device. The second interconnect structure is electrically connected to the TSV. The first and second interconnect structures include a plurality of conductive layers separated by insulating layers. A semiconductor die is mounted to the first interconnect structure. The semiconductor die is electrically connected to the core semiconductor device through the first and second interconnect structures and TSV. | 06-17-2010 |
20110260338 | Semiconductor Device and Method of Forming Adjacent Channel and DAM Material Around Die Attach Area of Substrate to Control Outward Flow of Underfill Material - A semiconductor device has a flipchip or PoP semiconductor die mounted to a die attach area interior to a substrate. The substrate has a contact pad area around the die attach area and flow control area between the die attach area and contact pad area. A first channel is formed in a surface of the substrate within the flow control area. The first channel extends around a periphery of the die attach area. A first dam material is formed adjacent to the first channel within the flow control area. An underfill material is deposited between the die and substrate. The first channel and first dam material control outward flow of the underfill material to prevent excess underfill material from covering the contact pad area. A second channel can be formed adjacent to the first dam material. A second dam material can be formed adjacent to the first channel. | 10-27-2011 |
20120126395 | Semiconductor Device and Method of Forming Uniform Height Insulating Layer Over Interposer Frame as Standoff for Semiconductor Die - A semiconductor device has an interposer frame having a die attach area. A uniform height insulating layer is formed over the interposer frame at corners of the die attach area. The insulating layer can be formed as rectangular or circular pillars at the corners of the die attach area. The insulating layer can also be formed in a central region of the die attach area. A semiconductor die has a plurality of bumps formed over an active surface of the semiconductor die. The bumps can have a non-fusible portion and fusible portion. The semiconductor die is mounted over the insulating layer which provides a uniform standoff distance between the semiconductor die and interposer frame. The bumps of the semiconductor die are bonded to the interposer frame. An encapsulant is deposited over the semiconductor die and interposer frame and between the semiconductor die and interposer frame. | 05-24-2012 |
20120280374 | Semiconductor Device and Method of Mounting Cover to Semiconductor Die and Interposer with Adhesive Material - A semiconductor device has an interposer with a die attach area interior to the interposer and cover attach area outside the die attach area. A channel is formed into a surface of the interposer within the cover attach area. A dam material is formed over the surface of the interposer within the cover attach area between the channel and edge of the interposer. A semiconductor die is mounted to the die attach area of the interposer. An adhesive material is deposited in the cover attach area away from the channel and dam material. A cover, such as a heat spreader or shielding layer, is mounted to the die and interposer within the cover attach area. The cover presses the adhesive material into the channel and against the dam material to control outward flow of the adhesive material. Alternatively, ACF can be formed over the interposer to mount the cover. | 11-08-2012 |
20120286418 | Semiconductor Device and Method of Forming Dummy Pillars Between Semiconductor Die and Substrate for Maintaining Standoff Distance - A semiconductor device has a semiconductor die with an insulation layer formed over an active surface of the semiconductor die. A conductive layer is formed over the first insulating layer electrically connected to the active surface. A plurality of conductive pillars is formed over the conductive layer. A plurality of dummy pillars is formed over the first insulating layer electrically isolated from the conductive layer and conductive pillars. The semiconductor die is mounted to a substrate. A height of the dummy pillars is greater than a height of the conductive pillars to maintain the standoff distance between the semiconductor die and substrate. The dummy pillars can be formed over the substrate. The dummy pillars are disposed at corners of the semiconductor die and a central region of the semiconductor die. A mold underfill material is deposited between the semiconductor die and substrate. | 11-15-2012 |
20130069221 | Semiconductor Device and Method of Forming Conductive Protrusions Over Conductive Pillars or Bond Pads as Fixed Offset Vertical Interconnect Structures - A semiconductor device has a semiconductor die mounted to a substrate. A plurality of conductive pillars is formed over a semiconductor die. A plurality of conductive protrusions is formed over the conductive pillars. Bumps are formed over the conductive protrusions and conductive pillars. Alternatively, the conductive protrusions are formed over the substrate. A conductive layer is formed over the substrate. The semiconductor die is mounted to the substrate by reflowing the bumps at a temperature that is less than a melting point of the conductive pillars and conductive protrusions to metallurgically and electrically connect the bumps to the conductive layer while maintaining a fixed offset between the semiconductor die and substrate. The fixed offset between the semiconductor die and substrate is determined by a height of the conductive pillars and a height of the conductive protrusions. A mold underfill material is deposited between the semiconductor die and substrate. | 03-21-2013 |
20130147065 | Semiconductor Device and Method of Forming Adjacent Channel and Dam Material Around Die Attach Area of Substrate to Control Outward Flow of Underfill Material - A semiconductor device has a flipchip or PoP semiconductor die mounted to a die attach area interior to a substrate. The substrate has a contact pad area around the die attach area and flow control area between the die attach area and contact pad area. A first channel is formed in a surface of the substrate within the flow control area. The first channel extends around a periphery of the die attach area. A first dam material is formed adjacent to the first channel within the flow control area. An underfill material is deposited between the die and substrate. The first channel and first dam material control outward flow of the underfill material to prevent excess underfill material from covering the contact pad area. A second channel can be formed adjacent to the first dam material. A second dam material can be formed adjacent to the first channel. | 06-13-2013 |
20130175701 | Semiconductor Device and Method of Forming Reduced Surface Roughness in Molded Underfill for Improved C-SAM Inspection - A semiconductor device includes a semiconductor die. An interconnect structure is formed over an active surface of the semiconductor die. An encapsulant is formed over the semiconductor die and interconnect structure including a first surface opposite the interconnect structure. A peripheral portion of the first surface includes a first roughness disposed outside a footprint of the semiconductor die. A semiconductor die portion of the first surface includes a second roughness less than the first roughness disposed over the footprint of the semiconductor die. The first surface of the encapsulant is disposed within a mold and around the semiconductor die to contact a surface of the mold that includes a third roughness equal to the first roughness and a fourth roughness equal to the second roughness. The first roughness includes a roughness of less than 1.0 micrometers. The second roughness includes a roughness in a range of 1.2-1.8 micrometers. | 07-11-2013 |
20130234318 | Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability - A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate. | 09-12-2013 |
20130241039 | Semiconductor Device and Method of Mounting Cover to Semiconductor Die and Interposer with Adhesive Material - A semiconductor device has an interposer with a die attach area interior to the interposer and cover attach area outside the die attach area. A channel is formed into a surface of the interposer within the cover attach area. A dam material is formed over the surface of the interposer within the cover attach area between the channel and edge of the interposer. A semiconductor die is mounted to the die attach area of the interposer. An adhesive material is deposited in the cover attach area away from the channel and dam material. A cover, such as a heat spreader or shielding layer, is mounted to the die and interposer within the cover attach area. The cover presses the adhesive material into the channel and against the dam material to control outward flow of the adhesive material. Alternatively, ACF can be formed over the interposer to mount the cover. | 09-19-2013 |
20130299995 | Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate - A semiconductor device has a substrate and insulating layer formed over a surface of the substrate. A first conductive layer is formed over the surface of the substrate. A second conductive layer is formed over an opposing surface of the substrate. A conductive via is formed through the substrate. An opening is formed in the insulating layer while leaving the first conductive layer intact. The opening narrows with a non-linear side or linear side. The opening can have a rectangular shape. A semiconductor die is mounted over the surface of the substrate. An underfill material is deposited between the semiconductor die and substrate. The opening in the insulating layer reduces a flow rate of the underfill material proximate to the opening. The flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening. | 11-14-2013 |
20130320519 | Semiconductor Device and Method of Backgrinding and Singulation of Semiconductor Wafer while Reducing Kerf Shifting and Protecting Wafer Surfaces - A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and into the trench. A lamination tape is applied over the protective coating. A portion of a second surface of the semiconductor wafer is removed by backgrinding or wafer thinning to expose the protecting coating in the trench. A die attach film is applied over the second surface of the semiconductor wafer. A cut or modified region is formed in the die attach film under the trench using a laser. The semiconductor wafer is expanded to separate the cut or modified region of the die attach film and singulate the semiconductor wafer. | 12-05-2013 |
20140103503 | Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability - A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate. | 04-17-2014 |
20140239509 | Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV - A semiconductor device has a core semiconductor device with a through silicon via (TSV). The core semiconductor device includes a plurality of stacked semiconductor die and semiconductor component. An insulating layer is formed around the core semiconductor device. A conductive via is formed through the insulating layer. A first interconnect structure is formed over a first side of the core semiconductor device. The first interconnect structure is electrically connected to the TSV. A second interconnect structure is formed over a second side of the core semiconductor device. The second interconnect structure is electrically connected to the TSV. The first and second interconnect structures include a plurality of conductive layers separated by insulating layers. A semiconductor die is mounted to the first interconnect structure. The semiconductor die is electrically connected to the core semiconductor device through the first and second interconnect structures and TSV. | 08-28-2014 |
20140264817 | Semiconductor Device and Method of Using Partial Wafer Singulation for Improved Wafer Level Embedded System in Package - A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the opening leaving a second surface of the semiconductor wafer exposed. A portion of the second surface of the semiconductor wafer is removed to separate the first semiconductor die. An interconnect structure is formed over the second semiconductor die and encapsulant. A thermal interface material is deposited over the second surface of the first semiconductor die. A heat spreader is disposed over the thermal interface material. An insulating layer is formed over the first surface of the semiconductor wafer. A vertical interconnect structure is formed around the first semiconductor die. Conductive vias are formed through the first semiconductor die. | 09-18-2014 |
20140264905 | Semiconductor Device and Method of Forming WLCSP with Semiconductor Die Embedded within Interconnect Structure - A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. An insulating layer is formed over the encapsulant and a first surface of the semiconductor die. A semiconductor component is disposed over the insulating layer and first surface of the semiconductor die. A first interconnect structure is formed over the encapsulant and first surface of the semiconductor die to embed the semiconductor component. A conductive via is formed in the semiconductor die. A heat sink is formed over the semiconductor die. A second interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the semiconductor component. An opening is formed in the insulating layer. | 09-18-2014 |
Patent application number | Description | Published |
20100176407 | METHOD FOR MANUFACTURING LIGHT EMITTING DIODE PACKAGE AND PACKAGE STRUCTURE THEREOF - The present invention relates to a method for forming a package structure for a light emitting diode (LED) and the LED package structure thereof. By employing the same sawing process to cut through the trenches of the leadframe, the package units are singulated and different lead portions are simultaneously separated from each other in each package unit. Therefore, the overflow issues of the encapsulant can be avoided without using extra taping process. | 07-15-2010 |
20110278609 | PACKAGE STRUCTURE AND PACKAGE PROCESS OF LIGHT EMITTING DIODE - A light emitted diode (LED) package structure and an LED package process are provided. The LED package structure comprises a carrier, a spacer, at least one LED chip, a junction coating, a plurality of phosphor particles, and an encapsulant. The spacer is disposed on the carrier and provided with a reflective layer covering a top surface of the spacer. The LED chip is disposed on the reflective layer and electrically connected to the carrier. The junction coating is disposed over the spacer and covers the LED chip. The phosphor particles are distributed within the junction coating. The encapsulant is disposed on the carrier and encapsulates the LED chip, the spacer and the junction coating. Uniform light output and high illuminating efficiency can be obtained by the phosphor particles uniformly distributed in the junction coating. The junction coating is formed by package level dispensing process to reduce the fabrication cost. | 11-17-2011 |
20110278610 | PACKAGE STRUCTURE AND PACKAGE PROCESS OF LIGHT EMITTING DIODE - A light emitting diode (LED) package structure comprising a carrier, an LED chip, a first encapsulant, at least one bonding wire, a plurality of phosphor particles and a second encapsulant is provided. The LED chip is disposed on the carrier. The LED chip has at least one electrode. The first encapsulant is disposed on the carrier and covering the LED chip. The first encapsulant is provided with at least one preformed opening exposing at least a portion of the at least one electrode. The at least one bonding wire is electrically connected between the at least one electrode and the carrier via the at least one preformed opening. The phosphor particles are distributed within the first encapsulant. The second encapsulant is disposed on the carrier and encapsulates the LED chip, the first encapsulant and the at least one bonding wire. | 11-17-2011 |
Patent application number | Description | Published |
20090261470 | CHIP PACKAGE - A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance. | 10-22-2009 |
20140346654 | CHIP PACKAGE - A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance. | 11-27-2014 |