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Lee, Hsin-Chu City
Chia-Yi Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090160794 | Method for Scroll Control on Window by a Touch Panel - A method for scroll control on a window by a touch panel includes detecting the number of objects touching on the touch panel, enabling a scrolling function when the number of the objects is a first predetermined number, and detecting whether at least one of the objects is touching on an edge of the touch panel after the scrolling function is enabled, if at least one of the objects is touching on the edge of the touch panel, automatically performing a corresponding one of a vertical scrolling and a horizontal scrolling toward a positional direction of the edge. The method is more conveniently operative to the user. | 06-25-2009 |
Ching-Hone Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100289552 | SYSTEMS INCLUDING LEVEL SHIFTER HAVING VOLTAGE DISTRIBUTOR - An exemplary embodiment of such a system includes: a level shifter operative to transform an input signal into an output signal, the level shifter includes: a voltage distributor operative to receive the input signal and distribute potential levels at a first node and a second node to respectively output a first signal and a second signal, and the voltage distributor includes: a current limiter, operative to provide a limited current passing through the first node; a switch, operative to selectively establish an electrical connection between the first node and the second node; and a first transistor having a first electrode, a second electrode, and a first control electrode, wherein the first electrode is connected to the second node, the second electrode is utilized to receive the input signal, and the first control electrode is coupled to the first node; and an output circuit, operative to generate the output signal. | 11-18-2010 |
Chun-Yu Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100123853 | LIQUID CRYSTAL DISPLAY PANEL AND APPARATUS COMPRISING THE SAME - A liquid crystal display panel and an apparatus comprising the same are disclosed. The apparatus comprises the liquid crystal display panel and a backlight module. The backlight module includes a lighting area. The liquid crystal display panel is disposed opposite to the backlight module. The liquid crystal display panel comprises a first substrate facing the backlight module and a first polarizer disposed at the outside of the first substrate. The first polarizer covers the lighting area of the backlight module, but does not exceed or flush with the first substrate. | 05-20-2010 |
Hsuan-Hsien Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100177209 | Interactive device capable of improving image processing - An interactive device for improving image processing. The interactive device includes a processing module and a controller. The processing module includes a substrate, an image sensor formed on the substrate for generating a plurality of pixel signals, a calculation unit formed on the substrate for calculating at least one motion vector based on the plurality of pixel signals, and a transmission interface formed on the substrate for serially outputting the motion vector. The controller is used for controlling operation of the interactive device based on the motion vector output by the transmission interface | 07-15-2010 |
Jin-Yuan Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110309473 | CHIP PACKAGE WITH DIE AND SUBSTRATE - A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glass sandwiched substrates. The substrates form the base for mounting semiconductor dies and fabricating the thin film interconnect structure. | 12-22-2011 |
Ko-Yen Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110033174 | CONTROL CIRCUIT FOR A VARIABLE FREQUENCY DC MOTOR - The present invention discloses a control circuit for a variable frequency DC motor, the control circuit comprising: a controller, having a voltage sensing input end and a control output end, wherein the control output end is used to deliver an output signal according to the difference between a threshold voltage and the voltage at the voltage sensing input end; a transistor, having a first terminal, a second terminal and a third terminal, wherein the first terminal is coupled to the voltage sensing input end, and the second terminal is coupled to the variable frequency DC motor, and the third terminal is coupled to a reference ground; and a voltage divider, coupled between the second terminal and the third terminal, used to generate a feedback voltage for the voltage sensing input end; wherein the voltage at the second terminal is regulated according to the threshold voltage. | 02-10-2011 |
| 20110050308 | STANDBY POWER REDUCTION METHOD AND APPARATUS FOR SWITCHING POWER APPLICATIONS - The present invention discloses a standby power reduction method and apparatus for switching power applications, the method comprising the steps of: performing a hysteresis comparison on a supply voltage to generate a selecting signal having a first state and a second state, wherein the hysteresis comparison has a high threshold voltage compared to the supply voltage when the selecting signal is at the first state, and the hysteresis comparison has a low threshold voltage compared to the supply voltage when the selecting signal is at the second state; and determining a UVLO_ON voltage according to the selecting signal, wherein the UVLO_ON voltage is equal to a first level when the selecting signal is at the first state, and the UVLO_ON voltage is equal to a second level when the selecting signal is at the second state. | 03-03-2011 |
| 20110062886 | OPEN LOOP LED DRIVING CIRCUIT - The present invention discloses an open loop LED driving circuit, having a turn-on period and a turn-off period, the circuit comprising: a power stage, used to store a magnetic energy supplied from a voltage source during the turn-on period and deliver the magnetic energy to a set of LEDs during the turn-off period; and a control unit, having a turn-off period control terminal coupled to the voltage source, and a channel of which a first terminal is coupled to the power stage and a second terminal is coupled to a reference ground, wherein the channel is switched on at a time according to the voltage of the voltage source to determine the turn-off period. | 03-17-2011 |
Kung-Hong Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080252362 | NEGATIVE VOLTAGE CONVERTER - A negative voltage converter includes six transistors. A first end and a control end of a first transistor are coupled to a signal input. A first end of a second transistor is coupled to the signal input, and a control end of which is coupled to a first clock and the first transistor. A first end of a third transistor is coupled to the signal input, a control end of the third transistor is coupled with a second clock and the second transistor. A first end of a fourth transistor is coupled to the second end of the third transistor, a control end of which is coupled with the first clock and the third transistor. A first end of a fifth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the second clock and the fourth transistor A first end of a sixth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the first clock and the fifth transistor. | 10-16-2008 |
Tung-Hsing Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080197351 | TESTKEY DESIGN PATTERN FOR GATE OXIDE - A testkey design pattern includes a least one conductive contact, at least one conductive line of a first width vertically and electrically connected to the conductive contact, and at least one pair of source and drain respectively directly connected to each side of the conductive line. The pair of source and drain and part of the conductive line of a first length directly connected to the source and drain form an electronic device. The testkey design patterns are advantageous in measuring capacitance with less error and for better gate oxide thickness extraction. | 08-21-2008 |
Wei-Hua Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080280382 | Wafer-level test module for testing image sensor chips, the related test method and fabrication - A wafer-level test module is disclosed to include a base layer having multiple first apertures spaced from one another at a pitch corresponding to the pitch of the image sensor chips of an integrated circuit wafer, a cover layer having second apertures respectively axially aimed at the first apertures, and an optical layer sandwiched between the base layer and the cover layer having multiple optical lenses of which the optical axes pass through the first apertures and the second apertures, so that when one image capturing device of the image sensor chips of an integrated circuit wafer is adjusted to the image plane of one of the optical lenses and the wafer-level test module is set in alignment with the integrated circuit wafer horizontally and vertically, then the effective test light can be simultaneously projected onto the image capturing devices of the respective image sensor chips through the wafer-level test module to achieve an effective wafer-level test on multiple image sensor chips of the integrated circuit wafer accurately and rapidly. | 11-13-2008 |
Wen-Fang Lee, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080299729 | METHOD OF FABRICATING HIGH VOLTAGE MOS TRANSISTOR DEVICE - A substrate is provided, and a sacrificial pattern having an opening partially exposing a high voltage device region is formed on the substrate. Subsequently, a gate oxide layer is formed in the opening, and the sacrificial pattern is removed. A gate electrode, and two heavily doped regions are formed. Than, a salicidation process is carried out to form salicides on the surface of the gate electrode and the heavily doped regions. | 12-04-2008 |