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Lee, Cupertino

Bongsun Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100309231METHOD FOR ADJUSTING THE SETTINGS OF A REPRODUCTION COLOR DEVICE - According to this method, successive iterations are launched according to the following steps:—1) the reproduction color device is set according to settings,—2) reference input colors are calibrated putting calibrated input colors,—4) reproduction quality rating value are calculated,—5) a reproduction quality criterion is applied to decide or not to go for another iteration with different settings. This method allows the optimization of the settings according to color preferences.12-09-2010
20110122161DISPLAY CHARACTERIZATION WITH FILTRATION - A display and a method of characterizing a display includes a means of enabling the display to be measured by a characterization system having a measurement sensor that measures a difference between display characteristics and target values of a screen. The screen is provided with at least a first filter. The first filter is a color correction filter that decreases the difference between the display characteristics and the target values of the screen.05-26-2011
20110148907Method and system for image display with uniformity compensation - A method and system are provided for image display with color transformations that also compensate for non-uniformities in different regions of a display. The method involves performing color measurements at different locations or zones of a display, and deriving respective compensation factors based on these measurements and corresponding target color values, such as those associated with a reference display. These zone- or location-specific compensation factors can be used to derive appropriate compensation factors for arbitrary pixels in an image, which are then used for color transformation of the pixels for display.06-23-2011
20110154426METHOD AND SYSTEM FOR CONTENT DELIVERY - A method and system of content delivery provide availability of at least two versions of content by delivering data for a first version of content, a difference data representing at least one difference between the first version and a second version of content, and metadata derived from two transformation functions that relate the first version and the second version of content respectively to a master version.06-23-2011

Changhak Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090115033Reduction of package height in a stacked die configuration - A method and structure for reducing the size of semiconductor package is disclosed. In one example embodiment, a method for stacking dies of a semiconductor package includes forming a set of insulated bonding wires between respective bonding pads of a first semiconductor integrated circuit die and a conductive layer electrically detached from the respective bonding pads, applying an adhesive material on a top surface of the first semiconductor integrated circuit die, and securing a second semiconductor integrated circuit die one the top surface of the first semiconductor integrated circuit die with the adhesive material.05-07-2009

Chang-Hwa Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090271560Dynamic Fix-Up of Global Variables During System BIOS Execution - A method is described for preserving the flexibility associated with relative memory addressing in programs designed to be stored in read-only memory.10-29-2009

Charles Chung Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20080261450PORTABLE AND RETRACTABLE FLASH DRIVE WITH OPTIONAL ROTARY DEPLOYING AND RETRACTING AND FINGERPRINT VERIFICATION CAPABILITY - In one embodiment of the present invention a portable and retractable flash drive with optional rotary deploying and retracting and fingerprint verification capability is disclosed to include a cylinder assembly. The cylinder assembly has a connector situated on one end, and a fingerprint sensor situated the surface. The portable and retractable flash drive with optional rotary deploying and retracting and fingerprint verification capability further includes a rotary tube at least partially enclosing the cylinder assembly for deploying the connector. An end tube is rotatably attached to one of the two ends of the rotary tube, and an end cap is attached to the other of the two ends of the rotary tube. The rotary tube is rotated relative to the end tube to slide the cylinder assembly back and forth inside the rotary tube to extend and retract the connector.10-23-2008
20080278902Universal Serial Bus (USB) Flash Drive with Swivel Cap Functionalities with Two Locking Positions - A Universal Serial Bus (USB) flash drive includes a slim USB device having an end used to couple the USB flash drive to a host and an opposite end, and a swivel “strap shaped” metal cap having a circle cut out disposed on both cap legs. The snap coupling circle attachment allows the swivel cap to rotate substantially into a first and a second locking position and to rotate substantially 360 degrees about the z-axis of the USB device. The metal cap is generally in a locked position when the snap slot is aligned atop the snap lock tabs such that the protrusion snap ring is descended downward until the positioned flush against the snap lock groove. When unlocked the protrusion snap ring is raised up and rested upon the two snap lock tabs.11-13-2008
20080278903Package and Manufacturing Method for Multi-Level Cell Multi-Media Card - An embodiment of the present invention includes an electronic data flash memory card (memory card) comprising a top cover (TC), a printed circuit board assembly (PCBA) and a bottom cover (BC). The TC includes a plurality of ultrasonic bonders, a plurality of breakaway tabs (tabs) and a connection device. The PCBA includes at least one memory integrated circuit (IC) and at least one controller IC. The BC includes a plurality of tabs.11-13-2008
20080280490Press/Push Universal Serial Bus (USB) Flash Drive with Deploying and Retracting Functionalities with Elasticity Material and Fingerprint Verification Capability - Briefly, an embodiment of the present invention includes a portable flash memory drive with a simplified mechanism, based upon the resilient properties of the material used to create the parts, for reliable extension and retraction of the device's interface plug. The portable flash memory drive is comprised of a metal housing (or case), a printed circuit board (PCB) assembly, PCB support, PCB assembly end cap, an upper, and lower housing, and in some embodiments a fingerprint sensor and/or key ring assembly. The press/push switch mechanism is located on either the side of the portable flash memory device, or the top; and relies upon the resilient properties of the material used to create the metal housing or end cap, to create a smooth, locking mechanism for the extension or retraction of the interface (i.e., USB or firewire) plug. The switching/locking mechanism relies upon grooves or notches within the material of the upper and/or lower housing for tracking and locking, coupled with protrusion tabs on the sliding components of the end cap or metal housing. Alternatively, in some embodiments of the present invention, a fingerprint sensor is also extended or retracted contemporaneously with the interface plug, and allows the end user to secure and unlock the data contained, in whole or in part, therein.11-13-2008
20080282128Method of Error Correction Code on Solid State Disk to Gain Data Security and Higher Performance - An electronic data storage device having a Reed Solomon (RS) decoder including a syndrome calculator block responsive to information including data and overhead and operative to generate a syndrome, in accordance with an embodiment of the present invention. The electronic data storage device further includes a root finder block coupled to receive said syndrome and operative to generate at least two roots, said RS decoder for processing said two roots to generate at least one error address identifying a location in said data wherein said error lies; and an erasure syndrome calculator block responsive to said information and operative to generate an erasure syndrome, said RS decoder responsive to said information identifying a disk crash, said RS decoder for processing said erasure syndrome to generate an erasure error to recover the data in said disk crash.11-13-2008

Chih-Ping Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20120044930Device initiated DQoS system and method - A Data-Over-Cable Service Interface Specification (DOCSIS) cable modem system is coupled to: i) via a local area internet protocol (IP) network, a voice over internet protocol (VoIP) device operating Session Initiation Protocol (SIP) for signaling a VoIP media session; and ii) via a DOCSIS network, a cable modem termination system (CMTS) via a network. The cable modem system comprises instructions stored in a memory and executed by a processor. The instructions comprise: i) in response to receiving a frame via the local area IP network, determining if the frame is a Session Initiation Protocol (SIP) invite message signaling a VoIP session with a remote endpoint; and ii) in response to determining that the frame is a SIP invite message, generating a DOCSIS message to the CMTS to request an addition of reserved bandwidth on the DOCSIS network for the VoIP session.02-23-2012
20120047273Device initiated multiple grants per interval system and method - A cable modem integrated session border control circuit operates as a point of demarcation between a local area network (LAN) and a DOCSIS network and, in response to receiving a Session Initiation Protocol (SIP) message, which includes Session Description Protocol (SDP), from a VoIP device coupled to the LAN, communicates with a Cable Modem Termination System (CMTS) to take advantage of DOCSIS Dynamic Quality of Service (DQoS) if a VoIP session between the VoIP device and a remote endpoint includes use of the DOCSIS network. The cable modem integrated session border controller further determines required service flow attributes. If required service flow attributes, as determined from the SDP of the SIP message, matches service flow attributes of an existing UGS service flow with a CMTS, a DOCSIS Dynamic Service Chance (DSC) request is used to add an additional sub flow to the existing UGS service flow. If attributes fail to match attributes of all existing UGS service flows, a DOCSIS Dynamic Service Change (DSC) request is used to initiate an additional UGS service flow with the required service flow attributes.02-23-2012

Chun-Sheu Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110228073ILLUMINATION APPARATUS OPTIMIZED FOR SYNTHETIC APERTURE OPTICS IMAGING USING MINIMUM SELECTIVE EXCITATION PATTERNS - A synthetic aperture optics (SAO) imaging method minimizes the number of selective excitation patterns used to illuminate the imaging target, based on the objects' physical characteristics corresponding to spatial frequency content from the illuminated target and/or one or more parameters of the optical imaging system used for SAO. With the minimized number of selective excitation patterns, the time required to perform SAO is reduced dramatically, thereby allowing SAO to be used with DNA sequencing applications that require massive parallelization for cost reduction and high throughput. In addition, an SAO apparatus optimized to perform the SAO method is provided. The SAO apparatus includes a plurality of interference pattern generation modules that can be arranged in a half-ring shape.09-22-2011

Do Hyung Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20080223521Plasma Source Coil and Plasma Chamber Using the Same - A plasma source coil includes a bushing arranged at a center part, and a plurality of unit coils arranged in the form of a concentric circle from a circumference of the bushing on the bases of the bushing. One end of each unit coil and one end of the bushing are commonly connected to a power-supply terminal, and the other end of each unit coil and the other end of the bushing are commonly connected to a ground terminal.09-18-2008

Dong Su Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090041051ENHANCED COMMUNICATION NETWORK TAP PORT AGGREGATOR ARRANGEMENT AND METHODS THEREOF - An arrangement in a network device for facilitating at least one of multiple connection speeds with a network, active response between a monitoring device and an end-device, and power over Ethernet (POE) over a network is provided. As a facilitator of multiple connection speeds, the arrangement includes a plurality of physical layer interface (PHY) and media access controller (MAC) that are configured to support multiple speeds. As a facilitator of active response, the arrangement includes a logic arrangement for multicasting a set of instructions that is sent from a monitoring port. As a facilitator of POE, the arrangement is configured to receive data traffic (e.g., data packets and/or power packets) through a first network port and to send the data traffic out a second network port.02-12-2009
20110149801ARRANGEMENT FOR AN ENHANCED COMMUNICATION NETWORK TAP PORT AGGREGATOR AND METHODS THEREOF - An arrangement in a network device for facilitating multiple connection speeds with a network is provided. The arrangement includes a set of network ports that includes a set of input network ports for receiving data traffic and a set of output network ports for outputting the data traffic from the network device. The arrangement also includes a logic component configured for managing the data traffic and for aggregating the data traffic. The arrangement further includes a monitoring port that is configured to receive the aggregated data traffic. The arrangement also includes a plurality of physical layer interfaces, wherein each physical layer interface is configured to support the multiple connection speeds. The arrangement moreover includes a media access controller that is configured to support at least a single connection speed of the multiple connection speeds.06-23-2011
20110164521ARRANGEMENT FOR UTILIZATION RATE DISPLAY AND METHODS THEREOF - A network arrangement for automatically displaying statistical data is provided. The arrangement includes a port for receiving data traffic, a physical interface layer for copying data traffic, and a bus for directing a copy of the data traffic to monitoring devices. The arrangement also includes logic arrangement for analyzing the copy of data traffic, which includes at least a Receive Data Valid signal (including a rising edge and a falling edge) and a Receive Clock signal (including a rising edge and a falling edge). The arrangement further includes incrementing a first counter when the Receive Data Valid rising edge is received and incrementing a second counter when at least one of the Receive Clock rising edge and the Receive Clock falling edge is received. The arrangement moreover includes logic arrangement for displaying statistical data pertaining to the data traffic and a visual display arrangement for displaying statistical data.07-07-2011

Douglas C. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100312517Test Method Using Memory Programmed with Tests and Protocol To Communicate between Device Under Test and Tester - In an embodiment, a test method is implemented to test an integrated circuit that includes at least one processor. The method may include programming a memory to which the integrated circuit is coupled during testing with one or more test programs. The integrated circuit may be booted, and the processor may execute the test programs from the memory. In one embodiment, the memory may also store a control program that may manage the execution of the tests. In an embodiment, the control program may also implement a protocol to communicate with the ATE to perform the testing. The protocol may be implemented over a set of general purpose input/output (I/O) pins, for example. Using the protocol and test vectors on the ATE, the tests may be selected and executed, and test results may be reported.12-09-2010
20110113167Command Queue for Peripheral Component - In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.05-12-2011

Edward Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090282480Apparatus and Method for Monitoring Program Invariants to Identify Security Anomalies - A computer readable storage medium includes executable instructions to insert monitors at selected locations within a computer program. Training output from the monitors is recorded during a training phase of the computer program. Program invariants are derived from the training output. During a deployment phase of the computer program, deployment output from the monitors is compared to the program invariants to identify security anomalies.11-12-2009

Eun-Joo Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090249261METHOD AND APPARATUS FOR OPTIMIZING AN OPTICAL PROXIMITY CORRECTION MODEL - A method includes receiving optical profiles for a plurality of design target features associated with an integrated circuit device and optical profiles for a plurality of test features. An optical proximity correction (OPC) model including a plurality of terms is defined. Each term relates to at least one parameter in the optical profiles. A subset of the model terms is identified as being priority terms. Parameters of the optical profiles of the test features are matched to parameters of the optical profiles of the design target features using the priority terms to generate a set of matched test features. A metrology request is generated to collect metrology data from a test wafer having formed thereon at least a first subset of the matched test features and a second subset of the design target features.10-01-2009

Han-Seung Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100026361LEVEL SHIFTER AND DRIVING CIRCUIT INCLUDING THE SAME - The present invention related to a driving circuit including a level shifter. The driving circuit according to exemplary embodiment of the present invention includes a first level shifter, a second level shifter, and a gate driver. The first level shifter includes a path along which a pulse-on current flows in response to an on-control signal and a path along which a pulse-off control flows in response to an off-control signal. The second level shifter includes a path along which an on-current flows in response to the on-control signal and a path along which an off-control flows in response to the off-control signal. The gate driver turns on the switch in response to the pulse-on current, maintains the turned-on switch in the turn-on state in response to the on-control current, turns off the switch in response to the pulse-off current, and maintains the turned-off switch in the turn-off state in response to the off-control current.02-04-2010

Hyung Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090047547Nanopatterning of disk media with flash sacrificial layer in block copolymer lithography - A method for fabricating a patterned disk of a hard disk drive. The method includes forming a layer of magnetic material over a substrate and then forming a sacrificial flash layer over the layer of magnetic material. A co-polymer material is formed over the sacrificial flash layer and then a plurality of magnetic dots separated by a non-magnetic material are formed in the magnetic layer. The flash layer is preferably a FePt material with a non-magnetic Ag or Cu based alloy. Such material not only provides good adhesion between the co-polymer and magnetic layers but also diffuses into the grains of the magnetic material. The diffusion of the non-magnetic flash layer between the grains of the magnetic material reduces magnetic cross-talk and improves the signal to noise ratio of the disk.02-19-2009

Hyungjai Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090067091Process for filling a patterned media of a hard disk with UV-cured lubricant - A patterned disk for a hard disk drive. The patterned disk includes a magnetic material over a substrate. The magnetic material includes a plurality of grooves. The grooves are filled with a lubricant that is hardened with UV exposure or some other hardening process. The lubricant provides a protective cover for the magnetic material exposed by the grooves. The use of lubricants in the fabrication of disks is known, thus the process does not introduce a process step that requires special equipment and/or process development.03-12-2009

Jasopin Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20120112633System and Method For A Light Bulb Fixture with Sensor Switch and Its Operation and Method for operating the same - A system and method of light bulb and fixture comprising an occupancy sensor, a light meter, and an on/off circuit switch is used to manage the lighting use base on the sensing the presence of people and area lighting condition. The occupancy sensor, light meter, an on-off circuit switch, and a regulator are incorporated into the light bulb or fixture for easy replacement and no need of re-wiring or major fixture change.05-10-2012

Jeffery T. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20120089712SYSTEMS AND METHODS FOR PROVIDING NETWORK RESOURCE ADDRESS MANAGEMENT - Systems and methods are provided for allowing a user to obtain an intended network resource address. An undesired network resource address (NRA) which had been mistakenly entered by a user may be identified as being undesired. In response, an intended NRA may be determined and provided to the user. For example, a database of undesired NRAs may be access to determine an intended NRA (e.g., based on an association of the undesired NRA with an intended NRA). The undesired NRA database may be located local to or remote from the user equipment. The NRA database may be updated in response to, for example, receiving an undesired address command from the user.04-12-2012

Jessica Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100221716Classification of Nucleic Acid Templates - Methods, compositions, and systems are provided for characterization of modified nucleic acids. In certain preferred embodiments, single molecule sequencing methods are provided for identification of modified nucleotides within nucleic acid sequences. Modifications detectable by the methods provided herein include chemically modified bases, enzymatically modified bases, abasic sites, non-natural bases, secondary structures, and agents bound to a template nucleic acid.09-02-2010
20110183320CLASSIFICATION OF NUCLEIC ACID TEMPLATES - Methods, compositions, and systems are provided for characterization of modified nucleic acids. In certain preferred embodiments, single molecule sequencing methods are provided for identification of modified nucleotides within nucleic acid sequences. Modifications detectable by the methods provided herein include chemically modified bases, enzymatically modified bases, abasic sites, non-natural bases, secondary structures, and agents bound to a template nucleic acid.07-28-2011

Jungwon Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20080198941LOW-COMPLEXITY SCALABLE ARCHITECTURE FOR CONCATENATION-ASSISTED SYMBOL-LEVEL COMBINING - Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where a receiver has received one or more signal vectors from the same transmitted vector. The receiver processes these received signal vectors one by one, and uses information from signal vectors that have already been processed to process the next signal vector. To process a current signal vector, the receiver concatenates the current signal vector with a previously processed signal vector. This concatenated signal vector is decoded using, for example, a maximum-likelihood (ML). To decode the concatenated signal vector, the ML decoder can use a concatenated channel matrix that includes a channel response matrix associated with the current signal vector and a processed version of previous channel response matrices.08-21-2008
20080279317BICM DECODING IN THE PRESENCE OF CO-CHANNEL INTERFERENCE - Systems and methods are provided for computing soft information for digital information based on a received signal, where the received signal suffers from noise and interference. A receiver that decodes the received signal may estimate channel information, such as the channel gain, associated with the interfering source. The receiver may also obtain modulation information through a backbone network or by decoding control information transmitted by the interfering source. Using the modulation information and the channel information, the receiver may estimate the effect that interference has on the received signal, and may compute soft information (e.g., a log-likelihood ratio) for the digital information.11-13-2008
20090051592Pseudo-Omni-Directional Beamforming with Multiple Narrow-Band Beams - In a technique for communication with a station on a wireless network, the technique includes forming a plurality of narrow-band beams, each having a different angular direction from an antenna of a base station and collectively distributed over a beamspace to form a pseudo-omni-directional beam pattern. That beamspace may span an entire spherical region or a portion thereof, for example, when the narrow-band beams are broadcast over a sector of an entire spherical region. The technique may assign each of the plurality of narrow-band beams to a different frequency band (such as a different channel band or sub-channel) on the wireless network. The technique may simultaneously broadcast the plurality of narrow-band beams in a time-varying manner such that the angular direction of each of the plurality of narrow-band beams varies with time, where that variation may be random or ordered.02-26-2009
20090262855DATA SYMBOL MAPPING FOR MULTIPLE-INPUT MULTIPLE-OUTPUT HYBRID AUTOMATIC REPEAT REQUEST - A system includes an encoding module, a symbol selection module, a subcarrier selection module, and a mapping module. The encoding module receives symbols for transmission over K subcarriers and T antennas, encodes the symbols using a space time code, and generates space time coded (STC) versions of the symbols, where K and T are integers greater than 1. The symbol selection module selects T adjacent ones of the symbols and selects STC versions of the T adjacent ones of the symbols. The subcarrier selection module selects one of the K subcarriers for transmitting the T adjacent ones of the symbols and the STC versions of the T adjacent ones of the symbols. The mapping module maps the T adjacent ones of the symbols onto the T antennas for transmission over the selected one of the K subcarriers, respectively, and maps the STC versions of the T adjacent ones of the symbols onto the T antennas for transmission over the selected one of the K subcarriers.10-22-2009
20090279633SYMBOL VECTOR-LEVEL COMBINING TRANSMITTER FOR INCREMENTAL REDUNDANCY HARQ WITH MIMO - Techniques are provided for transmitting and receiving a mother code in an incremental redundancy hybrid automatic repeat-request protocol. A set of information bits corresponding to a message may be encoded and interleaved to produce the mother code. Each bit position of the mother code may be mapped to an output symbol, and each output symbol may be mapped to an antenna for transmission. One or more transmissions of symbols contained in the output symbols may be performed, where each transmission may include puncturing the mother code by selecting one or more symbols from the of output symbols, and transmitting each symbol in the one or more symbols on an antenna corresponding to that symbol. The mother code may be decoded, in part, by determining combinable bits contained within a set of received symbols, and computing one or more log-likelihood ratio values corresponding to each symbol in the set of received symbols.11-12-2009
20090282311SYMBOL VECTOR-LEVEL COMBINING RECEIVER FOR INCREMENTAL REDUNDANCY HARQ WITH MIMO - Techniques are provided for transmitting and receiving a mother code in an incremental redundancy hybrid automatic repeat-request protocol. A set of information bits corresponding to a message may be encoded and interleaved to produce the mother code. Each bit position of the mother code may be mapped to an output symbol, and each output symbol may be mapped to an antenna for transmission. One or more transmissions of symbols contained in the output symbols may be performed, where each transmission may include puncturing the mother code by selecting one or more symbols from the of output symbols, and transmitting each symbol in the one or more symbols on an antenna corresponding to that symbol. The mother code may be decoded, in part, by determining combinable bits contained within a set of received symbols, and computing one or more log-likelihood ratio values corresponding to each symbol in the set of received symbols.11-12-2009
20100005357Symbol Vector Mapping for Chase-Combining HARQ - A method of transmitting data from a transmitter to a receiver includes transmitting a first data unit to the receiver via a plurality of antennas, the first data unit including a payload that has a plurality of symbols; determining whether the receiver has successfully received the first data unit; and, in response to determining that the receiver has not successfully received the first data unit, transmitting a second data unit to the receiver, the second data unit including the payload, such that transmitting die second data unit includes transmitting the plurality of symbols via at least one of different antennas and different subcarriers with respect to the first data unit.01-07-2010
20120069935SYMBOL-LEVEL COMBINING FOR MULTIPLE INPUT MULTIPLE OUTPUT (MIMO) SYSTEMS WITH HYBRID AUTOMATIC REPEAT REQUEST (HARQ) AND/OR REPETITION CODING - Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where the receiver has received one or more signal vectors from the same transmitted vector. The symbols of the received signal vectors are combined, forming a combined received signal vector that may be treated as a single received signal vector. The combined signal vector is then decoded using a maximum-likelihood decoder. In some embodiments, the combined received signal vector may be processed prior to decoding. Systems and methods are also provided for computing soft information from a combined signal vector based on a decoding metric. Computationally intensive calculations can be extracted from the critical path and implemented in preprocessors and/or postprocessors.03-22-2012

Patent applications by Jungwon Lee, Cupertino, CA US

Jungwoon Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090047969PILOT DESIGN FOR UNIVERSAL FREQUENCY REUSE IN CELLULAR ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING SYSTEMS - Systems and methods are provided for transmitting information between an intended source and a receiver to minimize co-channel interference from at least one interfering source. Pilot subcarriers and data subcarriers may be broadcast from an intended source arid at least one interfering source. The pilot subcarriers may be shared across base stations or distributed among base stations in frequency, in time, or both. In addition, the frequency reuse factor of the pilot subcarriers may be different than the frequency reuse factor of the data subcarriers. A receiver receives a composite signal that corresponds with an intended signal from an intended source and an interfering signal from at least one interfering source. The portion of the received signal that corresponds to the intended signal may be recovered by the receiver based on the broadcast of the pilot subcarriers.02-19-2009

Juyoung Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110107292Extraction of Component Models from PCB Channel Scattering Parameter Data by Stochastic Optimization - Various embodiments herein include one or more of systems, methods, software, and/or data structures to extract models of components (e.g., vias and traces) for PCB channels from measurements (or simulations) taken from physical PCB channels. By applying stochastic optimization to measurements of two PCB channels having different channel lengths, s-matrices (e.g., two-port, four-port, and the like) of the components of a PCB channel may be accurately determined by searching the multi-dimensional parameter space for parameters that comply with the measured values. Once the models for the components have been accurately determined, they may be utilized in constructing a model library that includes component models and is based on physical measurement data.05-05-2011

Ke Ling Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20080247498Methods and apparatuses for operating and repairing nuclear reactors - Method of repairing nuclear reactors that include one or more submerged lines welded to one or more support brackets may include: removing a damaged section of one of the one or more submerged lines; and replacing the damaged section of the one of the one or more submerged lines without welding. Methods of operating nuclear reactors that include one or more submerged lines welded to one or more support brackets may include: shutting down the nuclear reactor; repairing damage to at least one of the one or more submerged lines without welding; and starting up the nuclear reactor. Methods of operating nuclear reactors that include one or more submerged lines welded to one or more support brackets may include: cooling down the nuclear reactor; repairing damage to at least one of the one or more submerged lines without welding; and heating up the nuclear reactor.10-09-2008
20090090883CHAMBER ISOLATION VALVE RF GROUNDING - Embodiments described herein provide a method and apparatus for grounding a chamber isolation valve. In one embodiment, a grounded chamber isolation valve for a plasma processing system is described. The chamber isolation valve includes a door and a bracing member movably attached to and opposing the door, and at least one electrically conductive member in electrical communication with the door, the at least one electrically conductive member comprising one or more reaction bumpers disposed on the bracing member that are adapted to contact at least one grounded component of the plasma processing system when the door is in the closed position.04-09-2009

Patent applications by Ke Ling Lee, Cupertino, CA US

Kenneth D. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100306928Method and Apparatus for Using Steam in a Commercial Laundry Machine as an Environmentally-Friendly Replacement of Conventional Dry Cleaning or Wet Cleaning Processes - A commercial steam-cleaning laundry machine is configured to use steam instead of dry-cleaning chemicals or water as a primary cleaning agent for garments rotating in a drum of the commercial steam-cleaning laundry machine. In one embodiment of the invention, a steam injector at least partially exposed to an inner surface of the drum is configured to provide a MCU-controlled fresh steam injection into the drum during a cleaning cycle of the commercial steam-cleaning laundry machine. The fresh steam into the commercial steam-cleaning laundry machine is from an outtake of a standalone boiler system which is typically used for a variety of fabric treatment machines in a commercial laundry operation. A debris and clean steam/air separation chamber periodically or continuously separates and/or filters debris, chemicals, and/or other undesirable elements from the drum and evacuates clean or cleaned-up air and moistures to an air-out duct.12-09-2010

Kevin P. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100125473CLOUD COMPUTING ASSESSMENT TOOL - A system is described for providing a cloud computing assessment tool. The system may include a memory, an interface, and a processor. The processor may receive a data center configuration from the user. The data center configuration may include a compute and storage capacity. The processor may determine a cloud computing configuration equivalent to the data center configuration. The processor may identify a time period for transitioning from the data center to cloud computing. The processor may identify a plurality of trend values representing changes in the compute capacity and storage capacity over the period of time. The processor may generate a strategy to transition from the data center to cloud computing over the period of time. The strategy may account for the changes in the compute capacity and the storage capacity. The processor may provide a graphical output and a numerical output of the strategy to the user.05-20-2010
20110276686CLOUD COMPUTING ASSESSMENT TOOL - A system is described for providing a cloud computing assessment tool. The system may include a memory, an interface, and a processor. The processor may receive a data center configuration from the user. The data center configuration may include a compute and storage capacity. The processor may determine a cloud computing configuration equivalent to the data center configuration. The processor may identify a time period for transitioning from the data center to cloud computing. The processor may identify a plurality of trend values representing changes in the compute capacity and storage capacity over the period of time. The processor may generate a strategy to transition from the data center to cloud computing over the period of time. The strategy may account for the changes in the compute capacity and the storage capacity. The processor may provide a graphical output and a numerical output of the strategy to the user.11-10-2011
20120078940ANALYSIS OF OBJECT STRUCTURES SUCH AS BENEFITS AND PROVIDER CONTRACTS - The hierarchical relationships between objects in different levels of an object structure (such as a contract) are stored as elements in two-dimensional matrix representations. In general, the matrix representations facilitate queries, clustering of like objects and contracts, and comparisons that identify common objects and contracts.03-29-2012

Patent applications by Kevin P. Lee, Cupertino, CA US

Ki-Chan Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110084620ADAPTIVE PWM CONTROLLER FOR MULTI-PHASE LED DRIVER - A multi channel LED driver comprises a plurality of LED strings. Each of the plurality of LED strings are associated with a separate channel. A voltage regulator generates an output voltage to the plurality of LED strings responsive to an input voltage and a PWM control signal. First control logic generates the PWM control signal responsive to a voltage at a bottom of each of the plurality of LED strings. A plurality of dimming circuitries, each connected to one of the bottoms of the plurality of LED strings, control a light intensity in each of the plurality of LED strings responsive to dimming control signals. Second control logic generates the dimming control signals responsive to forward currents monitored through each of the plurality of LED strings and dimming data.04-14-2011

Li-Mey Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090012945SYSTEM FOR EXECUTING A QUERY HAVING MULTIPLE DISTINCT KEY COLUMNS - A system and computer readable medium for executing a query to access data stored in a database, wherein the query includes a plurality of DISTINCT keys, is disclosed. The system and computer readable medium includes a capture module for identifying each of the plurality of DISTINCT keys in the query and a sort module coupled to the capture module for determining if more than one sort is needed to execute the query, performing a first DISTINCT operation on a first DISTINCT key of the plurality of DISTINCT keys, storing data fetched from the first DISTINCT operation in a master workfile only if more than one sort process is needed to execute the query, and utilizing the master workfile to perform subsequent DISTINCT operations on the other of the plurality of DISTINCT keys.01-08-2009

Patent applications by Li-Mey Lee, Cupertino, CA US

Meng-Kun Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100199154Reduced processing in high-speed Reed-Solomon decoding - Processing polynomials is disclosed. At least a portion of processing associated with an error evaluator polynomial and at least a portion of processing associated with an error locator polynomial are performed simultaneously. The error evaluator polynomial and the error locator polynomial are associated with Berlekamp-Massey processing. Data associated with the error evaluator polynomial is removed, including by shifting data in an array so that at least one element in the array is emptied in a shift.08-05-2010
20110125959E/P DURABILITY BY USING A SUB-RANGE OF A FULL PROGRAMMING RANGE - A NAND flash memory system is controlled by determining whether to change a value of a voltage threshold. The voltage threshold is associated with an erase operation to a portion of a NAND flash memory chip. In the event it is determined to change the value of the voltage threshold, the value of the voltage threshold is changed and the changed value of the voltage threshold and an identifier associated with the portion of the NAND flash memory chip is stored.05-26-2011
20110239085ECC WITH OUT OF ORDER COMPLETION - Processing a sequence of data frames in an error correction code (ECC) decoder is disclosed. Processing includes receiving a first data frame in the sequence of data frames, storing the first data frame, initiating processing of the first data frame through the ECC decoder, receiving a second data frame from the input sequence of data frames, storing the second data frame, and initiating processing of the second data frame through the ECC decoder before the first data frame is finished being processed through the ECC decoder.09-29-2011
20120081971E/P DURABILITY BY USING A SUB-RANGE OF A FULL PROGRAMMING RANGE - A NAND Flash memory controller is used to perform an erase operation on a NAND Flash memory chip including to a cell on the NAND Flash memory chip; the cell is configured to store a first number of bits. It is determined whether the erase operation performed on the NAND Flash memory chip is successful. In the event it is determined that the erase operation performed on the NAND Flash memory chip is unsuccessful, the number of bits stored by the cell is reduced from the first number of bits to a second number of bits; the second number of bits is strictly less than the first number of bits.04-05-2012

Patent applications by Meng-Kun Lee, Cupertino, CA US

Peter K. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110303803SUPPORT STRUCTURE FOR A DISPLAY DEVICE - A support structure for a display device is disclosed. The support structure may include a main rail configured to attach to the display. The main rail can have a first mating element extending along a portion of the length of the main rail and the main rail has a profile. The support structure also can have a guide member including a second mating element to mate with the first mating element and a friction pad configured to contact the curved profile.12-15-2011

Sang M. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20080213997SELECTIVE COPPER-SILICON-NITRIDE LAYER FORMATION FOR AN IMPROVED DIELECTRIC FILM/COPPER LINE INTERFACE - A process to form a copper-silicon-nitride layer on a copper surface on a semiconductor wafer is described. The process may include the step of exposing the wafer to a first plasma made from helium. The process may also include exposing the wafer to a second plasma made from a reducing gas, where the second plasma removes copper oxide from the copper surface, and exposing the wafer to silane, where the silane reacts with the copper surface to selectively form copper silicide. The process may further include exposing the wafer to a third plasma made from ammonia and molecular nitrogen to form the copper silicon nitride layer.09-04-2008
20090107626ADHESION IMPROVEMENT OF DIELECTRIC BARRIER TO COPPER BY THE ADDITION OF THIN INTERFACE LAYER - Embodiments described herein provide a method of processing a substrate. The method includes depositing an interface adhesion layer between a conductive material and a dielectric material such that the interface adhesion layer provides increased adhesion between the conductive material and the dielectric material. In one embodiment a method for processing a substrate is provided. The method comprises depositing an interface adhesion layer on a substrate comprising a conductive material, exposing the interface adhesion layer to a nitrogen containing plasma, and depositing a dielectric layer on the interface adhesion layer after exposing the interface adhesion layer to the nitrogen containing plasma.04-30-2009
20090269923ADHESION AND ELECTROMIGRATION IMPROVEMENT BETWEEN DIELECTRIC AND CONDUCTIVE LAYERS - A method and apparatus for processing a substrate is provided. The method of processing a substrate includes providing a substrate comprising a conductive material, performing a pre-treatment process on the conductive material, flowing a silicon based compound on the conductive material to form a silicide layer, performing a post treatment process on the silicide layer, and depositing a barrier dielectric layer on the substrate.10-29-2009

Sang-Soo Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20120038809DIFFERENTIAL COLUMN ADC ARCHITECTURES FOR CMOS IMAGE SENSOR APPLICATIONS - Circuits, methods, and apparatus that provide differential-input, single-slope, column-parallel analog-to-digital converter (ADC) architectures for use in high-resolution CMOS image sensors (CIS) are described. A column ADC is coupled with a column of a pixel array and configured to convert a pixel signal level to a corresponding digital output value according to a ramp generator output. Each pixel is configured to output a pixel reset level and a pixel signal level at different operating stages, and the ramp generator output includes a ramp reset level and a ramp signal level at the same or different at different operating stages. The pixel and ramp outputs are used to differentially drive a comparator stage of the column ADC, for example, to reduce power supply noise.02-16-2012
20120039548FRAME-WISE CALIBRATION OF COLUMN-PARALLEL ADCS FOR IMAGE SENSOR ARRAY APPLICATIONS - Circuits, methods, and apparatus are described that provide calibration of column-parallel analog-to-digital converters (ADCs) in image processing contexts only once per frame (or less frequently) to reduce column-wise noise. For example, the column ADCs are calibrated during an inter-frame time interval, like a vertical blanking interval. In some embodiments, calibration data for the column ADCs for a calibration period is stored at the digital block for use in processing row data from the column ADCs. In other embodiments, calibration data for the column ADCs for the calibration period is stored at column ADCs in a local memory for local correction of the pixel data prior to being read out to the digital block for processing. In certain embodiments, techniques, such as differential ADC architectures, are used to mitigate row-wise noise in context of the frame-wise calibration.02-16-2012

Shaw W. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100015329METHODS AND SYSTEMS FOR PACKAGING INTEGRATED CIRCUITS WITH THIN METAL CONTACTS - Methods and arrangements are described for forming an array of contacts for use in packaging one or more integrated circuit devices. In particular, various methods are described for forming contacts having thicknesses less than approximately 10 μm, and in particular embodiments, between 0.5 to 2 μm.01-21-2010

Shaw Wei Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110089556LEADFRAME PACKAGES HAVING ENHANCED GROUND-BOND RELIABILITY - Various semiconductor package arrangements and methods that improve the reliability of wire bonding a die to ground or other outside contacts are described. In one aspect, selected ground pads on the die are wire bonded to a bonding region located on the tie bar portion of the lead frame. The tie bar is connected to an exposed die attach pad that is downset from the bonding region of the tie bar. In some embodiments, the bonding region and the leads are at substantially the same elevation above the die and die attach pad. The die, bonding wires, and at least a portion of the lead frame can be encapsulated with a plastic encapsulant material while leaving a contact surface of the die attach pad exposed to facilitate electrically coupling the die attach pad to an external device.04-21-2011
20110140253DAP GROUND BOND ENHANCEMENT - A variety of semiconductor package arrangements and packaging methods are described that improve the reliability of bonding wires that down bond a die to a die attach pad. In one aspect, selected portions of the top surface of a lead frame (which may be in panel form) are plated (e.g., silver plated) to facilitate wire bonding. The plating covers some, but not all of a die attach surface of the die attach pad. In some preferred embodiments, the plating on the die attach pad is arranged as a peripheral ring that surrounds an unplated central region of the die support surface. In other embodiments, the plating on the die attach pad takes the form of bars or other geometric patterns that do not fully cover the die support surface. Unplated portions of the die support surface are roughened to improve the adherence of the die to the die attach pad, thereby reducing the probability of die attach pad delamination and the associated risks to down bonded bonding wires. The described lead frames may be used in a variety of packages. Most commonly, a die is attached to the die support surface of the die attach pad and electrically connected to the lead frame leads by wire bonding as appropriate. At least one of the die's bond pads (typically the ground bond pad(s)) is down bonded to the die attach pad. The die, the bonding wires and at least portions of the lead frame are then typically encapsulated with a plastic encapsulant material while leaving a contact surface of the die attach pad exposed to facilitate electrically coupling the die attach pad to an external device.06-16-2011

Teck Yang Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20110130958DYNAMIC ALERTS FOR CALENDAR EVENTS - A computing device can access a calendar entry having an associated time and an associated location, in a calendar application. The computing device can dynamically determine an estimated travel time to the location associated with the calendar entry. The computing device can provide an alarm indication for the calendar entry at a time based on the estimated travel time.06-02-2011

Thomas H. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100171152INTEGRATED CIRCUIT INCORPORATING DECODERS DISPOSED BENEATH MEMORY ARRAYS - A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.07-08-2010
20110019467VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION - A memory cell is provided that includes a first conductor, a second conductor, a steering element that is capable of providing substantially unidirectional current flow, and a state change element coupled in series with the steering element. The state change element is capable of retaining a programmed state, and the steering element and state change element are vertically aligned with one another. Other aspects are also provided.01-27-2011
20110156044DENSE ARRAYS AND CHARGE STORAGE DEVICES - There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.06-30-2011

Patent applications by Thomas H. Lee, Cupertino, CA US

Victor Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20100251278MEASUREMENT AND REPORTING OF SET TOP BOX INSERTED AD IMPRESSIONS - Methods are disclosed for measuring ad impressions and receiving feedback on local ad assets inserted into a video transport stream at the set top box level. Each set top box stores the number of times an ad asset is inserted into an ad avail, along with a variety of other information relating to the playback of the ad asset. This measurement data is aggregated and sent to the ad decision service. In order to balance bandwidth usage, each set top box may report its measurement data to the ad decision service at a different time interval that is randomly selected. As it is desirable to receive the data in a timely manner, the random intervals may be confined so that all measurement data is reported within a predefined time period, such as for example over a twelve hour period.09-30-2010
20100251289ADVERTISEMENT INSERTION DECISIONS FOR SET TOP BOX MANAGEMENT OF ADVERTISEMENTS - Methods are disclosed for inserting local ad assets into a video transport stream at the set top box level. The media advertising platform of the present system works in conjunction with existing platforms, such as an advertising decision service and a media platform. The present system further includes a client resident on end user set top boxes. In general, the present system operates by pre-caching advertisements to a set top box or boxes within a household or elsewhere. Each set top box is also assigned to particular groups, based on characteristics of the user of that set top box. Group membership information is also sent to the set top box and stored. The present system sends the set top box a decision matrix based on group memberships to allow the set top box to select and insert an ad asset targeted to the specific set top box.09-30-2010

Victor S. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090187938Service Substitution Techniques - Service substitution techniques are described. In an implementation, a substitution table is derived that specifies one or more service substitutions to be performed for content and that specifies particular geographic locations to perform at least one service substitution. One or more communications are formed to be streamed over a packet-switched network to a client that is to perform the at least one service substitution. The one or more communications include the substitution table and the content that corresponds to the at least one service substitution.07-23-2009
20090310933Concurrently Displaying Multiple Trick Streams for Video - In accordance with one or more aspects, multiple trick streams corresponding to video content are concurrently displayed in multiple windows. A user selection of one window of the multiple windows is received, and the video content is played back at a location corresponding to a location in a trick stream being played back in the one window when the user selection is received.12-17-2009
20100172625Client-side Ad Insertion During Trick Mode Playback - A device plays back programming content in a trick mode while an advertising segment record is monitored. When an advertising segment beginning identified by the advertising segment record is encountered, playback of the programming content temporarily ceases. One or more advertisements are played back during the advertising segment, and then playback of the programming content in the trick mode resumes after an ending of the advertising segment is encountered.07-08-2010
20100172626Trick Mode Based Advertisement Portion Selection - Programming content is played back in a trick mode. One or more portions of an advertisement to be played back are identified based at least in part on the trick mode. These one or more portions are less than the entire advertisement, and are played back during an advertising segment. Playback of the programming content in the trick mode resumes after the advertising segment ends. A table or other record associated with the advertisement can be stored to maintain identifications of the one or more portions for each of multiple trick modes.07-08-2010

Zachary K. Lee, Cupertino, CA US

Patent application numberDescriptionPublished
20090140288HIGH ION/IOFF SOI MOSFET USING BODY VOLTAGE CONTROL - A semiconductor device may comprise a partially-depleted SOI MOSFET having a floating body region disposed between a source and drain. The floating body region may be driven to receive injected carriers for adjusting its potential during operation of the MOSFET. In a particular case, the MOSFET may comprise another region of semiconductor material in contiguous relationship with a drain/source region of the MOSFET and on a side thereof opposite to the body region. This additional region may be formed with a conductivity of type opposite the drain/source, and may establish an effective bipolar device per the body, the drain/source and the additional region. The geometries and doping thereof may be designed to establish a transport gain of magnitude sufficient to assist the injection of carriers into the floating body region, yet small enough to guard against inter-latching with the MOSFET.06-04-2009