Patent application number | Description | Published |
20090040059 | Apparatus to Monitor Process-Based Parameters of an Integrated Circuit (IC) Substrate - A process monitor measures the absolute value of unit sample resistors and transistors on a common Integrated Circuit (IC) substrate. This information can be used to adjust the gain of an amplifier assembly to a desired value, or to determine the true, corrected gain of such the amplifier assembly. Also, process information about process variations corresponding to the common IC substrate can be collected from the process monitor. Gain correction factors are derived and applied to the amplifier assembly to compensate for the process variations using the gain value and the process information. | 02-12-2009 |
20090066414 | Gain control methods and systems in an amplifier assembly - A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds. | 03-12-2009 |
20090085597 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 04-02-2009 |
20090273401 | Method and System for Multiple Tuner Application Using a Low Noise Broadband Distribution Amplifier - An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports. The first gain control device is configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module is configured to receive a control signal from the second gain control device, provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and produce an amplified output signal. | 11-05-2009 |
20100167683 | Apparatus and Method for Local Oscillator Calibration in Mixer Circuits - An apparatus and method for local oscillator calibration compensates for filter passband variation in a mixer circuit, such as a receiver circuit. The receiver includes at least a mixer circuit and a filter coupled to the output of the mixer. During operation, the mixer mixes an RF input signal with a first local oscillator (LO) signal to frequency translate a selected channel in the RF input signal into the passband of the filter. During a calibration mode, the RF input signal is disabled, and the first LO signal is injected into the filter input by leaking the first LO signal through the mixer circuit. The frequency of the LO signal is then swept over a frequency bandwidth that is sufficiently wide so that the actual passband is detected by measuring the signal amplitude at the output of the bandpass filter, thereby determining any variation in the passband of the filter from the expected passband. Once the actual passband is determined, then the frequency of the first local oscillator signal is adjusted or tuned to compensate for any frequency shift of the actual passband compared to the expected passband. Therefore, the selected channel is up-converted into the center of the actual passband of the bandpass filter and will not fall outside the passband. This enables the passband of the bandpass filter to be narrowed, as compared with conventional receivers that do not utilize this calibration procedure. For example, the bandpass filter can be narrowed to one or two channels wide. | 07-01-2010 |
20100261446 | Apparatus and Method for Local Oscillator Calibration in Mixer Circuits - An apparatus and method for local oscillator calibration compensates for filter passband variation in a mixer circuit, such as a receiver circuit. The receiver includes at least a mixer circuit and a filter coupled to the output of the mixer. During operation, the mixer mixes an RF input signal with a first local oscillator (LO) signal to frequency translate a selected channel in the RF input signal into the passband of the filter. During a calibration mode, the RF input signal is disabled, and the first LO signal is injected into the filter input by leaking the first LO signal through the mixer circuit. The frequency of the LO signal is then swept over a frequency bandwidth that is sufficiently wide so that the actual passband is detected by measuring the signal amplitude at the output of the bandpass filter, thereby determining any variation in the passband of the filter from the expected passband. Once the actual passband is determined, then the frequency of the first local oscillator signal is adjusted or tuned to compensate for any frequency shift of the actual passband compared to the expected passband. Therefore, the selected channel is up-converted into the center of the actual passband of the bandpass filter and will not fall outside the passband. This enables the passband of the bandpass filter to be narrowed, as compared with conventional receivers that do not utilize this calibration procedure. For example, the bandpass filter can be narrowed to one or two channels wide. | 10-14-2010 |
20100277235 | Gain Control Methods and Systems in an Amplifier Assembly - A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds. | 11-04-2010 |
20110284840 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 11-24-2011 |
20120086592 | Integrated Upstream Amplifier for Cable Modem and Cable Set-Top Boxes - An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change. | 04-12-2012 |
20130021100 | Method and System for Multiple Tuner Application Using a Low Noise Broadband Distribution Amplifier - An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module is configured to receive a control signal from the second gain control device, provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and produce an amplified output signal. | 01-24-2013 |
Patent application number | Description | Published |
20080265929 | Process Monitor for Monitoring and Compensating Circuit Performance - A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations. | 10-30-2008 |
20100073572 | Variable-gain low noise amplifier for digital terrestrial applications - An apparatus and method is disclosed for adjusting a gain of an amplifier assembly array. The amplifier assembly array includes a first stage to provide an amplified signal based upon an input signal. The first stage has a variable gain controlled in response to one or more gain control signals. An Automatic Gain Control (AGC) module generates the one or more gain control signals according to a ramp function in response to a power level of the amplified signal. The first stage may include a first low noise amplifier (LNA) to amplify the input signal to provide a first amplified input signal and a second LNA to amplify a second input signal to provide a second amplified signal. A switch selects between the amplified signal and the second amplified signal to provide the amplified signal. The amplifier assembly array may additionally include a second stage to provide a second amplified signal based upon the amplified signal. The second stage may include a third LNA to amplify one or more used channels of the amplified signal and a fourth LNA to amplify one or more unused channels of the amplified signal. | 03-25-2010 |
20110148200 | Over Voltage Protection of a Switching Converter - Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. One method includes a method of generating a regulated voltage. The method includes regulator circuitry generating a regulated voltage from an input voltage, and voltage-spike-protecting the regulator circuitry with voltage spike protection circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. | 06-23-2011 |
20110148368 | Stacked NMOS DC-To-DC Power Conversion - Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage though controlled closing and opening of a series switch element and shunt switch element, the series switch element being connected between a first voltage supply and a common node, and the shunt switch being connected between the common node and a second supply voltage. The series switch element includes an NMOS series switching transistor stacked with an NMOS series protection transistor, and closing the series switch element during a first period includes applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node. The shunt switch element includes an NMOS shunt switching transistor stacked with an NMOS shunt protection transistor, and the shunt switch element is closed during a second period. | 06-23-2011 |
20110234187 | Voltage Regulator Bypass Resistance Control - Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. A control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on a parameter related to the duty cycle, wherein the control of the duty cycle is persistent during the control of the bypass resistance. | 09-29-2011 |
20120105034 | Controlling a Dead Time of a Switching Voltage Regulator - Embodiments for at least one method and apparatus of controlling a dead time of a switching voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The method included generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, wherein the dead time comprises time that both the series switch element and the shunt switch element are open. The duration of the dead time is adjusted based on a rate of change of the switching voltage. | 05-03-2012 |
20120105045 | Controlling a Skew Time of Switches of a Switching Regulator - Embodiments for methods and apparatuses for controlling a skew time of switches of a switching voltage regulator are disclosed. One method includes generating a switching voltage through closing and opening of a series switch and a shunt switch as controlled by a series switch control signal and a shunt switch control signal. An error signal is generated that is proportional to a relative displacement of an on-interval of the series switch and an off-interval of the shunt switch. A relative delay of the series switch control signal and the shunt switch control signal is adjusted based on the error signal, and a regulated output voltage is generated based upon the switching voltage. | 05-03-2012 |
20120229102 | Stacked NMOS DC-To-DC Power Conversion - Another embodiment includes a voltage regulator. The voltage regulator includes a series switch element connected between a first voltage supply and a common node, the series switch element comprising an NMOS series switching transistor, a shunt switch element connected between the common node and a second voltage supply, the shunt switch element comprising an NMOS shunt switching transistor. The voltage regulator further includes means for closing the series switch element during a first period by applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node, means for closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor. | 09-13-2012 |
20120244916 | Multimode Operation DC-DC Converter - Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One method includes generating, by a switching controller, a switching voltage through controlled closing and opening of a series switch element and a shunt switch element. Further, the method includes generating, by a switchable output filter, a regulated output voltage by filtering the switching voltage, wherein the switchable output filter comprises a plurality of capacitors that are selectively included within the switchable output filter. | 09-27-2012 |
20120257311 | Over Voltage Protection of a Switching Converter - Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry. The voltage spike protection circuitry includes a charge-storage circuit, and at least one switching element, wherein the at least one switching element comprises a plurality of switching block segments. The charge-storage circuit includes charge-storage circuit segments, and each charge-storage circuit segment is physically closer to at least one of the plurality of switching block segments the charge-storage circuit segment protects, than any other switching block segment. | 10-11-2012 |
20120274297 | Voltage Regulator Bypass Resistance Control - Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. Control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on an integration of a difference between the duty cycle and a maximum duty cycle. | 11-01-2012 |
20120326680 | COMMON CASCODE ROUTING BUS FOR HIGH-EFFICIENCY DC-TO-DC CONVERSION - Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element. This method includes closing the series switch element during a first period, the series switch element comprising a plurality of series switch elements segments. The method includes applying a switching gate voltage to gates of series switching transistors of a subset of the plurality of series switch elements segments of the series switch element, wherein only the series switching transistors of the subset of the plurality of series switch elements segments of the series switch element turn on, while series protection transistor of more than the subset of the plurality of series switch elements segments of the series switch element turn on. The shunt switch element during is closed during a second period. | 12-27-2012 |
20130267187 | Multimode Operation DC-DC Converter - Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One apparatus includes a switching voltage regulator, wherein the switching voltage regulator includes a series switch element, a shunt switch element, a switching controller and a switched output filter. The switching controller is configured to generate a switching voltage through controlled closing and opening of the series switch element and the shunt switch element. The switched output filter filters the switching voltage and generates a regulated output voltage, wherein the switched output filter includes a plurality of capacitors that are selectively included within the switched output filter. | 10-10-2013 |
20140059632 | Integrated Cable Modem - The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user. | 02-27-2014 |