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Lai, Sunnyvale
Chiukin Steve Lai, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090305500 | Contact Clean by Remote Plasma and Repair of Silicide Surface - Method for recovering treated metal silicide surfaces or layers are provided. In at least one embodiment, a substrate having an at least partially oxidized metal silicide surface disposed thereon is cleaned to remove the oxidized regions to provide an altered metal silicide surface. The altered metal silicide surface is then exposed to one or more silicon-containing compounds at conditions sufficient to recover the metal silicide surface. | 12-10-2009 |
| 20110104897 | CONTACT CLEAN BY REMOTE PLASMA AND REPAIR OF SILICIDE SURFACE - Embodiments provide methods for treating a metal silicide contact which includes positioning a substrate having an oxide layer disposed on a metal silicide contact surface within a processing chamber, cleaning the metal silicide contact surface to remove the oxide layer while forming a cleaned silicide contact surface during a cleaning process, and exposing the cleaned silicide contact surface to a silicon-containing compound to form a recovered silicide contact surface during a regeneration process. In some examples, the cleaning of the metal silicide contact surface includes cooling the substrate to an initial temperature of less than 65° C., forming reactive species from a gas mixture of ammonia and nitrogen trifluoride by igniting a plasma, exposing the oxide layer to the reactive species to form a thin film, and heating the substrate to about 100° C. or greater to remove the thin film from the substrate while forming the cleaned silicide contact surface. | 05-05-2011 |
Chiukin (steven) Lai, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080268645 | METHOD FOR FRONT END OF LINE FABRICATION - In one embodiment, a method for removing native oxides from a substrate surface is provided which includes supporting a substrate containing silicon oxide within a processing chamber, generating a plasma of reactive species from a gas mixture within the processing chamber, cooling the substrate to a first temperature of less than about 65° C. within the processing chamber, and directing the reactive species to the cooled substrate to react with the silicon oxide thereon while forming a film on the substrate. The film usually contains ammonium hexafluorosilicate. The method further provides positioning the substrate in close proximity to a gas distribution plate, and heating the substrate to a second temperature of about 100° C. or greater within the processing chamber to sublimate or remove the film. The gas mixture may contain ammonia, nitrogen trifluoride, and a carrier gas. | 10-30-2008 |
| 20090111280 | METHOD FOR REMOVING OXIDES - A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, generating a plasma of a reactive species from a gas mixture within the processing chamber, exposing the substrate to the reactive species while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to vaporize the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate. | 04-30-2009 |
John Lai, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120023457 | PRESENTATION OF ADVERTISEMENTS BASED ON USER INTERACTIVITY WITH A WEB PAGE - Methods and systems for presenting advertisements based on user interactivity with a web page are provided. According to embodiments of the invention, a web page is rendered on a client device. Gesture interactivity with the web page is monitored on the client device. A trigger is executed which defines an interactive event. When the interactive event occurs, as determined based on the monitored gesture interactivity with the web page, secondary content, such as an advertisement, is downloaded and displayed on the client device. | 01-26-2012 |
Michael Lai, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110047534 | PROACTIVE LOOP FUSION OF NON-ADJACENT LOOPS WITH INTERVENING CONTROL FLOW INSTRUCTIONS - A system and method for optimization of code with non-adjacent loops. A compiler builds a node tree, which is not a control flow graph, that represents parent-child relationships of nodes of a computer program. Each node represents a control flow statement or a straight-line block of statements of the computer program. If a non-adjacent loop pair of nodes satisfy predetermined conditions, the compiler may perform legal code transformations on the computer program and corresponding node transformations on the node tree. These transformations may make adjacent this pair of loop nodes. The compiler may be configured to perform legal code transformations, such as head and tail duplication, code motion, and if-merging, in order to make adjacent these two loop nodes. Then loop fusion may be performed on this loop pair in order to increase instruction level parallelism (ILP) within an optimized version of the original source code. | 02-24-2011 |
Ya-Chieh Lai, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090307642 | METHOD AND SYSTEM FOR MODEL-BASED DESIGN AND LAYOUT OF AN INTEGRATED CIRCUIT - A approach is described for allowing electronic design, verification, and optimization tools to implement very efficient approaches to allow the tools to directly address the effects of manufacturing processes, e.g., to identify and prevent problems caused by lithography processing. Fast models and pattern checking are employed to integrate lithography and manufacturing aware processes within EDA tools such as routers. | 12-10-2009 |
| 20100064269 | METHOD AND SYSTEM FOR DESIGN RULE CHECKING ENHANCED WITH PATTERN MATCHING - According to various embodiments of the invention, systems and methods for design rule checking enhanced with pattern matching is provided, wherein the design rule checker ignores certain patterns of the layout that violate design rules during validation. One embodiment of the invention includes receiving a first layout pattern that containing the original layout of an integrated circuit pattern. The pattern matcher processes the layout pattern and designates certain patterns of the integrated circuit pattern that meet a design waiver. The pattern matcher generates a second layout pattern with the waived patterns marked. The design rule checker subsequently processes the marked layout pattern and validates all but the marked patterns of the second layout pattern against a set of specified design rules. The design rule checker generates a third layout pattern with only the unmarked patterns of the layout being validated against the set of specified design rules. | 03-11-2010 |
| 20100083208 | METHOD AND SYSTEM FOR PERFORMING PATTERN CLASSIFICATION OF PATTERNS IN INTEGRATED CIRCUIT DESIGNS - Disclosed is an approach for performing pattern classification for electronic designs. One advantage of this approach is that it can use fast pattern matching techniques to classify both patterns and markers based on geometric similarity. In this way, the large number of markers and hotspots that typically are identified within an electronic design can be subsumed and compressed into a much smaller set of pattern families. This significantly reduced the number of patterns that must be individually analyzed, which considerably reduces the quantity of system resources and time needed to analyze and verify a circuit design. | 04-01-2010 |