| Patent application number | Description | Published |
|---|
| 20090060118 | Method of operating ripple counter, image sensor having ripple counter, method of operating image sensor, and analog-to-digital converter of image sensor - An example embodiment of an image sensor may include a controller and a plurality of up/down ripple counters. The controller may generate a first control signal and a second control signal. Each of the up/down ripple counters may perform a stop operation or a count operation in response to a corresponding one of a plurality of operation control signals generated based on at least in part on the first control signal. The count operation may be an up-count operation or a down-count operation based on the second control signal. The image sensor may also include a plurality of memory chains. Each of the memory chains may receive a count value output from the up/down counters and may shift the received count value in response to a third control signal and a fourth control signal output from the controller. | 03-05-2009 |
| 20090184239 | Boost circuit capable of controlling inrush current and image sensor using the boost circuit - In one embodiment, the boost circuit includes a boost unit configured to perform a charge pumping operation based on a control signal. A controller is configured to control the boost unit such that the boost unit performs a lesser charge pumping operation from an initial time when power is supplied to the boost circuit until a desired time than after the desired time. | 07-23-2009 |
| 20090195682 | Counter array and image sensor including the same - A counter array and an image sensor including the same may be provided. The counter array may include a controller and a plurality of counter units. The controller may output an operation control signal and a direction indication signal. The counter units hold previous output values or may perform a counting operation in response to the operation control signal and may perform an up-count operation or a down-count operation in response to the direction indication signal when performing the counting operation. | 08-06-2009 |
| 20090309991 | Pseudo-digital average sub sampling method and apparatus - A method of k*k subsampling, where k is an integer greater than one, a full frame readout on a plurality of pixels arranged in rows and columns, each pixel belonging to one of at least two sets, a first set configured to sense a first value of an image parameter and a second set configured to sense a second value of the image parameter, the method including sampling signals of k pixels of at least one set in a first row to output subsampled signals, converting the subsampled signals into digital signals having a lower resolution than the full frame readout, repeating sampling and converting for k rows, and adding digital signals for the first to kth rows within the at least one set. | 12-17-2009 |
| 20100225796 | DOUBLE DATA RATE (DDR) COUNTER, ANALOG-TO-DIGITAL CONVERTER (ADC) USING THE SAME, CMOS IMAGE SENSOR USING THE SAME AND METHODS IN DDR COUNTER, ADC AND CMOS IMAGE SENSOR - In a double data rate (DDR) counter and counting method used in, for example, an analog-to-digital conversion in, for example, a CMOS image sensor and method, a first stage of the counter generates a least significant bit (LSB) of the value in the counter. The counter includes at least one second stage for generating another bit of the value in the counter. An input clock signal is applied to a data input of the first stage and a clock input of the second stage. | 09-09-2010 |
| 20110058081 | IMAGE SENSOR, METHOD FOR OPERATING THEREOF, AND IMAGE PICK-UP DEVICE HAVING THE SAME - The image sensor includes a plurality of column lines, a plurality of active road circuits and a selection circuit. The plurality of column lines are each connected to a corresponding one of a plurality of pixels. The plurality of active road circuits are each connected to a corresponding one of the plurality of column lines. The selection circuit is configured to enable a portion of the plurality of active road circuits based on a plurality of column selection signals. | 03-10-2011 |
| 20110074968 | Multiple data rate counter, data converter including the same, and image sensor including the same - A counter includes a buffer unit and a ripple counter. The buffer unit generates at least one least significant signal of a count by buffering at least one clock signal until a termination time point. The ripple counter generates at least one most significant signal of the count by sequentially toggling in response to at least one of the least significant signal. The counter performs multiple data rate counting with enhance operation speed and reduced power consumption. | 03-31-2011 |
