Kyougoku

Hiroaki Kyougoku, Ohsaka-Fu JP

Patent application number	Description	Published
20080225916	Excessive current input suppressing semiconductor laser light emitting circuit - A semiconductor laser light emitting circuit includes a semiconductor laser diode emitting a laser light by modulating a current supplied thereto, a light intensity detection circuit that detects the laser light and generates a voltage, and a voltage-current conversion circuit converting a voltage into a current supplied to the laser diode. A S/H capacitance is provided to store electric charge and output a voltage to the voltage/current conversion circuit. A first operational amplifier is provided to output a first current charging the S/H capacitance. A rapidly charging circuit is provided to charge the S/H capacitance with a second current. The rapidly charging circuit terminates charging when the voltage is equal to or more than a second reference voltage.	09-18-2008

Patent application number	Description	Published
20090026571	SOLID-STATE IMAGING DEVICE - A solid-state imaging device includes first pixels and second pixels. Each of the first pixels and the second pixels includes a p-type diffusion layer formed in a semiconductor substrate and an n-type diffusion layer formed on the p-type diffusion layer. A first p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the first pixels. A second p-type implantation layer having a lower impurity concentration than the first p-type implantation layer or no p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the second pixels.	01-29-2009

Patent application number	Description	Published
20120025371	SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor chip, wiring formed thereon, a first insulating film formed on the wiring, provided with a first opening, a pad electrode formed so as to be in contact with the wiring, a second insulating film formed on the pad electrode film, provided with a second opening, and a flip chip bump formed so as to be in contact with the pad electrode film. In this case, the second insulating film exists between the flip chip bump and the pad electrode film, in a region directly underneath the outer edge of the flip chip bump, as seen in a plan view, and the outer edge of the flip chip bump is formed in a region inside the outer edge of the pad electrode film.	02-02-2012