| Patent application number | Description | Published |
|---|
| 20080235649 | METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, APPARATUS FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, RECORDING MEDIUM, AND MASK MANUACTURING METHOD - A method of designing a semiconductor integrated circuit includes a cell arranging and wiring step of arranging and wiring cells for creating a physical layout, a design-rule checking step of verifying a shape of a second physical layout including the cells of the physical layout with reference to a rule library for design rule check, a mask-data creating step of creating mask data corresponding to the physical layout using the second physical layout when the design rule is satisfied in the design-rule checking step, a mask-data processing step of performing, when the design rule is not satisfied in the design-rule checking step, mask data processing for the verification-object second physical layout, and a mask-data creating step for creating mask data corresponding to the physical layout using the second physical layout subjected to the mask data processing in the mask-data processing data. | 09-25-2008 |
| 20080295049 | PATTERN DESIGNING METHOD, PATTERN DESIGNING PROGRAM AND PATTERN DESIGNING APPARATUS - An embodiment of the invention provides a pattern designing method, including the steps of carrying out transfer simulation calculation and step simulation calculation by using physical layout data produced from circuit design data, and comparing a result of the transfer simulation calculation and the step simulation calculation with a preset standard; and carrying out calculation for electrical characteristics by using parameters obtained from the physical layout when as a result of the comparison, the preset standard is fulfilled, and carrying out calculation for the electrical characteristics by reflecting the result of the transfer simulation calculation and the step simulation calculation in the parameters when as the result of the comparison, the preset standard is not fulfilled, thereby extracting the parameters. | 11-27-2008 |
| 20090193375 | MANUFACTURING METHOD, MANUFACTURING PROGRAM AND MANUFACTURING SYSTEM FOR SEMICONDUCTOR DEVICE - The present of the invention provides a method of manufacturing a semiconductor device, including the steps of: acquiring information on a graphic composing a physical layout of a semiconductor integrated circuit; carrying out calculation for a transferred image in the physical layout; carrying out calculation for a signal delay based on the physical layout, and obtaining a wiring not meeting a specification having the signal delay previously set therein; and setting a portion into which a repeater is to be inserted based on at least one result of results obtained from the information on the graphic and calculation for the transferred image, respectively, with respect to the wiring not meeting the specification. | 07-30-2009 |
| 20100035367 | FILM THICKNESS PREDICTION METHOD, LAYOUT DESIGN METHOD, MASK PATTERN DESIGN METHOD OF EXPOSURE MASK, AND FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT - A film thickness prediction method of predicting a film thickness of a second processed layer after planarization includes the steps of: creating first to third actual measurement databases; obtaining a reference film thickness of a second processed layer formed on a region in which no circuit pattern exists; segmenting a first processed layer to be formed on a substrate into grid-like meshes, and obtaining a pattern area ratio occupied by a circuit pattern to be formed on a first processed layer in each mesh and further obtaining a circumferential length of the circuit pattern in each mesh; obtaining an initial thickness of the second processed layer in each mesh; and predicting the film thickness of the second processed layer after planarization from an initial film thickness predicted value and an amount of planarization H | 02-11-2010 |
| 20100207242 | Capacitive element, designing method of the same and integrated circuit device including the same - Disclosed herein is a capacitive element formed by multilayer wirings, wherein a total capacitance, intralayer capacitance and interlayer capacitance are calculated for a plurality of device structures by changing parameters relating to the multilayer wirings in an integrated circuit, a device structure is identified, from among the plurality of device structures, whose difference in the total capacitance between the device structures is equal to or less than a predetermined level and at least either of whose ratio of the intralayer capacitance to the total capacitance or ratio of the interlayer capacitance to the total capacitance satisfies a predetermined condition, and the parameters of the device structure satisfying the predetermined condition are determined as the parameters of the multilayer wirings. | 08-19-2010 |
| 20100299643 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE, PROGRAM FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND PROGRAM FOR GENERATING MASK DATA - A method for manufacturing a semiconductor device includes the steps of reading physical layout data of a circuit to be manufactured and performing calculation to modify a pattern width in the physical layout data by a predetermined amount; reading a physical layout and analyzing a pattern that is predicted to remain as a step difference of a predetermined amount or more in a case where a planarization process is performed on a planarizing film on a pattern by a quantitative calculation by using at least one of a density of patterns, a pattern width, and a peripheral length of a range of interest and a range in the vicinity of the range of interest; and reading data of the pattern that is predicted to remain as a step difference, and making a correction to a layout in which a step difference of a predetermined amount or more does not remain. | 11-25-2010 |
| 20110108705 | SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD AND DESIGNING METHOD THEREOF, AND ELECTRONIC DEVICE - A solid-state imaging device includes: a semiconductor substrate that includes a photodiode separately provided for each of pixels disposed in a matrix on a light-receiving surface; a first insulating film formed on the semiconductor substrate so as to cover multilayer wiring formed on and in contact with the semiconductor substrate, wherein the first insulating film is formed using material of a first refractive index lower than a refractive index of the semiconductor substrate for at least bottom surface and top surface portions of the first insulating film; a second insulating film of a second refractive index higher than the first refractive index formed on the first insulating film; a third insulating film of a third refractive index higher than the second refractive index formed on the second insulating film; and a color filter formed on the third insulating film in a corresponding manner with each pixel so as to transmit light in a wavelength region of red, green, or blue. | 05-12-2011 |
