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| 20090315137 | SEMICONDUCTOR DEVICES, CMOS IMAGE SENSORS, AND METHODS OF MANUFACTURING SAME - A semiconductor device includes: a trench device isolating region formed in a substrate to define a photodiode active region; a channel stop impurity region formed in the substrate contacting the device isolating region, wherein the channel stop impurity region surrounds a bottom and a sidewall of the device isolating region; and a photodiode formed within the photodiode active region. | 12-24-2009 |
| 20100176474 | BACK-LIT IMAGE SENSOR AND METHOD OF MANUFACTURE - A backside-illuminated image sensor includes photoelectric converters disposed in a front-side of a substrate and arranged to define pixels, back-side interlayer dielectric patterns disposed on the back-side of the substrate over the photoelectric converters, color filters arranged over the back-side interlayer dielectric patterns, and micro-lenses arranged over the color filters, wherein adjacent back-side interlayer dielectric patterns are separated by an intervening gap region having a refractive index less than that of the back-side interlayer dielectric patterns. | 07-15-2010 |
| 20110291219 | BACKSIDE ILLUMINATION IMAGE SENSOR, METHOD OF FABRICATING THE SAME, AND ELECTRONIC SYSTEM INCLUDING THE BACKSIDE ILLUMINATION IMAGE SENSOR - A backside illumination image sensor, a method of fabricating the same, and an electronic system including the backside illumination image sensor, the backside illumination image sensor including a semiconductor substrate, the semiconductor substrate having an upper surface and a lower surface; photodiodes in the semiconductor substrate; and metal interconnections below the semiconductor substrate, wherein each of the photodiodes includes a N-type region, a lower P-type region below the N-type region, and an upper P-type region on the N-type region. | 12-01-2011 |
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| 20080246162 | Stack package, a method of manufacturing the stack package, and a digital device having the stack package - A chip stack package may include a substrate, semiconductor chips, a molding member and a controller. The substrate may have a wiring pattern. The semiconductor chips may be stacked on a first surface of the substrate. Further, the semiconductor chips may be electrically connected to the wiring pattern. The molding member may be formed on the first substrate covering the semiconductor chips. The controller may be arranged on a second surface of the substrate. The controller may be electrically connected to the wiring pattern. The controller may have a selection function for selecting operable semiconductor chip(s) among the semiconductor chips. | 10-09-2008 |
| 20100044852 | VERTICAL STACK TYPE MULTI-CHIP PACKAGE HAVING IMPROVED GROUNDING PERFORMANCE AND LOWER SEMICONDUCTOR CHIP RELIABILITY - A vertical stack type multi-chip package is provided having improved reliability by increasing the grounding performance and preventing the decrease in reliability of the multi-chip package from moisture penetration into a lower semiconductor chip. The vertical stack type multi-chip package comprises an organic substrate having a printed circuit pattern on which a semiconductor chip is mounted. A first semiconductor chip is mounted on a die bonding region of the organic substrate and is electrically connected to the organic substrate through a first wire. A metal stiffener is formed on the first semiconductor chip and connected to the organic substrate by a first ground unit around the first semiconductor chip. An encapsulant is used to seal the first semiconductor chip below the metal stiffener. A second semiconductor chip, which is larger in size than that the first semiconductor chip, is mounted on the metal stiffener and connected by a second ground unit. The second semiconductor chip is connected to the organic substrate by a second wire. A mold resin seals the second semiconductor chip and a solder ball is bonded to a solder ball pad below the organic substrate. | 02-25-2010 |
| 20110084380 | SEMICONDUCTOR PACKAGES HAVING PASSIVE ELEMENTS MOUNTED THEREONTO - A semiconductor package onto which a plurality of passive elements is mounted. A substrate includes a first surface and a second surface. A semiconductor chip is on one of the first surface and the second surface of the substrate. A plurality of passive elements are on the substrate. The plurality of passive elements include a plurality of first passive elements and a plurality of second passive elements that are taller than the plurality of first passive elements. The plurality of first passive elements are on at least one of the first surface and the second surface, and at least two of the plurality of second passive elements are on the second surface. | 04-14-2011 |
| 20110116247 | SEMICONDUCTOR PACKAGE HAVING MULTI PITCH BALL LAND - A semiconductor device having a printed circuit board and a semiconductor chip. The printed circuit board includes a chip region, a plurality of first ball lands adjacent to the chip region, and at least one second ball land adjacent to the first ball lands. The semiconductor chip is mounted on the chip region. The first ball lands are arranged to have a first pitch. One of the first ball lands which is nearest to the second ball land, and the second ball land have a second pitch greater than the first pitch. | 05-19-2011 |
| 20110149493 | STACKED SEMICONDUCTOR PACKAGES, METHODS OF FABRICATING THE SAME, AND/OR SYSTEMS EMPLOYING THE SAME - An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound. | 06-23-2011 |
| 20110233771 | SEMICONDUCTOR PACKAGES HAVING WARPAGE COMPENSATION - A semiconductor package can include a substrate body having a first surface and a second surface. A semiconductor chip can be mounted on the first surface and a plurality of electrode pads can be on the second surface and selectively formed to have progressively smaller or larger sizes extending from a central region of the substrate body toward an outer edge of the substrate body based on a reflow soldering process warpage profile for the semiconductor package. | 09-29-2011 |
| 20120091597 | STACKED SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE INCLUDING THE STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE STACKED SEMICONDUCTOR PACKAGE - A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections electrically connecting the first and second semiconductor packages. The connections are disposed on an outer region of the first package substrate outside the first semiconductor chip. The connections are disposed along opposite first longer sides and opposite shorter second sides of the first package substrate. The heights of those connections disposed along each longer first side gradually vary from a central to an outer region (i.e., the ends) of the longer first side. | 04-19-2012 |
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| 20100301591 | ROOF AIRBAG APPARATUS WITH AIRBAG DOOR HAVING LIMITED OPENING ANGLE - A roof airbag apparatus, may include an inflator, a housing mounted to an opening frame provided in a vehicle roof, the opening frame defining an opening therein to receive the housing, an airbag cushion contained in the housing, the airbag cushion being deployed downwards by gas supplied from the inflator to protect a passenger, an airbag door coupled to the housing by a hinge to support the airbag cushion, and angle limiting means for limiting a rotating angle to a predetermined angle when the airbag door is rotated to open. | 12-02-2010 |
| 20110115200 | AIRBAG MOUNTING ASSEMBLY FOR VEHICLES - An airbag mounting assembly for vehicles to mount a passenger airbag housing to a cowl cross bar may include a mounting bracket, a first end thereof being mounted to the passenger airbag housing and a fastening unit mounting a second end of the mounting bracket to the cowl cross bar. | 05-19-2011 |
| 20120032425 | Pre-Crash Side Air Bag Device - A pre-crash side airbag device includes a side collision detection sensor, a pre-crash sensor, a main airbag, an auxiliary airbag, and a control unit. The side collision detection sensor detects a collision occurring at the side of a vehicle. The pre-crash sensor detects physical quantities related to the speed of an approaching object. The main airbag is deployed when a control signal is input. The auxiliary airbag is coupled to one side of the main airbag. The control unit controls the deployment of the main airbag and the auxiliary airbag depending on a pre-crash case where a high-speed side collision is expected and a normal case where a low-speed side collision is expected or the measurement value is erroneous. | 02-09-2012 |
| 20120043740 | Curtain Airbag Cushion and Curtain Airbag Module Using the Same - Disclosed herein is a curtain airbag cushion. The cushion has a length appropriate for being deployed to the chest of a passenger. A blocking part which partitions the interior of the cushion into portions is oriented in the vertical direction. The lower end of the blocking part is spaced apart from the bottom of the cushion by a predetermined distance. Thus, when an inflator explodes, gas discharged from the inflator is guided towards the lower portion of the cushion and then guided towards the front or upper portion of the cushion through the space between the lower end of the blocking part and the bottom of the cushion. | 02-23-2012 |
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| 20090086525 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 04-02-2009 |
| 20090283763 | Transistors, semiconductor devices and methods of manufacturing the same - A transistor having a self-align top gate structure and methods of manufacturing the same are provided. The transistor includes an oxide semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region. The transistor further includes a gate insulating layer and a gate electrode, which are sequentially stacked on the channel region. Semiconductor devices including at least one transistor and methods of manufacturing the same are also provided. | 11-19-2009 |
| 20100085821 | Operation method of non-volatile memory - Example embodiments provide a method of operating a non-volatile memory in which the non-volatile memory may only be changed from a first state to a second state and may not be changed from the second state to the first state during a programming operation. | 04-08-2010 |
| 20110116297 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 05-19-2011 |
| 20110116336 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 05-19-2011 |
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| 20080316824 | Non-volatile memory device and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 12-25-2008 |
| 20100096628 | Multi-layered memory apparatus including oxide thin film transistor - Provided is a multi-layered memory apparatus including an oxide thin film transistor. The multi-layered memory apparatus includes an active circuit unit and a memory unit formed on the active circuit unit. A row line and a column line are formed on memory layers. A selection transistor is formed at a side end of the row line and the column line. | 04-22-2010 |
| 20120026790 | Non-volatile memory device including block state confirmation cell and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 02-02-2012 |
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| 20110173079 | BIDDING MANAGEMENT METHOD AND SYSTEM USING BIDDING ATTRIBUTE INFORMATION - Provided is a bid management method and system using bid attribute information. The bid management method may include receiving a bid request including bid attribute information of an advertisement listing, determining a display rank of the advertisement listing using the bid attribute information, and calculating a final bid amount of the advertisement listing based on the display rank of the advertisement listing. | 07-14-2011 |
| 20110208596 | METHOD AND SYSTEM FOR PROVIDING ADVERTISING IN WHICH THE BID PRICE PER UNIT TIME IS ADJUSTED IN ACCORDANCE WITH ADVERTISING TRAFFIC - A method and system for offering an advertisement by adjusting a bid price per unit time according to advertising traffic are provided. The advertisement offering method includes determining a bid price per unit time based on an average bid price input by an advertiser and advertising traffic, and determining a charge regarding the advertisement of the advertiser based on the bid price per unit time. | 08-25-2011 |
| 20110246288 | METHOD AND SYSTEM FOR MANAGING QUALITY OF ADVERTISED WEBPAGE - Disclosed is a method and system for managing quality of an advertising document. The method of managing document quality may include verifying a number of actual clicks corresponding to a number of clicks that may occur during a predetermined period with respect to at least one document that may exist on the Web, verifying a number of expected clicks corresponding to a number of clicks that may be expected to occur during the predetermined period with respect to the at least one document, and determining a quality management index by which quality of the at least one document may be numerically expressed based on the number of the expected clicks and the number of the actual clicks. | 10-06-2011 |
| 20110251901 | METHOD FOR AUCTIONING AND BILLING FOR SEARCH ADVERTISEMENT, SYSTEM, AND COMPUTER-READABLE RECORDING MEDIUM - A method, system, and computer-readable recording medium for holding an auction and imposing a charge in relation to a search advertisement are provided. The method includes receiving bid information related to the search advertisement from an advertiser calculating device, the bid information including a search keyword, a posted time of the search advertisement, and a bid price for the search advertisement, determining a posting position and/or a posting order of the search advertisement with respect to a predetermined time slot of the posted time of the search advertisement, based on the bid price corresponding to the time slot, and posting the search advertisement according to the determined posting position and/or the posting order for the predetermined time slot. | 10-13-2011 |
| 20110258191 | SYSTEM AND METHOD FOR PROVIDING SEARCH RESULTS BASED ON REGISTRATION OF EXTENDED KEYWORDS - Provided is a system and method providing a search result by registering an extended keyword. A search result providing system may include a registration keyword determining unit to determine whether a registration keyword is required to be additionally registered based on at least of information associated with a registration of an input keyword, and a registration keyword registration unit to additionally register the registration keyword associated with the input keyword. | 10-20-2011 |
| 20110264514 | BILLING METHOD AND SYSTEM THAT DETERMINES ADVERTISEMENT COSTS ACCORDING TO UNIT TIME - A charging method and system for determining an advertising cost according to a unit time are provided. The charging method includes checking a performance index numerically indicating performance of an advertisement; checking a priority index of a next-priority advertisement to the advertisement; and determining an actual charge per unit time of the advertisement based on the performance index, the priority index, and a predetermined weight. | 10-27-2011 |
| 20110282751 | METHOD AND SYSTEM FOR ADVERTISING USING MINIMUM INCREMENT BID - A method and system for providing an advertisement using a minimum incremental unit are provided. The advertisement providing method includes adjusting a minimum incremental unit based on an initial bid price, an input bid price, and a maximum bid price bid price during an auction. The minimum incremental unit includes a minimum value of increment to be included in a current input bid price in addition to a previously input bid price. | 11-17-2011 |
| 20120084140 | SYSTEM AND METHOD FOR ADJUSTING NUMBER OF ADVERTISEMENT INVENTORIES - Provided is a system and method for adjusting a number of advertisement inventories based on a competition factor. An advertisement inventory adjusting system includes a competition determining unit to determine a competition factor for a keyword, an advertisement inventory adjusting unit to dynamically adjust the number of advertisement inventories based on the determined competition factor, and a data storage medium to store advertisement inventories. A method that uses a processor to adjust a number of advertisement inventories includes determining a competition factor for a keyword advertisement with respect to a keyword, and dynamically adjusting, using the processor, the number of advertisement inventories based on the determined competition factor, in which the advertisement inventories refer to available areas to display the keyword advertisement. | 04-05-2012 |
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| 20080238299 | NANODOT ELECTROLUMINESCENT DIODE OF TANDEM STRUCTURE AND METHOD FOR FABRICATING THE SAME - A nanodot electroluminescent diode is disclosed. The nanodot electroluminescent diode comprises a lower electrode, an upper electrode, and unit cells interposed between the electrodes, wherein the unit cells comprise a quantum dot electroluminescent layer and also include an organic layer and/or an inorganic layer in addition to the quantum dot electroluminescent layer. The disclosed nanodot electroluminescent diode provides high efficiency, stability, and high luminance, and mixed colors, multi-colors, full color, and white electroluminescence can be obtained. | 10-02-2008 |
| 20090045720 | Method for producing nanowires using porous glass template, and multi-probe, field emission tip and devices employing the nanowires - Disclosed herein is a method for producing nanowires, which features the use of a porous glass template in combination with a solid-liquid-solid or vapor-liquid-solid process for growing nanowires which are highly straight and have nanoparticles precisely arranged therein. The nanowires can be grown into composite structures of superlattices and hybrids by modulating the composition of the materials provided thereto. Also disclosed is the use of the nanowires in multi-probes, field emission tips, and devices. | 02-19-2009 |
| 20100051583 | METHOD FOR PREPARING POROUS MATERIAL USING NANOSTRUCTURES AND POROUS MATERIAL PREPARED BY THE SAME - Disclosed herein is a method for preparing a porous material using nanostructures. The method comprises the steps of producing nanostructures using a porous template, dispersing the nanostructures in a source or precursor material for the porous material, aligning the nanostructures in a particular direction, and removing the nanostructures by etching. According to the method, the size, shape, orientation and regularity of pores of the porous material can be easily controlled, and the preparation of the porous material is simplified, leading to a reduction in preparation costs. | 03-04-2010 |
| 20100127214 | METHOD OF PREPARING OXIDE-BASED NANOPHOSPHOR - A method of preparing oxide-based nanophosphor includes preparing a reaction mixture by dissolving reaction mixture components including a metal halide, an oleate, and a precipitation auxiliary compound in a solvent; irradiating the reaction mixture with microwave radiation to precipitate an oxide-based nanophosphor precursor; and sintering the oxide-based nanophosphor precursor. | 05-27-2010 |
| 20100201004 | CARBON/EPOXY RESIN COMPOSITION AND METHOD OF PRODUCING A CARBON-EPOXY DIELECTRIC FILM USING THE SAME - A carbon/epoxy resin composition and a method of producing a carbon-epoxy dielectric using the same. The carbon/epoxy resin composition includes about 45 volume percent (volume %) to about 50 volume % of an epoxy composition, the epoxy composition including a bisphenol-based epoxy compound and an alicyclic epoxy compound, based on a total volume of the carbon/epoxy resin composition, about 2.0 volume % to about 3.1 volume % of carbon black, based on a total volume of the carbon/epoxy resin composition, about 80 parts by volume to about 104 parts by volume of an acid anhydride-based curing agent, based on 100 parts by volume of the epoxy composition, and about 1 part by volume to about 3 parts by volume of a tertiary alkylamine-based curing catalyst, based on 100 parts by volume of the epoxy composition. | 08-12-2010 |
| 20110101303 | LIGHT-EMITTING DEVICE COMPRISING SEMICONDUCTOR NANOCRYSTAL LAYER FREE OF VOIDS AND METHOD FOR PRODUCING THE SAME - A light-emitting device including a semiconductor nanocrystal layer and a method for producing the light-emitting device are provided. The light-emitting device includes a semiconductor nanocrystal layer whose voids are filled with a filling material. According to the light-emitting device, since voids formed between nanocrystal particles of the semiconductor nanocrystal layer are filled with a filling material, the occurrence of a current leakage through the voids is minimized, which enables the device to have extended service life, high luminescence efficiency, and improved stability. | 05-05-2011 |
