| Patent application number | Description | Published |
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| 20090148625 | METHOD FOR FORMING THIN FILM - A method for forming a thin film by using an atomic layer deposition (ALD) method and a method for fabricating a capacitor using the same includes: supplying a source gas, a reaction gas, and a purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas, wherein supplying the source gas, the reaction gas, and the purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas constitutes a unit cycle, and repeating the unit cycle until a thin film having a desired thickness is deposited. | 06-11-2009 |
| 20100181611 | DIELECTRIC STRUCTURE IN NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric constant of approximately 9 or higher and a compound of at least two of the materials; and a second oxide layer formed on the first high-k dielectric film. | 07-22-2010 |
| 20110027465 | METHOD FOR FORMING DIELECTRIC FILM AND METHOD FOR FORMING CAPACITOR IN SEMICONDUCTOR DEVICE USING THE SAME - Provided is a method for forming a dielectric film in a semiconductor device, wherein the method can improve a dielectric characteristic and a leakage current characteristic. According to specific embodiments of the present invention, the method for forming a dielectric film includes: forming a zirconium dioxide (ZrO | 02-03-2011 |
| 20110068380 | SEMICONDUCTOR DEVICE WITH BULB-TYPE RECESSED CHANNEL AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers. | 03-24-2011 |
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| 20100283096 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment. | 11-11-2010 |
| 20100317166 | METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE - A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer. | 12-16-2010 |
| 20110045666 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, including forming gate patterns over a substrate, forming conductive layer covering top and sidewalls of each gate pattern, forming a metal layer for a silicidation process over the conductive layer, and silicifying the conductive layer and the gate patterns using the metal layer. | 02-24-2011 |
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| 20080233762 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a high dielectric insulating layer. An amorphous high dielectric insulating layer having a high density is formed by using a precursor which can be deposited through the atomic layer deposition method at a temperature above 400° C. A resulting insulating exhibits a reduced crystallization during a subsequent annealing process. The capacitance equivalent thickness (CET) characteristic and the leakage current characteristic are improved. | 09-25-2008 |
| 20090068850 | Method of Fabricating Flash Memory Device - The present invention relates generally to a method of fabricating a flash memory device. The method includes forming a tunnel dielectric layer on a semiconductor substrate using a plasma oxidization process. The tunnel dielectric layer is formed using the plasma oxidation process employing Ar and O | 03-12-2009 |
| 20090124096 | METHOD OF FABRICATING FLASH MEMORY DEVICE - The present invention relates to a method of fabricating a flash memory device, the method of the present invention comprises the steps of forming a tunnel insulating layer on a semiconductor substrate through a plasma oxidation process and performing a nitridation treatment to a surface of the tunnel insulating layer. | 05-14-2009 |
| 20090163015 | Method of Fabricating Flash Memory Device - The present invention relates to a method of fabricating a flash memory device. According to a method of fabricating a flash memory device in accordance with an aspect of the present invention, a semiconductor substrate over which a tunnel insulating layer and a first conductive layer are formed is provided. A first oxide layer is formed on the first conductive layer using a plasma oxidization process in a state where a back bias voltage is applied. A nitride layer is formed on the first oxide layer. A second oxide layer is formed on the nitride layer. A second conductive layer is formed on the second oxide layer. | 06-25-2009 |
| 20090166711 | Tunnel Insulating Layer of Flash Memory Device and Method of Forming the Same - The present invention discloses a tunnel insulating layer in a flash memory device and a method of forming the same, the method according to the present invention comprises the steps of forming a first oxide layer on a semiconductor substrate through a first oxidation process; forming a nitride layer on an interface between the semiconductor substrate and the first oxide layer through a first nitridation process; forming a second nitride layer on the first oxide layer through a second nitridation process; forming a second oxide layer on the second nitride layer through a second oxidation process; and forming a third nitride layer on the second oxide layer through a third nitridation process. | 07-02-2009 |
| 20090181528 | Method of Forming Gate Electrode - The present invention discloses to a method of forming a gate electrode, the method according to the present invention comprises the steps of forming a lower amorphous silicon layer using silane (SiH | 07-16-2009 |
