| Patent application number | Description | Published |
|---|
| 20080298476 | APPARATUS FOR ALL-DIGITAL SERIALIZER-DE-SERIALIZER AND ASSOCIATED METHODS - An all-digital serializer-de-serializer includes an all-digital clock multiplier unit (CMU) circuit, an all-digital clock and data recovery (CDR) circuit, a multiplexer (MUX), and a demultiplexer (DeMUX). The all-digital clock and data recovery (CDR) circuit couples to the all-digital clock multiplier unit (CMU) circuit. The multiplexer (MUX), couples to all-digital clock multiplier unit (CMU) circuit, and serializes data. The demultiplexer (DeMUX), couples to the all-digital clock and data recovery (CDR) circuit, and de-serializes data. | 12-04-2008 |
| 20090302887 | APPARATUS FOR POWER CONSUMPTION REDUCTION IN PROGRAMMABLE LOGIC DEVICES AND ASSOCIATED METHODS - A programmable logic device (PLD) includes a driver circuit, a configuration memory, and a control circuit. The configuration memory stores driver strength information for the driver circuit. The control circuit uses the driver strength information stored in the configuration circuit to control the driver strength of the driver. | 12-10-2009 |
| 20100027607 | APPARATUS FOR TIME-DOMAIN PRE-EMPHASIS AND TIME-DOMAIN EQUALIZATION AND ASSOCIATED METHODS - An integrated circuit (IC) includes a transmitter. The transmitter includes a pre-emphasis circuit. The pre-emphasis circuit pre-distorts an input signal by moving in time a sampling point of the input signal. The input signal is thus pre-distorted before transmission to a communication channel. The IC may optionally include a receiver. The receiver includes an equalization circuit. The equalization circuit equalizes a signal received from a communication channel by moving in time a sampling point of the signal received from the communication channel. | 02-04-2010 |
| 20110156806 | CHARGE PUMP WITH REDUCED CURRENT MISMATCH - Charge pump circuitry is provided that is insensitive to charge sharing and current mismatch effects. The charge pump circuitry has an output node at which a charge pump output voltage is provided. A first current source charges the output node to increase the output voltage or a second current source discharge the output node to decrease the output voltage. The charge pump circuitry uses a unit-gain op-amp circuit to prevent charge sharing effects from affecting the output voltage when switching between discharging and charging operations. A low-pass filter is used to reduce feedback noise on the output node. A replica feedback circuit prevents current mismatch between the currents produced by the first and second current sources. The first and second current sources may be formed using programmable transistors that are adjusted by static control signals provided by programmable elements to further minimize current mismatch. | 06-30-2011 |
