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Kwang-Chul
Kwang-Chul Choi, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120018871 | STACK PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip. | 01-26-2012 |
Kwang-Chul Jung, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090207108 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a driving element, a switching element, a gate line, a data line, a driving voltage line and an electroluminescent element. The driving element includes a driving control electrode formed from a first conductive layer, and a driving input electrode and a driving output electrode formed from a second conductive layer. The switching element includes a switching control electrode formed from the second conductive layer, and a switching input electrode and a switching output electrode formed from a third conductive layer. The gate and data lines are formed from the second and third conductive layers, respectively. The driving voltage line is formed from the third conductive layer. Thus, misalignment between upper and lower patterns may be prevented to improve the reliability of a manufacturing process and increase an aperture ratio, thereby enhancing display quality. | 08-20-2009 |
| 20100208184 | ARRAY SUBSTRATE AND DISPLAY APPARATUS HAVING THE SAME - An array substrate includes first and second pixel electrodes. The first pixel electrode includes a plurality of first slit electrode portions and a first supporting electrode portion connected with the first slit electrode portions. The first slit electrode portions extend in a zigzag fashion along the shape of a unit pixel area and a first direction. The second pixel electrode includes a plurality of second slit electrode portions and a second supporting electrode portion connected with the second slit electrode portion. The second slit electrode portions extend in the zigzag fashion along the shape of the unit pixel area and the first direction. Side visibility and a response time may be improved, so that display quality may be improved. | 08-19-2010 |
| 20110128210 | ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - A liquid crystal display device includes a first thin film transistor connected to a first data line and controlling a first voltage output, a second thin film transistor connected to a second data line parallel to the first data line and controlling a second voltage output, a third thin film transistor connected to a third data line disposed between the first data line and the second data line and controlling a third voltage output, a first liquid crystal capacitor electrically connected to the first thin film transistor and the third thin film transistor, and a second liquid crystal capacitor electrically connected to the second thin film transistor and the third thin film transistor. | 06-02-2011 |
Kwang-Chul Jung, Sungnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090195719 | LIQUID CRYSTAL DISPLAY - A liquid crystal display (LCD) is provided that can improve lateral visibility while preventing a decrease in luminance. The LCD includes first and second gate lines which are arranged in parallel with each other and sequentially transmit a gate voltage; a data line which intersects the first and second gate lines and transmits a data voltage; a pixel electrode which is disposed in a pixel and includes first and second sub-pixel electrodes that are connected to each other through a first charge-sharing capacitor; a first switching device which is connected to the first gate line, the data line and the first sub-pixel electrode; a second switching device which is connected to the first sub-pixel electrode through a second charge-sharing capacitor; and a third switching device which is connected to the second gate line and the second sub-pixel electrode and is also connected to the first sub-pixel electrode through the second charge-sharing capacitor. | 08-06-2009 |
Kwang-Chul Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090193238 | Reconfigurable apparatus and method for providing multiple modes - A reconfigurable processor (RP) structure is provided, and particularly, a multi-mode providing apparatus including an exclusive coarse-grained array unit for each mode and a multi-mode providing method thereof are provided. The multi-mode providing apparatus includes: at least one reconfigurable operation mode execution unit performing a plurality of operations for processing a predetermined operation mode; a common coarse-grained array unit shared temporally by the at least one reconfigurable operation mode execution unit, and performing a main processing operation set to be performed by the common coarse-grained array unit, among the plurality of operations; and a controller determining whether the common coarse-grained array unit is available, and according to the result of the determination controlling the at least one reconfigurable operation mode execution unit so that the common coarse-grained array unit or an exclusive coarse-grained array unit performs the main processing operation, the exclusive coarse-grained array unit included in the at least one reconfigurable operation mode execution unit. Therefore, it is possible to reduce a delay time for data processing while reducing the size of hardware. | 07-30-2009 |