Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Kwak, Gyeonggi-Do
Beom-Su Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100244339 | FILTER HAVING MULTILAYERED STRUCTURE FOR FILTERING IMPURITY PARTICLES FROM MOLTEN METAL - A filter has a multi-layered structure for removing impurity particles from a molten metal. The filter includes: a plurality of filter layers sequentially disposed along the flow direction of the molten metal in a downward direction and comprising a plurality of pore channels, wherein the filter layers disposed upstream comprise larger pore channels than those of the filter layers disposed downstream. | 09-30-2010 |
Bong Sik Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110228659 | COLLISION PREVENTION METHOD AND APPARATUS BETWEEN RECORDING MEDIUM AND LENS - A method and apparatus for preventing a collision between a recording medium and a lens are disclosed. The method for preventing the collision between the recording medium and the lens includes controlling a gap error signal (GES) between the recording medium and the lens to be maintained at a near field level, detecting a collision between the recording medium and the lens, pulling out the lens from the recording medium during a predetermined time so as to prevent a re-collision between the recording medium and the lens, and re-controlling the gap error signal (GES) between the recording medium and the lens to be re-maintained at the near field level. | 09-22-2011 |
Bo-Yeon Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110251145 | Phytoestrogenic Compositions for Preventing or Treating Symptoms Associated with Menopause - The present invention relates to a pharmaceutical composition for preventing or treating a menopausal symptom, comprising cinnamic acid, shanzhiside methylester or a mixture thereof as an active ingredient. The composition of the present invention exhibits an excellent estrogenic activity, and is effectively utilized for treating or preventing diverse menopausal symptoms generated by estrogen deficiency during perimenopause, menopause and postmenopause. | 10-13-2011 |
| 20120015059 | Composition for Prevention or Treatment of Insomnia - Provided is a composition for preventing or treating insomnia. The composition includes, as an active ingredient, extract of | 01-19-2012 |
Byung-Heon Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090044063 | Semiconductor memory device and test system of a semiconductor memory device - A semiconductor memory device includes a memory core unit, N data output buffers, N data output ports, and a plurality of test logic circuits. The memory core unit stores test data through N data lines. The N data output buffers are respectively connected to the corresponding N data lines. The N data output ports are connected to the corresponding N data output buffers, and exchange the test data with an external tester respectively. The plurality of test logic circuits receives the test data through the K data lines from the N data lines, performs test logic operation on the received test data, and provides a data output buffer control signal that determines activation of K data output buffers of the N data output buffers in test mode. The semiconductor memory device reduces test cycle. | 02-12-2009 |
Chang-Hun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080212220 | Color filter substrate and method for manufacturing the same - In a color filter substrate and a method for manufacturing the color filter substrate, the color filter substrate includes a base substrate, a first blocking pattern, a second blocking pattern and color filters. The base substrate includes a plurality of pixel areas. The first blocking pattern extends along a direction of the base substrate. The second blocking pattern crosses the first blocking pattern and includes a passage portion through which the base substrate is exposed to connect the pixel areas adjacent to each other along the direction. Color filters are formed in the pixel areas. Accordingly, the uniformity of the color filters and the reliability of the color filter's quality and manufacturing process may be enhanced so that display quality may be enhanced. | 09-04-2008 |
| 20090027431 | INKJET APPARATUS AND DRIVING METHOD, AND MANUFACTURING METHOD OF DISPLAY APPARATUS USING THE SAME - In one embodiment, a driving method of an inkjet apparatus, includes applying the same driving pulse to a plurality of piezoelectric elements; measuring a discharge speed and a discharge volume of a discharged object which is discharged through a plurality of nozzles; adjusting the discharge speed which comprises comparing the discharge speed and discharge volume of each nozzle with a predetermined reference permissible range to detect nozzle deviations from the reference permissible range, and adjusting the discharge characteristic of the one or more detected nozzles within the reference discharge permissible range. | 01-29-2009 |
Dong-Hun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080279010 | FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF - A method for programming a flash memory device comprising programming memory cells via repetition of program loops, a first of the program loops including a program execution interval and a verify read interval, a second of the program loops including the program execution interval, the verify read interval, and a judging interval. Also disclosed is a flash memory device comprising a memory cell array having memory cells arranged in rows and columns, a read/program circuit configured to perform program and read operations to the memory cell array, and a control logic circuit configured to control the read/program circuit so as to perform a judging operation according to a program loop number. | 11-13-2008 |
| 20090190403 | Flash Memory Devices and Erasing Methods Thereof - Disclosed is an erasing method for a flash memory device that includes erasing memory cells of a selected memory block and post-programming the erased memory cells to have a threshold voltage distribution with the lowest level that is at or near 0V. The post-programming includes first post-programming the memory block in the unit of memory block and second post-programming the memory block in the unit of word line. | 07-30-2009 |
Dong-Hwa Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090154240 | NAND FLASH MEMORY DEVICES HAVING WIRING WITH INTEGRALLY-FORMED CONTACT PADS AND DUMMY LINES AND METHODS OF MANUFACTURING THE SAME - A NAND flash memory device includes a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors including respective conductive lines extending in parallel along a first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along a second direction | 06-18-2009 |
| 20090236651 | SEMICONDUCTOR DEVICES HAVING A CONVEX ACTIVE REGION - Methods of forming a semiconductor device include forming a trench mask pattern on a semiconductor substrate having active regions and device isolation regions. A thermal oxidation process is performed using the trench mask pattern as a diffusion mask to form a thermal oxide layer defining a convex upper surface of the active regions. The thermal oxide layer and the semiconductor substrate are etched using the trench mask pattern as an etch mask to form trenches defining convex upper surfaces of the active regions. The trench mask pattern is removed to expose the convex upper surfaces of the active regions. Gate patterns are formed extending over the active regions. | 09-24-2009 |
| 20110032763 | SEMICONDUCTOR DEVICES INCLUDING FIRST AND SECOND BIT LINES - In some embodiments, a semiconductor device includes first bit lines connected to respective first contacts. Spacers are disposed on sidewalls of the first bit lines. A second bit line is self-alignedly disposed between adjacent spacers, and a second contact is self-aligned with and connected to the second bit line. | 02-10-2011 |
| 20110103147 | NAND FLASH MEMORY DEVICES HAVING WIRING WITH INTEGRALLY-FORMED CONTACT PADS AND DUMMY LINES AND METHODS OF MANUFACTURING THE SAME - A NAND flash memory device includes a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors including respective conductive lines extending in parallel along a first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along a second direction | 05-05-2011 |
Eun-Sik Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090114278 | DYE-SENSITIZED SOLAR CELL AND FABRICATION METHOD THEREOF - A dye-sensitized solar cell and a fabrication method thereof are disclosed. A method for fabricating a dye-sensitized solar cell, includes forming a sacrifice layer comprising colloidal particles on a transparent conductive substrate, supplying a photoelectrode material comprising transition metal oxide nano particles onto the sacrifice layer, thereby filling the transition metal oxide nano particles between the colloidal particles, removing the sacrifice layer by thermal treatment to prepare a photoelectrode having an inverse opal structure, and adsorbing dye molecules onto the photoelectrode. | 05-07-2009 |
Hae Woon Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100250557 | SYSTEM AND METHOD FOR EXTRACTING USERS OF SIMILAR INTERESTS BETWEEN VARIOUS TYPES OF WEB SERVERS - Disclosed herein is a system and method for extracting users of similar interests between various types of web servers. The system includes a user profile vector creation unit, a user similarity calculation unit, and a similar user extraction unit. The user profile vector creation unit collects tag data, performs standardization calculation on the degree of importance of each of one or more tags, and creates user profile vectors for respective users. The user similarity calculation unit calculates user similarity using the user profile vectors of the respective users created through the user profile vector creation unit. The similar user extraction unit extracts users of similar interests using the value of the user similarity calculated through the user similarity calculation unit. | 09-30-2010 |
Jae Min Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090073880 | SYSTEM AND METHOD FOR CONTROLLING CONGESTION IN A DEDICATED SHORT RANGE COMMUNICATION SYSTEM - A system and method is disclosed for controlling congestion in communications between an RSE and multiple OBEs in a DSRC system. In certain embodiments, a system and method for controlling congestion in communications between an RSE and multiple OBEs includes determining a priority level for each of multiple OBEs with respect to reserving a channel between each OBE and an RSE. Based on this determination, each OBE is assigned a waiting period based on their respective priority levels. The OBEs then send requests to reserve a channel to the RSE after waiting the assigned waiting periods. | 03-19-2009 |
Jae-Suk Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090308547 | One Cord Blind - Disclosed is a one cord blind that has a simplified structure enabling it to be easily manufactured, prevents a safety accident by not using a ball chain, makes an interior design neat and enables a roll screen to move upward and downward by a rotating cord or hands, so that the upward and downward operations can be easily made. | 12-17-2009 |
| 20110247768 | Child-Resistant Roller Blind Apparatus - A child-resistant roller blind apparatus is provided in which a roller blind is operated only when a safety hook of a cord or a ball chain, which is coupled with an elastic gear, is fixedly mounted after being tightened, so that a safety accident by the ball chain is completely prevented, improving the safety. | 10-13-2011 |
Jeong Soon Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100088461 | SOLID STATE STORAGE SYSTEM USING GLOBAL WEAR LEVELING AND METHOD OF CONTROLLING THE SOLID STATE STORAGE SYSTEM - A solid state storage system is disclosed including a memory area having a plurality of chips. The solid state storage system includes a micro controller unit (MCU) configured to utilize the number of deletions for logical blocks corresponding to logical block addresses when performing wear leveling on the memory area. The allocation of the logical block addresses can be performed using an interleaving process and a multi-plane method. The solid state storage system performs global wear leveling by which the lifespan of the cells of the chips can be uniformly managed. | 04-08-2010 |
| 20100165732 | FLASH MEMORY APPARATUS AND READ OPERATION CONTROL METHOD THEREFOR - A flash memory apparatus of an embodiment is configured to include a flash memory including a plurality of blocks and a read operation control circuit determining whether to replace a block in accordance with the number of times a read process is performed for each block of the plurality of blocks. | 07-01-2010 |
| 20110029749 | SEMICONDUCTOR STORAGE SYSTEM FOR DECREASING PAGE COPY FREQUENCY AND CONTROLLING METHOD THEREOF - A semiconductor storage system includes a memory controller that classifies a memory block of a memory area into a data block and a buffer block. The buffer block corresponds to the data block. The memory controller compares the number of free pages of both the data block and the buffer block with the number of valid pages of the data block and the buffer block during mergence in order to select the merged target block. Depending on the result of the comparison, either the data block or the buffer block is selected as the merged target block. | 02-03-2011 |
| 20110078364 | SOLID STATE STORAGE SYSTEM FOR CONTROLLING RESERVED AREA FLEXIBLY AND METHOD FOR CONTROLLING THE SAME - A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks. | 03-31-2011 |
| 20110107016 | SOLID STATE STORAGE SYSTEMS AND METHODS FOR FLEXIBLY CONTROLLING WEAR LEVELING - Solid-state storage systems and methods are provided for controlling a wear leveling process for uniform use of the memory cells that replaces worn memory blocks with less frequently used memory blocks. The wear leveling process is performed by changing the physical locations of the storage cells within each memory zone or plane. Reference values of target memory block erase counts and worn memory block erase counts are used for searching target memory blocks to be used as replacements. | 05-05-2011 |
Jinsam Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110003553 | APPARATUS AND METHOD FOR ALLOCATING DOWNLINK CONTROL CHANNEL - A method for allocating a downlink control channel in a fractional frequency reuse (FFR) system, includes: dividing a service frequency band of the system into a plurality of frequency partitions including a first frequency partition corresponding to a first frequency reuse factor, a second frequency partition corresponding Kth frequency reuse factor, and a third frequency partition; setting a transmission power level for each of the plurality of divided frequency partitions; allocating a downlink common control channel including non-user specific (NUS) control information common to every user to a particular frequency partition corresponding to the highest transmission power level among the set transmission power levels; and transmitting the NUS control information through the particular frequency partition. | 01-06-2011 |
Jong Hwan Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080280839 | Anti-Cancer Activity of Androsace Umbellata Merr. Extract and Contained Triterpene Saponin - The present invention relates to an | 11-13-2008 |
Joon-Seop Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080299687 | TOP-EMITTING NITRIDE-BASED LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a top-emitting N-based light emitting device and a method of manufacturing the same. The device includes a substrate, an n-type clad layer, an active layer, a p-type clad layer, and a multi ohmic contact layer, which are sequentially stacked. The multi ohmic contact layer includes one or more stacked structures, each including a modified metal layer and a transparent conductive thin film layer, which are repetitively stacked on the p-type clad layer. The modified metal layer is formed of an Ag-based material. | 12-04-2008 |
| 20100285622 | LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a light emitting device and a method of manufacturing the same. The light emitting device comprises a transparent substrate, an n-type compound semiconductor layer formed on the transparent substrate, an active layer, a p-type compound semiconductor layer, and a p-type electrode sequentially formed on a first region of the n-type compound semiconductor layer, and an n-type electrode formed on a second region separated from the first region of the n-type compound semiconductor layer, wherein the p-type electrode comprises first and second electrodes, each electrode having different resistance and reflectance. | 11-11-2010 |
Joon-Young Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090296490 | NON-VOLATILE MEMORY DEVICE, COMPUTING SYSTEM AND WORDLINE DRIVING METHOD - A nonvolatile memory device including a memory cell; a word line coupled to the memory cell; a drive line; a switch coupled between the word line and the drive line, and configured to electrically connect the word line and the drive line; and a voltage generator coupled to the drive line and configured to charge the drive line to a precharge voltage. The precharge voltage is higher than a bias voltage applied to the word line during a corresponding operation on the memory cell. | 12-03-2009 |
Jun-Keun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100029072 | Methods of Forming Electrical Interconnects Using Thin Electrically Insulating Liners in Contact Holes - Methods of forming integrated circuit devices include forming an electrically insulating layer having a contact hole therein, on a substrate, and then depositing an electrically insulating liner onto a sidewall of the contact hole using an atomic layer deposition (ALD) technique. This electrically insulating liner, which may include gelatinous silica or silicon dioxide, for example, may be deposited to a thickness in a range from 40 Å to 100 Å. A portion of the electrically insulating liner is then removed from a bottom of the contact hole and a barrier metal layer is then formed on the electrically insulating liner and on a bottom of the contact hole. The step of forming the barrier metal layer may be followed by filling the contact hole with a metal interconnect. | 02-04-2010 |
Ki Nam Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110244222 | SEAMLESS BELT - The present invention relates to a belt for an image forming apparatus, including a releasing coating layer containing at least one selected from the group consisting of a paraffin-based hydrocarbon that is also known as a paraffin wax, an isomer thereof or ester compound. | 10-06-2011 |
Kook-Whee Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080247104 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT HAVING A REDUCED SIZE AND LOWER OPERATING VOLTAGE - The present invention discloses an electrostatic discharge protection circuit. The electrostatic discharge protection circuit of the present invention includes a transfer unit that transfers electrostaticity from at least one of a plurality of input/output pads to a boost bus line, a trigger unit that responds to the electrostaticity transferred via the boost bus line to detect a trigger voltage and apply it to a trigger bus line, and a plurality of clamp units that are connected between the input/output pads and an internal circuit. The clamp units are triggered by the trigger voltage of the trigger unit to discharge electrostaticity of the input/output pads to a first or second power supply voltage line, thereby safely protecting the internal circuit from electrostatic damage and lowering the operating voltage of the clamp unit with minimum costs without increasing an area of the electrostatic discharge protective circuit within a semiconductor integrated circuit. | 10-09-2008 |
| 20090323237 | Electrostatic Discharge Circuit - An electrostatic discharge device has relatively superior characteristics for protecting a gate insulation layer of an input buffer transistor of a semiconductor device from static electricity while minimizing signal delay. The electrostatic discharge circuit includes a main electrostatic discharge section configured to discharge static electricity inputted to an input/output pad to at least one voltage line, an input impedance section configured to adjust an amount of current flowing from the input/output pad depending upon a frequency of an input signal of the input/output pad, an auxiliary electrostatic discharge section connected to the input impedance section and configured to discharge the static electricity inputted to the input/output pad to the at least one voltage line, and an input buffer connected between the auxiliary electrostatic discharge section and an internal circuit. | 12-31-2009 |
| 20100118457 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT - An electrostatic discharge protection circuit includes an electrostatic induction unit connected between a power supply line and a data input/output line of an input/output pad, and configured to induce static electricity introduced through the input/output pad to the power supply line; a coupling capacitor having a first terminal connected to the power supply line; and a silicon controlled rectifier (SCR) unit connected to a second terminal of the coupling capacitor, connected between the data input/output line and a ground voltage line, and configured to discharge the static electricity on the data input/output line to the ground voltage line by static electricity introduced through the coupling capacitor. | 05-13-2010 |
Koon Yeon Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110007837 | DTV RECEIVER AND METHOD OF PROCESSING BROADCAST SIGNAL IN DTV RECEIVER - A DTV receiver includes a tuner tuning to a channel to receive a broadcast signal, and a demodulator demodulating the broadcast signal. The receiver further includes a first decoder which decodes main and enhanced data included in the demodulated signal by calculating soft decision values for the enhanced data and hard decision values for the main data. The receiver further includes a second decoder for decoding the main and enhanced data for first forward error correction, and a third decoder for decoding the FEC-decoded enhanced data for second forward error correction. | 01-13-2011 |
| 20110072329 | DTV TRANSMITTING SYSTEM AND RECEIVING SYSTEM AND METHOD OF PROCESSING BROADCAST SIGNAL - A DTV transmitting system includes a first pre-processor for coding first enhanced data having a high priority for forward error correction (FEC) at a first coding rate and expanding the first enhanced data at a first expansion rate, and a second pre-processor for coding second enhanced data having a low priority for FEC at a second coding rate and expanding the second enhanced data at a second expansion rate. The receiving system further includes a data formatter for generating enhanced data packets, a multiplexer for multiplexing the enhanced data packets with main data packets, an RS encoder for RS-coding the multiplexed data packets, and a data interleaver for interleaving the RS-coded data packets and outputting a group of interleaved data packets having a head, a body, and a tail. | 03-24-2011 |
Kun-Ho Kwak, Gyeonggi-Do KR
Kyeong-Il Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100252734 | POWER SUPPLY FOR ELECTRON GUN AND ELECTRON MICROSCOPE HAVING THE SAME - A power supply for supplying an electric power to an electron gun, which is used in an electron microscope, and an electron microscope having the same are disclosed. The power supply includes a base board, and at least one sub-board vertically mounted on the base board to supply an electric power to an anode electrode, a filament for emitting electrons, and a grid. The at least one sub-board can include a first sub-board to supply an accelerating voltage to the anode electrode, a second sub-board to supply a heating current to the filament, and a third sub-board to supply a grid voltage to the grid. | 10-07-2010 |
Musun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090169754 | METHOD OF FABRICATING ALIGNMENT LAYER OF LIQUID CRYSTAL DISPLAY DEVICE AND TESTING THE ALIGNMENT LAYER - An alignment layer is tested using an AFM (Atomic Force Microscope) and a FT-IR (Fourier Transformation Infrared Spectroscope) under various process conditions so that inferiority of the alignment layer can be detected and optimum process conditions can be obtained, thereby minimizing the inferiority of the alignment layer by applying the optimum process conditions. | 07-02-2009 |
Noh Jung Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100184359 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device through a chemical mechanical polishing (CMP) process is provided. The CMP process is performed by using a slurry. The semiconductor device fabrication method can ensure the reliability and economical efficiency of the device by performing a CMP process using a CMP slurry having a high polishing selectivity with respect to a target surface, an anti-scratch characteristic, and a high global planarization characteristic. | 07-22-2010 |
| 20100210104 | METHOD FOR FORMING COPPER WIRING IN A SEMICONDUCTOR DEVICE - A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device. | 08-19-2010 |
| 20110159664 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATES - A method for fabricating a semiconductor device includes sequentially stacking a pad oxide layer and a hard mask layer over a substrate, forming a device isolation layer over the substrate, forming a capping layer pattern configured to open a first region of the substrate and cover a second region of the substrate, removing the hard mask layer, removing the capping layer pattern, and removing the pad oxide layer. | 06-30-2011 |
Sang-Ki Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110186849 | TFT SUBSTRATE FOR DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME - Disclosed is a TFT substrate for a display apparatus comprising a gate wiring including a gate electrode, a data wiring including a data line, a source electrode connected to the data line, and a drain electrode connected to a pixel electrode, and a semiconductor layer disposed between the gate wiring and the data wiring, wherein the semiconductor layer under the drain electrode is disposed within an area overlapping the gate electrode and the semiconductor layer under the source electrode extends outward to an area not overlapping the gate electrode. Advantageously, the present disclosure provides a TFT substrate for a display apparatus having a high aperture ratio and causing less afterimaging, and a manufacturing method of the same. | 08-04-2011 |
Seung Wook Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100118618 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH DATA BUS INVERSION FUNCTION - A semiconductor integrated circuit includes a data bus inversion (DBI) flag generating unit to generate DBI flag signals using a plurality of output data sets, a data inverting unit to invert the plurality of output data sets according to the DBI flag signals and transmit the plurality of output data sets through global transmission lines, and a plurality of data output units to output the plurality of output data sets, which are transmitted through the global transmission lines by pads. | 05-13-2010 |
Woon-Geun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110061101 | COMPUTER SYSTEM AND METHOD OF CONTROLLING THE SAME - A computer system including that restricts access of an unauthorized. The computer system preferably includes: a system unit; an identification information storage unit storing user identification information about a user of the computer system; a communication unit communicating with a service server storing user authentication information about the user of the computer system; and a controller receiving the user authentication information corresponding to the user identification information through the communication unit and controlling the system unit to perform a selective operation on the basis of the user authentication information. | 03-10-2011 |
Wooyoung Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20120135715 | DUAL SIM MOBILE TERMINAL AND OPERATING METHOD THEREOF - Disclosed herein is a dual SIM terminal and an operating method thereof for supporting dual standby and single talk using a single baseband. The dual SIM mobile terminal may include a controller which is a single chipset, a dual SIM, and two radio frequency (RF) units, thereby having an effect capable of providing a service at the same level as a dual SIM using two mobile terminals even with one mobile terminal. Furthermore, dual SIM switching is performed according to a state of the network, a pricing system, and a user's setting, thereby providing the user's desired service. | 05-31-2012 |
Woo Young Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090070711 | Scrolling method of mobile terminal - A mobile terminal having a touch screen or a touch pad is disclosed. In a user environment, when a displayed menu list is moved according to a flicking operation, a feedback indicating the reaching of the end (the last item) of the menu list is issued in a visible, audible or tactile manner to a user, thereby increasing the user convenience of menu searching and the durability of the mobile terminal. | 03-12-2009 |
| 20100004038 | SIDE SLIDING TYPE MOBILE TERMINAL - A mobile terminal comprises a body comprising a keypad and a slider slidingly coupled to the body. The slider is configured to slide transversely with respect to the body and may comprise a display unit to display image information. The mobile terminal may further comprise a processor coupled to the slider to detect when the slider is slid from a first position to a second position and when the slider is slid from a second position to a first position. The image information may be rotated 90 degrees from a transverse orientation to a longitudinal orientation when the processor detects that the slider has been slid from the first position to the second position. Conversely, the image information may be rotated 90 degrees from a longitudinal orientation to a transverse orientation when the processor detects that the slider has been slid from the second position to the first position. | 01-07-2010 |
| 20100120790 | DPP-IV INHIBITOR INCLUDING BETA-AMINO GROUP, PREPARATION METHOD THEREOF AND PHARMACEUTICAL COMPOSITION CONTAINING THE SAME FOR PREVENTING AND TREATING DIABETES OR OBESITY - The present invention provides a novel heterocyclic compound containing a beta-amino group, a method for preparing the same, and a pharmaceutical composition comprising the same heterocyclic compound or a pharmaceutically acceptable salt thereof as an active ingredient. The heterocyclic compound of the present invention exhibits excellent DPP-IV inhibitory activity and bioavailability and therefore can be useful for the prophylaxis or treatment of DPP-IV-related diseases such as diabetes or obesity. | 05-13-2010 |
| 20110201624 | Pharmaceutical Composition for Prevention and Treatment of Diabetes or Obesity Comprising a Compound that Inhibits Activity of Dipeptidyl Peptidase-IV, and other Antidiabetic or Antiobesity Agents as Active Ingredients - The present invention relates to a pharmaceutical composition for the prevention and treatment of diabetes or obesity comprising as active ingredients a compound which inhibits the activity of dipeptidyl peptidase-IV (DPP-IV), a pharmaceutically acceptable salt thereof, a hydrate thereof, or a solvate thereof, and one or more other antidiabetic or antiobesity agents. The pharmaceutical composition exhibits excellent glucose tolerance and may be useful in the prevention and treatment of diabetes, obesity, and the like by effectively inhibiting blood glucose levels and reducing fat mass. | 08-18-2011 |
| 20120016125 | METHOD FOR PREPARING DIPEPTIDYL PEPTIDASE-IV INHIBITOR AND INTERMEDIATE - The present invention relates to an improved method for preparing dipeptidyl peptidase-IV inhibitor and intermediate. The present invention is able to reduce preparation costs by using low cost reagents on reaction and is able to be used in mass production by improving yield. | 01-19-2012 |
| 20120016126 | METHOD FOR MANUFACTURING DIPEPTIDYL PEPTIDASE-IV INHIBITOR AND INTERMEDIATE - The present invention relates to an improved method for manufacturing dipeptidyl peptidase-IV inhibitor and intermediate. The present invention allows reduction of production costs by reacting low cost reagents, improves yield and is adaptable for mass production. | 01-19-2012 |
Yeon Hwa Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090008559 | Apparatus for Analyzing Cells in Real-time - The present invention relates to an apparatus for analyzing cells in real-time which incorporates a wavelength-tunable light source/infrared ray (IR) sensor and can be used to observe and analyze the IR-related characteristics of adherent cells or non-adherent cells. The Apparatus for analyzing cells in real-time in accordance with the present invention can be used to quantify specific materials in a cell and measure the metabolism of a cell. In addition, the apparatus for analyzing cells in real-time in accordance with the present invention can be configured to have a visible light microscope coupled thereto, and in this configuration, it can be used to locate a cell of interest. | 01-08-2009 |
Yong-Jun Kwak, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090219883 | METHOD AND APPARATUS FOR TRANSMITTING SYNCHRONIZATION SIGNALS IN AN OFDM BASED CELLULAR COMMUNICATION SYSTEM - Disclosed is an apparatus and method for transmitting the synchronization signal in an Orthogonal Frequency Division Multiplexing (OFDM) based cellular system. The cell search process widely used in the OFDM based cellular system is divided into two steps for obtaining the frame timing synchronization and obtaining the cell-specific scrambling code. When designing the channel for obtaining the frame timing synchronization and the channel for obtaining the cell-specific scrambling code, different frequency reuse factors are applied to the synchronization channels of different steps according to the characteristics of each synchronization obtainment step in order to improve the performance of each step. | 09-03-2009 |