| Patent application number | Description | Published |
|---|
| 20090103388 | HISTOGRAM GENERATION WITH BANKS FOR IMPROVED MEMORY ACCESS PERFORMANCE - Dividing memory used for storing histogram data into multiple banks is disclosed to allow for phased RMW cycles. Although the same address lines are provided to each bank, address control logic ensures that each successive RMW cycle is handled by a different bank, so that another RMW cycle can be started in one bank while the previous RMW cycle is still being performed in another bank. By staggering or phasing the starts of the RMW cycles in a wraparound fashion, each histogram bin is spread out over multiple banks, but testing can proceed faster than if only a single bank was used. After the histogram data has been captured, the areas of memory in each bank associated with a particular bin can be added together to compute the total count for that bin. | 04-23-2009 |
| 20090106512 | HISTOGRAM GENERATION WITH MIXED BINNING MEMORY - Memory is divided up during the gathering of histogram data so that a portion of the memory is configured for storing the high counts expected at the minimum and maximum codes/addresses, and at least one other portion is configured for storing the lower counts expected at other codes/addresses. By configuring memory portions in this manner, memory can be more efficiently allocated. | 04-23-2009 |
| 20100229053 | METHOD AND APPARATUS FOR TIME VERNIER CALIBRATION - Disclosed is a method and apparatus for calibrating a time vernier with an input data signal, a reference signal and a third trigger signal, all of which have pre-defined related frequencies so as to allow for accurate determination of vernier delays and strobe placement in an ATE system. | 09-09-2010 |
| 20100278226 | TRANSMISSION CIRCUIT, DIFFERENTIAL SIGNAL TRANSMISSION CIRCUIT, AND TEST APPARATUS - Provided is a test apparatus, a differential signal transmission circuit, and a transmission circuit that transmits signals between an input terminal and an output terminal, comprising a first high frequency signal passing section that blocks a low frequency signal that has a frequency less than a predetermined reference frequency in a signal received from the input terminal, and transmits a high frequency signal that has a frequency greater than or equal to the predetermined reference frequency to the output terminal; an input-side low frequency signal passing section that passes the low frequency signal in the signal from the input terminal and attenuates the high frequency signal; an output-side low frequency signal passing section that transmits to the output terminal the low frequency signal passed by the input-side low frequency signal passing section and attenuates the high frequency signal from the first high frequency signal passing section; and a switching section that switches a connection between the input-side low frequency signal passing section and the output-side low frequency signal passing section. | 11-04-2010 |
