Patent application number | Description | Published |
20140079532 | HYDRAULIC MACHINE AND METHOD OF OPERATING SAME - In one embodiment, a hydraulic machine includes a runner including a plurality of blades arranged in a ring shape, a crown connected to the blades from an upper side and having a lower end surface at a position surrounded by the blades, and a band connected to the blades from a lower side, the runner being configured to convert energy of pressured water into rotational energy. The machine further includes a main shaft configured to transmit the rotational energy of the runner to a generator, and a draft pipe located downstream of the runner, and configured so that the water used to drive the runner flows into the draft pipe. The machine further includes a columnar member disposed on a rotation axis of the main shaft below the crown, and having a diameter smaller than a diameter of the lower end surface of the crown. | 03-20-2014 |
20140308119 | HYDRAULIC MACHINERY - A hydraulic machinery | 10-16-2014 |
20140322004 | AXIAL FLOW WATER TURBINE - An axial flow water turbine according to an embodiment includes a discharge ring and a runner vane. When seen in the runner meridional cross section, a straight line that passes a border between a cylindrical surface and a spherical surface of the discharge ring and that is perpendicular to a water turbine rotation axis is denoted as A. A crossing point between the straight line A and the water turbine rotation axis is denoted as B. A straight line inclined by an angle θ of 10 degrees or less is denoted as C. A cross point between the straight line C and the external peripheral end surface of the runner vane is denoted as D. In this case, the external peripheral end of the forward edge of the runner vane is located on the crossing point D. | 10-30-2014 |
Patent application number | Description | Published |
20100278760 | Cosmetics - The cosmetic of the present invention is a cosmetic that alleviates skin irritation by blending in polypropylene glycol, a specific polar oil, or polybutylene glycol, as well as an ultraviolet absorbent. The present invention also relates to an agent and a method for alleviating irritation by lipophilic drugs. Since the present invention alleviates skin irritation due to ultraviolet absorbents and lipophilic drugs in cosmetics, any amount of ultraviolet absorbents and lipophilic drugs can be blended in cosmetics, and therefore cosmetics that can fully manifest their effects can be provided. Also, it is possible to prepare a safe sunblock cosmetic with superior ultraviolet protection effects because the ultraviolet absorbent is not absorbed through skin. | 11-04-2010 |
20130004553 | O/W Emulsion Composition - An O/W emulsion composition which is excellent in UV protection ability, formulation stability, and feeling in use. The O/W emulsion composition includes the following components (a) and (b): (a) organic UV absorbers comprising the following components (a1), (a2), and (a3): (a1) octocrylene, (a2) ethylhexyl methoxycinnamate, (a3) 4-t-butyl-4′-methoxydibenzoylmethane; and (b) a polyoxyethylene/polyoxyalkylene alkyl ether block polymer represented by the following formula (1) or (2); —R | 01-03-2013 |
20130005835 | EMULSION COMPOSITION - A new emulsified cosmetic composition involving α-gel, and the viscosity of the emulsified composition does not decrease over time even when salts are not added. The composition contains (A)-(E) ingredients, where (A) ingredient is a higher aliphatic alcohol, (B) ingredient is an anionic surfactant, (C) ingredient is a cationic surfactant, (D) ingredient is water, (E) ingredient is an oil component. The blend ratio of (B) ingredient is 1-15 times of the blend ratio of (C) ingredient in terms of the mole ratio. | 01-03-2013 |
Patent application number | Description | Published |
20080265443 | Semiconductor device and method of manufacturing the same - A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a semiconductor substrate, and a portion of the laminated film is removed from the surface of the semiconductor substrate so that the semiconductor substrate is exposed at the portion, a mounting substrate on which the semiconductor element is mounted, and a resin layer which seals at least a surface side of the semiconductor element with resin. | 10-30-2008 |
20090096110 | METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE - A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate. | 04-16-2009 |
20100112755 | SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR CHIPS STACKED AND MOUNTED THEREON AND MANUFACTURING METHOD THEREOF - Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip. | 05-06-2010 |
20100311224 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - According to one embodiment, a manufacturing method of a semiconductor device includes forming a plurality of first trenches in a semiconductor substrate, forming an insulating member in the first trenches, removing a part of a portion of the insulating member, forming second trenches in the insulating member, and attaching a protection film. The semiconductor substrate has a first and a second main surface. The insulating member has an upper face located higher than the first main surface. The portion is located higher than the first main surface. | 12-09-2010 |
20110068480 | SEMICONDUCTOR DEVICE AND ADHESIVE SHEET - The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent. | 03-24-2011 |
20110163459 | METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE - A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate. | 07-07-2011 |
20120187542 | SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD AND MANUFACTURING APPARATUS OF THE SAME - According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: (a) forming cutting grooves in an element formation surface of a semiconductor wafer on which semiconductor elements are formed; (b) applying a protection tape on the element formation surface of the semiconductor wafer; (c) grinding a rear surface of the semiconductor wafer to thin the semiconductor wafer and to divide the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor elements are formed; (d) forming an adhesive layer on the rear surface of the semiconductor wafer; (e) separating and cutting the adhesive layer for each of the semiconductor chips; and (f) removing the protection tape. The (e) is performed by spraying a high-pressure air to the adhesive layer formed on the rear surface of the semiconductor wafer while melting or softening the adhesive layer by heating. | 07-26-2012 |
20120235282 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device manufacturing method is disclosed. The method comprises (a) forming cut grooves in a front surface of a semiconductor wafer on which semiconductor elements are formed to partition the front surface into a plurality of regions, (b) disposing partly a resin in the cut grooves, (c) adhering a protection tape on the front surface of the semiconductor wafer, (d) thinning the semiconductor wafer by grinding a rear surface of the semiconductor wafer to reach the cut grooves, (e) forming an adhesive agent layer on the rear surface of the semiconductor wafer, and (f) dividing the semiconductor wafer into a plurality of semiconductor chips by cutting the adhesive agent layer together with the disposed resin along the cut grooves. | 09-20-2012 |
Patent application number | Description | Published |
20110069533 | RESISTANCE CHANGE MEMORY AND CONTROL METHOD THEREOF - According to one embodiment, a resistance change memory includes a memory cell array in which a plurality of blocks are provided, resistance change storage elements which are provided in blocks and which store data in accordance with a change in resistance state, first and second wirings in the blocks, each of the first and second wirings being connected to each of resistance change storage elements, and a control circuit which controls the state of a selected block targeted for operation and the state of unselected blocks except the selected block among the blocks. The control circuit respectively applies first and second unselect potentials to the first and second wirings in at least one of the unselected blocks during a period in which the selected block is in operation. | 03-24-2011 |
20110141794 | SEMICONDUCTOR MEMORY DEVICE AND INSPECTING METHOD OF THE SAME - According to one embodiment, a semiconductor memory device includes a memory cell array includes memory cells, lines provided to correspond to the memory cells, a first decoder configured to select a first line as an inspection target from the lines, a second decoder configured to select a second line for generating a reference voltage from the lines, a driver configured to charge the first and second lines, a discharging circuit configured to simultaneously discharge the first and second lines, and a sense amplifier configured to compare a voltage of the first line with a voltage of the second line to detect a defect of the first line while the first line is discharged. | 06-16-2011 |