| Patent application number | Description | Published |
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| 20100028985 | Reaction Vessel, Reaction Vessel Processing Apparatus and Diagnostic Apparatus - A reaction vessel suitable for automating of various measurements is provided. In a preferred embodiment, on the same side of plate-like substrate ( | 02-04-2010 |
| 20100139507 | Reaction Field Independent Jig and Reaction Chip Processing Apparatus Using the Jig - The invention provides, with a simple technique, a jig for reliably stemming one or a plurality of flow paths and/or a portion of reaction fields continuously provided in a reaction chip, and for making the flow paths and/or reaction fields independent, and a reaction ship processing apparatus. | 06-10-2010 |
| 20120018280 | TRANSFERRED OBJECT ROTATING DEVICE - A transferred object rotating device includes a mounting plate having an opening corresponding to a shape of a transferred object and being capable of moving from a mounting position to a rotating position, a boost unit capable of moving up to pass through the opening of the mounting plate in the rotating position, and a rotation plate capable of rotating about a power transmission shaft. The mounting plate moves to the rotating position after the transferred object is mounted on the mounting plate to close the opening. The transferred object is lifted by upward movement of the boost unit. The transferred object rotates while being sandwiched between the boost unit and the rotation plate. The transferred object mounted on the mounting plate in the mounting position can be transferred to the rotating position by the mounting plate, and rotate in the rotating position. | 01-26-2012 |
| 20120019831 | OPTICAL MEASUREMENT APPARATUS - An optical measurement apparatus using an optical fiber to measure the characteristic of an object to be measured arranged along the circumference of a circle includes a first pulley, a second pulley which is turnable on its own axis at a second angular velocity while revolving about the first pulley at a first angular velocity, and the optical fiber which is held by the second pulley and projects detection light on the object to be measured and receives reflected light from the object to be measured. The first angular velocity and the second angular velocity are the same in magnitude and opposite in the direction. Occurrence of a twist in the optical fiber is suppressed, and therefore, the optical measurement apparatus is capable of measuring the characteristics of the object to be measured with high accuracy. | 01-26-2012 |
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| 20080304342 | SEMICONDUCTOR MEMORY DEVICE WITH REDUNDANCY CIRUIT - A semiconductor device has a memory cell, decoders, a redundancy circuit and a mode setting circuit. The memory cell array has word lines including a redundant word line, bit lines and memory cells. A row decoder selects the word lines in response to a row address. Further, the row address decoder selects the redundant word line when a replacement signal is received. A column decoder selects the bit lines in response to a column address. A row address redundancy circuit stores a redundant row address. The row address redundancy circuit provides the replacement signal when the redundant row address corresponds to the received address. The mode setting circuit receives a mode signal having a normal mode and a test mode. The mode setting circuit outputs the replacement signal to the row decoder when the mode signal is in the normal mode, and prohibits an output of the replacement signal. | 12-11-2008 |
| 20090016127 | DUTY DETECTION CIRCUIT, DLL CIRCUIT USING THE SAME, SEMICONDUCTOR MEMORY CIRCUIT, AND DATA PROCESSING SYSTEM - A duty detection circuit includes discharge transistors, charge transistors, detection lines, and a comparator circuit that detects a potential difference of these detection lines, and also includes a gate circuit that controls the discharge transistors and the charge transistors in response to the internal clock signal of an even cycle. As a result, the detection lines are charged and discharged in response to the internal clock signal of the even cycle. Consequently, the duty detection circuit can be applied to a multi-phase DLL circuit, and a potential difference appearing in the detection line can be sufficiently secured. | 01-15-2009 |
| 20090039930 | DLL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE USING THE SAME, AND DATA PROCESSING SYSTEM - A DLL circuit includes a delay line (CDL) ( | 02-12-2009 |
| 20090289679 | Duty correction circuit - A duty correction circuit is formed using at least one delay circuit, which is constituted of a first inverter including three transistors of different conduction types and a second inverter including three other transistors of different conduction types and which delays and adjusts an input clock signal at the leading-edge/trailing-edge timing so as to convert it into an output clock signal based on a first or second bias voltage produced by a bias circuit detecting the duty ratio of the output clock signal. The duty correction circuit decreases the high-level period of the output clock signal having a high duty ratio based on the first bias voltage. Alternatively, the duty correction circuit increases the high-level period of the output clock signal having a low duty ratio based on the second bias voltage. | 11-26-2009 |
| 20100165769 | SEMICONDUCTOR MEMORY DEVICE HAVING AUTO-PRECHARGE FUNCTION - To provide a semiconductor memory device including: a first clock generation circuit and a second clock generation circuit that generate a first internal clock and a second internal clock, respectively; a latency counter that counts latency synchronously with the first internal clock; and a recovery counter that counts a write recovery period synchronously with the second internal clock. The second clock generation circuit activates the second internal clock when auto-precharge is designated, and deactivates the second internal clock when the auto-precharge is not designated. With this configuration, the recovery counter does not perform any counting operation when an auto-precharge function is not operated, and thus unnecessary power consumption can be prevented. | 07-01-2010 |
| 20110050304 | SEMICONDUCTOR APPARATUS - In a semiconductor device, there are provided first to third pairs of nMOS transistors between a GND and two sense nodes and first to third pairs of pMOS transistors between the two sense nodes and the power supply. A first internal clock signal and its inverted signal are supplied to gates of the first pair of nMOS transistors and the second pair of nMOS transistors, respectively. Complementary external clock signals are supplied to the gates of the third pairs of nMOS transistors and the third pairs of pMOS transistors. An inverted version of a second internal clock signal and the second internal clock signal are supplied to gates of the first and second pairs of pMOS transistors. The two sense nodes are connected to inputs of a differential amplifier. The output of the differential amplifier is latched by a latch circuit. Also provided an equalizing circuit precharging/equalizing the two sense nodes (FIG. | 03-03-2011 |
| 20110298290 | SEMICONDUCTOR DEVICE - In one embodiment, to maintain the operation stability of a semiconductor device even when an external voltage changes. An input signal discrimination unit operates with a power supply potential supplied from a first power supply line VDDI. The input signal discrimination unit compares an input signal VIN with a reference potential Vref. The comparison result is inverted into a signal V | 12-08-2011 |
| 20110303988 | Semiconductor device and level shift circuit using the same - A level shift circuit includes: a pair of first and second P-channel transistors which are connected in a flip-flop manner and whose sources connected to a first power supply line; a pair of first and second N-channel transistors with the first N-channel transistor provided between the first P-channel transistor and a second power supply line and the second N-channel transistor provided between the second P-channel transistor and the second power supply line, in which input signals complementary to each other are inputted to their gates; and a current supply circuit provided between the first power supply line and a drain of the first N-channel transistor and between the first power supply line and a drain of the second N-channel transistor, respectively. The current supply circuit includes third and fourth N-channel transistors with their sources connected to drains of the first and second N-channel transistors and third and fourth P-channel transistors serving as current limiting elements with their one ends connected to the first power supply line and the other ends connected to drains of the third and fourth P-channel transistors. | 12-15-2011 |
| 20120043642 | Semiconductor device - A semiconductor device includes a first signal wiring, a first dummy wiring, and a second dummy wiring. The first signal wiring is configured to be supplied with a first signal potential. The first dummy wiring is insulated from the first wiring. The first dummy wiring is configured to be supplied with a fixed potential. The second dummy wiring is disposed between the first signal wiring and the first dummy wiring. The second dummy wiring is insulated from the first dummy wiring. The second dummy wiring is configured to be supplied with substantially the same potential as the first signal potential. | 02-23-2012 |
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| 20110003483 | GLASS PLATE FOR DISPLAY PANELS, PROCESS FOR PRODUCING IT, AND PROCESS FOR PRODUCING TFT PANEL - To provide a glass plate for display panels which has a low 8 | 01-06-2011 |
| 20110203645 | SOLAR CELL - The present invention relates to a solar cell comprising a double tube composed of two glass tubes differing in the diameter and a photovoltaic conversion layer formed between the two glass tubes, the double tube being sealed at both ends of a part in which the photovoltaic conversion layer is formed, wherein at least one of the two glass tubes is composed of a glass comprising, in mass % based on the oxides, from 60 to 70% of SiO | 08-25-2011 |
| 20110251044 | GLASS SUBSTRATE AND ITS PRODUCTION PROCESS - To provide a glass substrate which has a high glass transition temperature, which has a thermal expansion coefficient close to that of soda lime glass, which has a low specific gravity, which will hardly undergo yellowing, and which further has good melting characters and is thereby produced with high productivity. | 10-13-2011 |
| 20110265863 | SOLAR CELL - The present invention provides a solar cell having high photovoltaical conversion efficiency and being excellent in the light transmissivity and weather resistance such as solarization resistance. The present invention relates to a solar cell comprising a double tube composed of two glass tubes differing in the diameter and a photovoltaic conversion layer formed between the two glass tubes, the double tube being sealed at both ends of a part in which the photovoltaic conversion layer is formed, wherein at least one of the two glass tubes is composed of a glass comprising, in mass % based on the oxides, from 60 to 75% of SiO | 11-03-2011 |
