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Kuo, Hsinchu City

Bing-Chen Kuo, Hsinchu City TW

Patent application number	Description	Published
20090218398	RFID ACCES APPARATUS AND TRANSACTION METHOD USING THE SAME - The present invention discloses a RFID access apparatus and a transaction method using the same. The RFID access apparatus, coupled to a SD card socket disposed in an electrical terminal device including a controller unit coupled to said SD card socket and a radio frequency transceiver coupled to the controller unit, and being capable of accessing data recorded in a RFID tag through operating the electrical terminal device.	09-03-2009

Bing-Jye Kuo, Hsinchu City TW

Patent application number	Description	Published
20080252506	POWER-TO-DIGITAL CONVERTER - A power-to-digital converter (PDC) converting a signal power to digital code. The PDC comprises a power detector, an analog-to-digital converter (ADC), and a timing and logic control circuit. The power detector receives the signal power and generates a DC output and a first determined number of bits. The ADC is coupled to the power detector and receives and converts the DC output to a second determined number of bits. The timing control logic circuit is coupled to the power detector and the ADC and sequentially enables the power detector and the ADC. The first and second predetermined numbers of bits are respectively most significant bits (MSBs) and least significant bits (LSBs) of the digital code. The bit resolution of the digital code is the sum of the first and second numbers.	10-16-2008

Chao-Hsien Kuo, Hsinchu City TW

Patent application number	Description	Published
20090165849	TRANSPARENT SOLAR CELL MODULE - A transparent solar cell module including a transparent solar cell and an optical filter is provided. The transparent solar cell includes a transparent substrate and a transparent solar cell part located on a first surface of the transparen substrate. The optical filter is located on the transparent solar cell.	07-02-2009
20090277500	TRANSPARENT SOLAR CELL MODULE - A transparent solar cell module including a transparent solar cell and an optical transparent substrate is provided. The optical transparent substrate includes an optical filter and a first transparent substrate. The transparent solar cell includes a first electrode, a photoelectric conversion layer, a second electrode, and a second transparent substrate in sequence.	11-12-2009
20100126579	SOLAR CELL HAVING REFLECTIVE STRUCTURE - A solar cell having a reflective structure is provided, which includes a front contact, a P layer, an I layer, an N layer, and a back contact that are stacked together. The solar cell having the reflective structure is characterized in that the N layer is a layer of low refraction index, and a refraction index of the layer of low refraction index is lower than that of the I layer. Furthermore, the N layer may be a multi-layer structure consisting of several films in which films with low refraction indexes and films with high refraction indexes are stacked alternately. The film in contact with the I layer in the multi-layer structure is a film of low refraction index. A refraction index of the film of low refraction index is lower than that of the I layer.	05-27-2010
20100154881	TRANSPARENT SOLAR CELL MODULE AND METHOD OF FABRICATING THE SAME - A transparent solar cell module is provided. The transparent solar cell module includes a transparent substrate, a first transparent electrode on the transparent substrate, a p-type layer on the first transparent electrode, an intrinsic layer on the p-type layer, an n-type stacked layer on the intrinsic layer, and a second transparent electrode on the n-type stacked layer. The n-type stacked layer includes at least two n-type material layers with different refractive indexes.	06-24-2010

Cheng-Ta Kuo, Hsinchu City TW

Patent application number	Description	Published
20100237367	LIGHT EMITTING DIODE PACKAGE - A light emitting diode (LED) package includes a carrier, an LED chip, an encapsulant, a plurality of phosphor particles, and a plurality of anti-humidity particles. The LED chip is disposed on and electrically connected to the carrier. The encapsulant encapsulates the LED chip. The phosphor particles and the anti-humidity particles are distributed within the encapsulant. A first light emitted from the LED chip excites the phosphor particles to emit a second light. Some of the anti-humidity particles are adhered onto a surface of the phosphor particles, while the other anti-humidity particles are not adhered onto the surface of the phosphor particles. The anti-humidity particles absorb H	09-23-2010
20100258818	LIGHT EMITTING DIODE CHIP AND MANUFACTURING METHOD THEREOF - The present invention provides a manufacturing method of an LED chip. First, a device layer is formed on a growth substrate, wherein the device layer has a first surface connected to the growth substrate and a second surface. Next, a plurality of first trenches are formed on the second surface of the device layer. Then, a protection layer is formed on the side walls of the first trenches. After that, the second surface is bonded with a supporting substrate and the device layer is then separated from the growth substrate. Further, a plurality of second trenches corresponding to the first trenches are formed in the device layer to form a plurality of LEDs, wherein the second trenches extend from the first surface to the bottom portions of the first trenches. Furthermore, a plurality of electrodes are formed on the first surface of the device layer.	10-14-2010
20100258827	LIGHT-EMITTING DIODE PACKAGE AND WAFER-LEVEL PACKAGING PROCESS OF LIGHT-EMITTING DIODE - A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.	10-14-2010
20100261299	PACKAGING PROCESS OF LIGHT EMITTING DIODE - A packaging process of a light emitting diode (LED) is provided. First, an LED chip is bonded with a carrier to electrically connect to each other. After that, the carrier is heated to raise the temperature thereof. Next, an encapsulant is formed on the heated carrier by a dispensing process to encapsulate the LED chip, wherein the viscosity of the encapsulant before contacting the carrier is lower than that of the encapsulant after contacting the carrier. Thereafter, the encapsulant is cured.	10-14-2010
20110057207	WHITE-LIGHT EMITTING DEVICE - An white-light emitting device including a carrier, light emitting diode (LED) chips, and a wavelength converting material is provided. The LED chips are disposed on and electrically connected to the carrier. An equivalent wavelength of the first light emitted from the LED chips and divided into groups is λ. A variation of peak wavelengths of the LED chips in one group is smaller than 5 nm. λ meets an equation:	03-10-2011
20110312113	LIGHT-EMITTING DIODE STRUCTURE WITH ELECTRODE PADS OF SIMILAR SURFACE ROUGHNESS AND METHOD FOR MANUFACTURING THE SAME - A light-emitting diode (LED) structure and a method for manufacturing the LED structure are disclosed for promoting the recognition rate of LED chips, wherein a roughness degree of the surface under a first electrode pad of a first conductivity type is made similar to that of the surface under a second electrode pad of a second conductivity type, so that the luster shown from the first electrode pad can be similar to that from the second electrode pad, thus resolving the poor recognition problem of wire-bonding machines caused by different lusters from the first and second electrode pads.	12-22-2011
20120164768	Light-Emitting Diode Package and Wafer-Level Packaging Process of Light-Emitting Diode - A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.	06-28-2012
20120168768	SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME - A semiconductor structure is provided. The semiconductor structure includes: a substrate; one or more semiconductor device layers formed on the substrate; and one or more lattice breaking areas formed on the surface of the substrate between the semiconductor device layers. The invention also provides a method for fabricating a semiconductor structure.	07-05-2012

Chia-Hao Kuo, Hsinchu City TW

Patent application number	Description	Published
20110122086	TOUCH DISPLAY MODULE AND TOUCH DISPLAY APPARATUS COMPRISING THE SAME - A touch display apparatus comprising a controller and a touch display module, electrically connected to the controller, are provided. The touch display module comprises a display panel and a sensor assembly. The display panel includes a display surface and a connection surface opposite the display surface, and the sensor assembly is disposed on the connection surface and electrically connected to the controller. The sensor assembly comprises a first sensing layer and a second sensing layer, with a first sheet conducting layer and a second sheet conducting layer, respectively. When the display surface is touched, the first sheet conducting layer and the second sheet conducting layer are electrically connected to generate a touch signal. Thereby, the controller may detect a touch position according to the touch signal.	05-26-2011

Chia-Lin Kuo, Hsinchu City TW

Patent application number	Description	Published
20130015240	RFID-BASED BOOK RETURN APPARATUSAANM CHEN; Horng-JiAACI HsinchuAACO TWAAGP CHEN; Horng-Ji Hsinchu TWAANM CHENG; Yu-ChyangAACI Taipei CityAACO TWAAGP CHENG; Yu-Chyang Taipei City TWAANM KUO; Chia-LinAACI Hsinchu CityAACO TWAAGP KUO; Chia-Lin Hsinchu City TW - An RFID-based book return apparatus has dual touch screen and operation interface that conforms to a standard for barrier-free design. It has the following features: automatically detecting RFID tags attached on the identification cards of borrowers and attached to books to be returned, and enabling a panel covering a book-return gate to open; adopting a high-density optical sensor array to prevent the borrower's hand from being clamped accidentally by the cover panel of the book-return gate; enabling an access panel of the book return apparatus to open/close automatically according to the RFID tag detection book return apparatus, facilitating the maintenance and repair of the book return apparatus; preventing any components, papers and books in the book return apparatus from wet damage due to rainfall or moisture by installing a waterproof device on the RFID-based book return apparatus.	01-17-2013

Chien-Chih Kuo, Hsinchu City TW

Patent application number	Description	Published
20100094564	ANALYTICAL STRIP READING APPARATUS AND THE ANALYICAL STRIP USED THEREIN - The invention discloses an analytical strip reading apparatus and the analytical strip used therein. The analytical strip reading apparatus comprises a housing, a monitor, a delivering device, an optical reader, a reaction signal reader and a control module. The analytical strip comprises at least one optically readable pattern which comprises identification information of the analytical strip.	04-15-2010
20100140341	ANALYTICAL STRIP READING APPARATUS WITH A REMOVABLE FIRMWARE DEVICE - A detecting strip reader with a removable firmware device, comprising a detecting strip reader and a firmware device. The firmware device comprises a first electrical connecting end, a database module, and an operation module, the firmware device being removably electrically connected to a second electrical connecting end in the detecting strip reader via the first electrical connecting end, wherein the characteristic of detecting strip reader is in that: a plurality of light reaction equations of detecting strips are saved in the database module, and when the first electrical connecting end of the firmware device receives an input signal from the second connecting end, the operation module selects one specific light reaction equation from the plurality of light reaction equations saved in the database module and performs the operation of the specific light reaction equation.	06-10-2010

Chien-Fu Kuo, Hsinchu City TW

Patent application number	Description	Published
20090244071	Synthetic image automatic generation system and method thereof - Provided is a computer system and a computerized method to automatically generate the synthetic images that simulate the human activities in a particular environment. The program instructions are input in the form of the natural language. Particular columns are provided in the user interface to allow the user to select desired instruction elements from sets of limited candidates. The instruction elements form the program instructions. The system analyzes the program instructions to obtain the standard predetermined time evaluation codes of the instructions. Parameters not include in the input program instructions are generated automatically. Synthetic images are generated by using the input program instructions and the parameters obtained.	10-01-2009

Chien-I Kuo, Hsinchu City TW

Patent application number	Description	Published
20110089467	OHMIC CONTACT OF III-V SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - Heavily doped epitaxial SiGe material or epitaxial In	04-21-2011
20110156100	High Electron Mobility Transistor and Method for Fabricating the Same - A high electron mobility transistor includes a substrate, a buffer layer, a channel layer, a spacer layer, a schottky layer and a cap layer. The buffer layer is formed on the substrate. The channel layer is formed on the buffer layer, in which the channel layer comprises a superlattice structure formed with a plurality of indium gallium arsenide thin films alternately stacked with a plurality of indium arsenide thin films. The spacer layer is formed on the channel layer. The schottky layer is formed on the spacer layer. The cap layer is formed on the schottky layer.	06-30-2011

Chien-Nan Kuo, Hsinchu City TW

Patent application number	Description	Published
20110187420	FREQUENCY MULTIPLIER DEVICE AND METHOD THEREOF - The present invention provides a method for identifying a specific number of communicating points having relatively smallest accumulated path values from a plurality of transmitting points for a receiving point in a communication system. The method includes steps of: (a) defining a first coordination of each of the plurality of transmitting points and the receiving point on a complex plane; (b) transferring the first coordination of the receiving point to a second coordination thereof, in which the second coordination of the receiving point is near an origin of the complex plane; and (c) identifying the specific number of transmitting points having relatively smallest accumulated path values based on the second coordination of the receiving point.	08-04-2011

Chih-Cheng Kuo, Hsinchu City TW

Patent application number	Description	Published
20100002786	SIGNAL DETECTING METHOD AND RECEIVER USING THE SAME - A signal detecting method and a receiver using the same are provided. The method includes the following steps. A receiving signal vector y is received through a number of channels, wherein the receiving signal vector y corresponds to a transmitting signal vector x transmitted by at least one of the channels. A channel matrix H is determined, wherein the channel matrix H represents at least one of the channels. A factorization matrix D is chosen, wherein D is invertible to make the channel matrix H expressed as H={tilde over (H)}D, and {tilde over (H)} is a corresponding channel matrix. The factorization matrix D is determined to make an expected value of the signal estimate error become smaller. The receiving signal vector y is detected to estimate the transmitting signal vector x according to the corresponding channel matrix {tilde over (H)} and the factorization matrix D.	01-07-2010

Chih-Chung Kuo, Hsinchu City TW

Patent application number	Description	Published
20080319752	SPEECH SYNTHESIZER GENERATING SYSTEM AND METHOD THEREOF - A speech synthesizer generating system and a method thereof are provided. A speech synthesizer generator in the speech synthesizer generating system automatically generates a speech synthesizer conforming to a speech output specification input by a user. In addition, a recording script is automatically generated by a recording script generator in the speech synthesizer generating system according to the speech output specification, and a customized or expanded speech material is recorded according to the recording script. After the speech material is uploaded to the speech synthesizer generating system, the speech synthesizer generator automatically generates a speech synthesizer conforming to the speech output specification. The speech synthesizer then synthesizes and outputs a speech output at a user end.	12-25-2008
20130054134	TELEMATICS APPARATUS FOR DRIVING ASSISTANCE, SYSTEM OF THE SAME, AND METHOD OF THE SAME - A telematics apparatus for providing driving assistance, and a system and a method are provided. The telematics apparatus receives position information indicating a current position of the telematics apparatus. The telematics apparatus transmits a request signal to the server. According to the request signal, the server obtains the position information, time information indicating a current time of the telematics apparatus, and identification information identifying a user of the telematics apparatus. The telematics apparatus displays driving assistance information received from the server which generates the driving assistance information according to the identification information, the position information, and the time information by searching through a route usage history of a plurality of routes and referring to a plurality of reference values of the routes. The reference value of each route indicates the telematics apparatus user's familiarity with that route.	02-28-2013

Chin-Chen Kuo, Hsinchu City TW

Patent application number	Description	Published
20090078855	Imaging sensor having microlenses of different radii of curvature - The present invention provides an image sensor which comprises improved microlenses to cope with different optical requirements for oblique incident light or different components of light. In one embodiment, the image sensor comprises at least two microlenses having different radii of curvature. In another embodiment, the image sensor comprises at least one asymmetrical microlens.	03-26-2009

Chin-Wei Kuo, Hsinchu City TW

Patent application number	Description	Published
20130099352	STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING - The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having an integrated circuit (IC) device; an interconnect structure disposed on the semiconductor substrate and coupled with the IC device; and a transformer disposed on the semiconductor substrate and integrated in the interconnect structure. The transformer includes a first conductive feature; a second conductive feature inductively coupled with the first conductive feature; a third conductive feature electrically connected to the first conductive feature; and a fourth conductive feature electrically connected to the second conductive feature. The third and fourth conductive features are designed and configured to be capacitively coupled to increase a coupling coefficient of the transformer.	04-25-2013

Chun-Chieh Kuo, Hsinchu City TW

Patent application number	Description	Published
20120081008	CONTROL CIRCUIT MODULE OF LIGHT-EMITTING DIODE LAMP - The present invention relates to a control circuit module of light-emitting diode (LED) lamp, which comprises: a AC to DC element, for transferring mains AC power to DC power; a plurality of groups of LED; a plurality of switches, corresponding to the number of the groups of LED, for controlling to turn on/off the each group; a linear voltage regulator, for cutting the DC power from the AC to DC element to a plurality of voltage sections; a switch selector, for selecting to open/close the switches according to the voltage sections from the linear voltage regulator; a current selector, for capturing available current sections from the voltage sections of the linear voltage regulator; and a LED current setup device, for controlling the current sections to open/close the plurality of switches by a user according to the LED current setup device and the current selector.	04-05-2012

Chun-Chien Kuo, Hsinchu City TW

Patent application number	Description	Published
20120212147	Flyback Energy Converter - The present invention is to provide a flyback energy converter comprising a transformer having a primary winding, a secondary winding and an auxiliary winding, a load electrically connected with the secondary winding, a switch serially connected with the primary winding and a primary controlling circuit. The primary controlling circuit comprises a voltage measurement terminal and a switch controlling terminal. The voltage measurement terminal measures an output voltage wave provided from the auxiliary winding to get a part of times in the part of the output voltage wave, so as to enlarge the part of times to a total time. According to a predetermined timing transferred from the total time, the switch controlling terminal controls the switch.	08-23-2012

Chung Shan Kuo, Hsinchu City TW

Patent application number	Description	Published
20120287717	FLASH MEMORY DEVICE AND ASSOCIATED CHARGE PUMP CIRCUIT - A charge pump circuit comprises a first booster set, a second booster group, and a detecting circuit. The first booster set receives a supply voltage and generates a first output voltage. The detecting circuit generates a detecting signal depending on the voltage level of the first output voltage. The second booster group receives the supply voltage and generates the first output voltage or a second output voltage according to the detecting signal. The second booster group is composed of a plurality of booster sets connected in parallel, wherein each booster set comprises a plurality of charge pump stages and a plurality of switch units. The number of serially-connected charge pump stages of each booster set in the second booster group is controlled by the plurality of switch units according to the stable voltage levels of the first and second output voltages.	11-15-2012

Chun-Hung Kuo, Hsinchu City TW

Patent application number	Description	Published
20100268800	METHOD AND APPARATUS FOR CONFIGURING NETWORK-ATTACHED STORAGE - A method for configuring a network-attached storage (NAS) includes: coupling the network-attached storage to a user-end personal computer (PC) via an external bus which supports a plug & play function; and utilizing the user-end PC to configure a network interface of the NAS via the external bus. A network-attached storage (NAS) includes a network interface, a bus interface, and processor. The network interface is for connecting with a network. The bus interface is for connecting with an external bus which supports a plug & play function and for receiving network interface setting parameters outputted by a user-end PC via the external bus. The processor is coupled between the network interface and the bus interface, and implemented for configuring the network interface according to the network interface setting parameters received by the bus interface.	10-21-2010
20100332777	DATA BACKUP APPARATUS AND DATA BACKUP METHOD - A data backup apparatus includes a host interface, a first storage medium interface, a second storage medium interface and a controller. The host interface is utilized to be electrically connected with a host, the first storage medium interface is utilized to be electrically connected with a first storage medium, and the second storage medium interface is utilized to be electrically connected with a second storage medium. The controller is coupled to the host interface, the first storage medium interface and the second storage medium interface, and is utilized for copying data from the first storage medium to the second storage medium without passing through the host interface.	12-30-2010
20110264885	CONTROLLING CIRCUIT APPLICABLE IN PHYSICAL STORAGE DEVICE AND RELATED METHOD - A controlling circuit applicable in a physical storage device includes: a dividing circuit coupled to the physical storage device for dividing a storage capacity of the physical storage device into a plurality of divided storage areas, wherein a divided storage capacity of each divided storage area is not larger than the capacity corresponding to the largest address generated by an operating system; and a feedback circuit coupled to the dividing circuit for feeding back the plurality of divided storage areas to the operating system such that the operating system regards the plurality of divided storage areas as a plurality of independent physical storage devices.	10-27-2011
20110283079	DATA PROCESSING DEVICE APPLYING FOR STORAGE DEVICE, DATA ACCESSING SYSTEM AND RELATED METHOD - A data processing device applying for a storage device includes: a first interface circuit coupled to the storage device; a processing circuit coupled to the first interface circuit for reading a control code from a divided storage area in the storage device, and executing the control code to generate a storage capacity of the storage device; and a second interface circuit coupled to the processing circuit for feeding the storage capacity back to an operating system such that the operating system regards the storage capacity as a usable capacity of the storage device.	11-17-2011

Darryl Kuo, Hsinchu City TW

Patent application number	Description	Published
20120261827	THROUGH-SILICON VIAS FOR SEMICONDCUTOR SUBSTRATE AND METHOD OF MANUFACTURE - A semiconductor component includes a semiconductor substrate having a top surface. An opening extends from the top surface into the semiconductor substrate. The opening includes an interior surface. A first dielectric liner having a first compressive stress is disposed on the interior surface of the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. A metal barrier layer is disposed on the third dielectric liner. A conductive material is disposed on the metal barrier layer and fills the opening.	10-18-2012

De-Shan Kuo, Hsinchu City TW

Patent application number	Description	Published
20120267656	LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - A method of fabricating a light emitting device comprising: providing a substrate; forming an epitaxial stack on the substrate wherein the epitaxial stack comprising a first conductivity semiconductor layer, an active layer and a second conductivity semiconductor layer; forming a mesa on the epitaxial stack to expose partial of the first conductivity semiconductor layer; layer and etching the surface of the first conductivity semiconductor layer and forming a least one rough structure on the surface of the first conductivity semiconductor layer wherein the first conductivity semiconductor layer is sandwiched by the substrate and the active layer.	10-25-2012

Fred Kuo, Hsinchu City TW

Patent application number	Description	Published
20110108950	VERTICAL METAL INSULATOR METAL CAPACITOR - A capacitor includes a first electrode. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures. The bottom conductive plane is disposed over a substrate. The capacitor includes a second electrode. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures. The capacitor includes an insulating structure between the first electrode and the second electrode. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other thereby providing higher capacitance density.	05-12-2011

Han-Ping Kuo, Hsinchu City TW

Patent application number	Description	Published
20130044413	PORTABLE ELECTRONIC DEVICE - A portable electronic device includes a first body, a second body and a linkage. The first body has a first upper surface, and the second body has a second upper surface. An end of the linkage is coupled to the first body through a first pivot shaft and another end of the linkage is coupled to the second body through a second pivot shaft, in which the second body is suitable to be stacked on the first upper surface of the first body to make the portable electronic device in a retracted state. The linkage is suitable to rotate relatively to the first body so that the first body and the second body of the portable electronic device are side by side in an expanded state.	02-21-2013

Hsi-Lin Kuo, Hsinchu City TW

Patent application number	Description	Published
20110302317	MULTIMEDIA SYSTEM, MEDIA PLAYER AND METHOD FOR GENERATING PERSONALIZED STREAMING CONTENT - A multimedia system, a media player, and a method for generating a personalized streaming content are provided. The method includes following steps. A play habit of a user operation is recorded into a feature log in the media player. A download request is issued to at least one server through the Internet according to the feature log and a server list. A personalized streaming content corresponding to the play habit is downloaded from the server.	12-08-2011

Hsi-Yu Kuo, Hsinchu City TW

Patent application number	Description	Published
20130082353	TUNABLE ESD PROTECTION DEVICE - The present disclosure provides an ESD protection device. The device contains a bipolar junction transistor device that includes a collector, a base, and an emitter. The collector includes a first doped element and a more heavily doped second doped element disposed over the first doped element. The first and second doped elements each have a first doping polarity. The base is located adjacent to the collector and includes a third doped element having a second doping polarity different from the first doping polarity. A p-n junction is formed between the third doped element and one of the first and second doped elements. The emitter is formed over the base. The emitter includes a fourth doped element having the first doping polarity and forming a p-n junction with the third doped element. The fourth doped element is more heavily doped than the third doped element.	04-04-2013

Hung-Jui Kuo, Hsinchu City TW

Patent application number	Description	Published
20110198747	CONDUCTIVE PILLAR STRUCTURE FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE - A semiconductor component formed on a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface. The semiconductor substrate includes a plurality of devices on the first surface. A plurality of through silicon vias (TSVs) in the semiconductor substrate extends from the first surface to the second surface. A protection layer overlies the devices on the first surface of the semiconductor substrate. A plurality of active conductive pillars on the protection layer have a first height. Each of the active conductive pillars is electrically connected to at least one of the plurality of devices. A plurality of dummy conductive pillars on the protection layer have a second height. Each of the dummy conductive pillars is electrically isolated from the plurality of devices. The first height and the second height are substantially equal.	08-18-2011
20120091574	CONDUCTIVE PILLAR STRUCTURE - The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.	04-19-2012
20120098124	SEMICONDUCTOR DEVICE HAVING UNDER-BUMP METALLIZATION (UBM) STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor device has a UBM (under-bump metallization) structure underlying and electrically connected to a solder bump. The UBM structure has a first metallization layer with a first cross-sectional dimension d	04-26-2012
20130034956	CLEANING RESIDUAL MOLDING COMPOUND ON SOLDER BUMPS - A method of forming wafer-level chip scale packaging solder bumps on a wafer substrate involves cleaning the surface of the solder bumps using a laser to remove any residual molding compound from the surface of the solder bumps after the solder bumps are reflowed and a liquid molding compound is applied and cured.	02-07-2013

Ing-Shry Kuo, Hsinchu City TW

Patent application number	Description	Published
20090245520	DIGITAL CONTENT PROTECTION METHODS - An digital content protection method and device are disclosed. In the method, digital content to be delivered from a content provider to a consumer terminal is retrieved. The digital content is encoded to prevent unauthorized playback. The encoded digital content and a key for decoding the content are separately transmitted from the content provider to the consumer terminal, playback of the encoded digital content requires decoding with the key.	10-01-2009
20090254717	STORAGE SYSTEM AND METHOD THEREOF - A storage system and a method thereof. The storage system comprises first and second storage devices, first and second analog front ends, and a controller. The first and second analog front ends, coupled to the first and second storage devices, receive first and second analog data from the first and second drive devices for conversion to first and second digital data. The controller, coupled to the first and second analog front ends, comprises a signal processor and a common memory. The signal processor receives the first and second digital data to perform first and second digital signal processing and access the common memory. The common memory is coupled to the signal processor to be accessed thereby.	10-08-2009

Jen-Tsai Kuo, Hsinchu City TW

Patent application number	Description	Published
20100317313	DUAL-BAND COUPLER UNIT AND DUAL-BAND COUPLER THEREOF AND RECEIVER THEREOF - A dual-band coupler unit is provided. The dual-band coupler unit includes a first coupled line, a second coupled line, a short transmission line, a first transmission line, and a second transmission line. The first coupled line and the second coupled line are substantially in parallel with each other, and are substantially of the same length. One end of the short transmission line is connected to one end of the first coupled line, and the other end of the short transmission line is connected to one end of the second coupled line. One end of the first transmission line is connected to the other end of the first coupled line, and one end of the second transmission line is connected to the other end of the second coupled line.	12-16-2010
20110309894	PLANAR ASYMMETRIC CROSSOVER COUPLER - A planar asymmetric crossover coupler has a first branch to a seventh branch. The first branch to the fourth branch form a first region having a first port and a fourth port. The fourth branch to the seventh branch form a second region having a second port and a third port. The characteristic impedance of each branch is determined according to the load impedance and power distribution ratio of each port.	12-22-2011

Jen-Yau Kuo, Hsinchu City TW

Patent application number	Description	Published
20090256682	PRODUCT MANAGING SYSTEM AND METHOD USING RFID TECHNOLOGY - A product managing system and method using RFID technology is provided. The product managing system includes an RFID tag, an RFID reader, and a server. The RFID tag is set on a product for providing a tag ID, an object type and attribute, and an event content. The RFID reader reads the RFID tag. The server obtains various information provided by the RFID tag set on the product from the RFID reader, determines the product ID according to the tag ID, determines a class of the product and whether the product is correctly combined with another product according to the object type and attribute, and determines whether a processing procedure of the product is correctly conducted according to the event content. The server finally determines whether the product is normal according to the aforementioned determinations.	10-15-2009
20100157064	OBJECT TRACKING SYSTEM, METHOD AND SMART NODE USING ACTIVE CAMERA HANDOFF - If an active smart node detects that an object leaves a center region of a FOV for a boundary region, the active smart node predicts a possible path of the object. When the object gets out of the FOV, the active smart node predicts the object appears in a FOV of another smart node according to the possible path and a spatial relation between cameras. The active smart node notifies another smart node to become a semi-active smart node which determines an image characteristic similarity between the object and a new object and returns to the active smart node if a condition is satisfied. The active smart node compares the returned characteristic similarity, an object discovery time at the semi-active smart node, and a distance between the active smart node and the semi-active smart node to calculate possibility.	06-24-2010
20100167703	UBIQUITOUS PROXY MOBILE SERVICE METHOD AND SYSTEM AND COMPUTER RECORDABLE STORAGE MEDIUM FOR THE METHOD - A ubiquitous proxy mobile service method and system is disclosed. When a mobile device is near a dissemination medium, group data and individual data transmitted by at least one ubiquitous proxy transmission interface of the dissemination medium are read by a ubiquitous proxy receiving interface of the mobile device. A screen of the mobile device displays an interaction icon corresponding to the ubiquitous proxy according to the group data and the individual data. Uniform resource locator data in the individual data of the ubiquitous proxy corresponding to the interaction icon is read when the interaction icon is activated. A redirect operation is performed according to the uniform resource locator data to obtain a corresponding network service.	07-01-2010
20100303056	PROBABILITY TIME DIVISION MULTIPLEXING POLLING METHOD AND WIRELESS IDENTIFIER READER CONTROLLER THEREOF - Exemplary embodiments of the present invention illustrate a probability time division multiplexing polling method and a wireless identifier reader controller thereof. The probability time division multiplexing polling method is used to control a plurality of wireless identifier readers to be turned on or off. First, one of the wireless identifier readers is randomly selected according to a probability model, wherein the probability model presents the probabilities for detecting an identifier tag of the wireless identifier readers. Then, the selected wireless identifier reader is turned on for a predetermined time period.	12-02-2010

Kao-Yueh Kuo, Hsinchu City TW

Patent application number	Description	Published
20080212603	Method for Path Selection and Signal Processing in Wireless Communications System - A method of path selection in a multi-path channel communications system that includes providing path information including at least path parameters and path statuses, setting a plurality of thresholds for the path parameters, comparing the path parameters to the thresholds corresponding to the path parameters, assigning a weighting to the path parameters depending upon comparison with the thresholds, updating the path statuses according to the assigned weighting to the parameters and selecting at least one candidate path according to the updated path statuses.	09-04-2008

Li-Wen Kuo, Hsinchu City TW

Patent application number	Description	Published
20110194848	Focus Method and Photographic Device Using the Method - A focus method and a photographic device using the method are disclosed. The photographic device comprises a zoom lens, an image analyzing module, a focus distance providing module and a processing module. The zoom lens is used for capturing image information of a plurality of positions; the image analyzing module is used for analyzing contrast values of the image information of the plurality of positions; the focus distance providing module is used for providing a non-equivalent and a constant focus distance interval for capturing the image information of the plurality of positions; and the processing module is electrically connected with the zoom lens, the image analyzing module, and the focus distance providing module. Whereby, the photographic device acquires the image information of the plurality of positions by the non-equivalent focus distance interval and acquires a coarse focus position, and acquires an accurate focus position by the constant focus distance according to the coarse focus position.	08-11-2011

Ming-Chao Kuo, Hsinchu City TW

Patent application number	Description	Published
20100216207	Apparatus and method for growing algae by ionizing radiation - An apparatus is disclosed for growing algae by ionizing radiation. The apparatus includes a container for containing medium for the growth of algae, a filter disposed in the container, a 3-dimensional rack disposed in the container, an adherent element wound on the 3-dimension rack so that spores of the algae can be planted in the adherent element, a radiation element disposed in the container for irradiating the spores and a timepiece connected to the radiation element.	08-26-2010

Ming-Feng Kuo, Hsinchu City TW

Patent application number	Description	Published
20110305036	DISPLAY DEVICE - A display device includes a light guide plate, a first light source device, a second light source device, a display panel, and an image light source synchronization unit. The first and second light source devices are disposed adjacent to two opposite sides of the light guide plate respectively. A plurality of first micro structures are formed on a bottom surface of the light guide plate and capable of deflecting a light beam from the second light source device towards the right-hand side and deflecting a light beam from the first light source device towards the left-hand side. The image light source synchronization unit is capable of displaying the left-side image when the first light source device is turned on and the second light source device is turned off and displaying the right-side image when the first light source device is turned off and the second light source device is turned on.	12-15-2011
20120044715	BACKLIGHT MODULE AND DISPLAY DEVICE HAVING THE SAME - A backlight module includes a light guide plate, at least one first light source, and at least one second light source. A first light incident surface and a second light incident surface are alternately arranged on a light incident side of the light guide plate and form an angle with each other. The first light source is disposed adjacent to the first light incident surface, and a light beam emitted by the first light source is guided towards a left half of the light guide plate. The second light source is disposed adjacent to the second light incident surface, and a light beam emitted by the second light source is guided towards a right half of the light guide plate. The first light source and the second light source are alternately turned on and off in succession.	02-23-2012

Ming-Ho Kuo, Hsinchu City TW

Patent application number	Description	Published
20090161986	DIGITAL IMAGE CONVERTING APPARATUS WITH AUTO-CORRECTING PHASE AND METHOD THEREOF - A digital image converting apparatus with auto-correcting phase and a method thereof are provided. The digital image converting apparatus includes a phase controller, a delay locked loop (DLL), an analog-to-digital converter (ADC) and a position adjuster. The phase controller selects one of preset phases for outputting and continuously changes the output preset phase for controlling a clock signal produced by the delay locked loop. The ADC converts an analog display frame according to the adjusted clock signal. After all the preset phases are output in sequence, the phase controller can obtain an optimal phase for converting the display frame according to the smallest front porch of horizontal scan line and the smallest back porch of horizontal scan line of a digital display frame produced by the position adjuster.	06-25-2009

Ming-Hong Kuo, Hsinchu City TW

Patent application number	Description	Published
20120163107	MEMORY DEVICE CAPABLE OF OPERATION IN A BURN IN STRESS MODE, METHOD FOR PERFORMING BURN IN STRESS ON A MEMORY DEVICE, AND METHOD FOR DETECTING LEAKAGE CURRENT OF A MEMORY DEVICE - Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.	06-28-2012
20120254470	CONNECTOR APPLIED TO A PORTABLE DEVICE AND METHOD OF CONNECTING A PORTABLE DEVICE WITH AN EXTERNAL DEVICE - A connector applied to a portable device includes a wireless module, a connection module, at least one connection socket, a controller, and a memory. The wireless module is used for establishing a wireless connection between the portable device and the connector. The connection module is used for communicating with an external device. The at least one connection socket is used for connecting the connection module with the external device. The controller is coupled between the wireless module and the connection module for transmitting data between the wireless module and the connection module and executing commands to control the wireless module and the connection module. The memory is used for storing the commands required for the controller and is used as a data register to boost a data transmission rate between the portable device and the external device.	10-04-2012
20120326219	DYNAMIC MEMORY STRUCTURE - A dynamic memory structure includes a strip semiconductor material disposed on a substrate, a gate standing astride the strip semiconductor material and dividing the strip semiconductor material into a source terminal, a drain terminal and a channel region wherein a source width of the source terminal is larger than or equal to a channel width, a dielectric layer sandwiched between the gate and the strip semiconductor material, and a capacitor unit disposed on the substrate and including the source terminal serving as a lower electrode.	12-27-2012

Nai-Ping Kuo, Hsinchu City TW

Patent application number	Description	Published
20080282107	Method and Apparatus for Repairing Memory - Methods and apparatuses are disclosed in which a repair instruction, such as from a tester, causes an integrated circuit undergoing testing to substitute defective locations of a first set of memory cells in the integrated circuit with a second set of memory cells in the integrated circuit, despite the repair instruction omitting the defective locations of the first set of memory cells of the integrated circuit.	11-13-2008
20090063918	APPARATUS AND METHOD FOR DETECTING WORD LINE LEAKAGE IN MEMORY DEVICES - A method for detecting word line leakage in a memory device includes coupling a first plurality of word lines in the memory device to a voltage source while grounding a second plurality of word lines. Each of the second plurality of word lines is adjacent to a corresponding one of the first plurality of word lines. The method includes waiting for a period of time to allow the word lines to reach a predetermined read voltage level. The method also includes decoupling the first plurality of word lines from the voltage source and waiting for a second predetermined period of time to allow the first plurality of word lines to discharge. The method further includes sensing a current associated with the word lines, and comparing the current with a predetermined reference current which is selected for identifying a word line leakage condition associated with the first plurality of word lines.	03-05-2009
20100149893	METHOD AND APPARATUS FOR PROTECTION OF NON-VOLATILE MEMORY IN PRESENCE OF OUT-OF-SPECIFICATION OPERATING VOLTAGE - A method and apparatus for protecting non-volatile memory is described. A write command is processed only when an operating voltage is between specified operating limits and when a data pattern stored in the non-volatile memory is repeatedly read successfully.	06-17-2010
20110019487	APPARATUS AND METHOD FOR DETECTING WORD LINE LEAKAGE IN MEMORY DEVICES - According to an embodiment of the present invention, a method for detecting word line leakage in a memory device includes coupling a first word line in the memory device to a voltage source while coupling a second word line in the memory device to a ground level voltage. Next, the first word line is decoupled from the voltage source. The method also includes comparing a current of the first word line with a predetermined reference current for determining a leakage condition of the word line.	01-27-2011
20110216607	METHOD AND APPARATUS FOR PROTECTION OF NON-VOLATILE MEMORY IN PRESENCE OF OUT-OF-SPECIFICATION OPERATING VOLTAGE - A method and apparatus for protecting non-volatile memory is described. A write command is processed only when an operating voltage is between specified operating limits and when a data pattern stored in the non-volatile memory is repeatedly read successfully.	09-08-2011
20120243348	Method and Apparatus of Changing Device Identification Codes of a Memory Integrated Circuit Device - In the disclosed technology, the device identification code of a memory integrated circuit is changeable. In some cases, multiple device identification codes are stored on the memory integrated circuit, and multiple device identification code selection data are stored on the memory integrated circuit.	09-27-2012
20120262987	METHOD AND APPARATUS FOR LEAKAGE SUPPRESSION IN FLASH MEMORY IN RESPONSE TO EXTERNAL COMMANDS - Techniques are described herein for detecting and recovering over-erased memory cells in a flash memory device. In one embodiment, a flash memory device includes a memory array including a plurality of blocks of memory cells. The device also includes a command interface to receive a command from a source external to the memory device. The device also includes a controller including logic to perform a leakage-suppression process in response to the command. The leakage-suppression process includes performing a soft program operation to increase a threshold voltage of one or more over-erased memory cells in a given block of memory cells and establish an erased state.	10-18-2012
20120262988	METHOD AND APPARATUS FOR LEAKAGE SUPPRESSION IN FLASH MEMORY - Techniques are described herein for detecting and recovering over-erased memory cells in a flash memory device. In one embodiment, a flash memory device is described including a memory array including a plurality of blocks of memory cells. The device also includes a controller to perform a leakage-suppression process. The leakage-suppression process includes determining that a given block of memory cells includes one or more over-erased memory cells. Upon the determination, the leakage-suppression process also includes performing a soft program operation to increase the threshold voltage of the over-erased memory cells in the given block.	10-18-2012

Pei-Ching Kuo, Hsinchu City TW

Patent application number	Description	Published
20120217611	INTEGRATED CIRCUITS INCLUDING CONDUCTIVE STRUCTURES THROUGH A SUBSTRATE AND METHODS OF MAKING THE SAME - An integrated circuit includes a substrate having a first surface and a second surface. At least one conductive structure continuously extends through the substrate. At least one sidewall of the at least one conductive structure is spaced from a sidewall of the substrate by an air gap.	08-30-2012

Pei-Yun Kuo, Hsinchu City TW

Patent application number	Description	Published
20080288261	METHOD FOR DYNAMICALLY ADJUSTING AUDIO DECODING PROCESS - A method for dynamically arranging DSP tasks. The method comprises receiving an audio bit stream, checking a remaining execution time as the DSP transforms the audio information into spectral information, simplifying the step of transforming the audio information when the DSP detects that the remaining execution time is shorter then a predetermined interval, and skipping one section of the audio information and decoding the remaining section when the execution time is less than a predetermined interval.	11-20-2008
20090240357	METHOD FOR FINDING OUT THE FRAME OF A MULTIMEDIA SEQUENCE - An electronic device is provided comprising a multimedia play unit and a processor. The processor receives a multimedia sequence, acquires a first bitrate of a first frame header from the received multimedia sequence, predicts a first length of a first frame comprising the first frame header by a formula employing at least parameters comprising the first bitrate and a proportion of a second length to a second bitrate of a second frame header prior to the first frame header, and directs the multimedia play unit to play frame data of the first frame according to the predicted first length of the first frame.	09-24-2009
20110099020	Method for Dynamically Adjusting Audio Decoding Process - A method for dynamically arranging DSP tasks. The method comprises receiving an audio bit stream, checking a remaining execution time as the DSP transforms the audio information into spectral information, simplifying the step of transforming the audio information when the DSP detects that the remaining execution time is shorter then a predetermined interval, and skipping one section of the audio information and decoding the remaining section when the execution time is less than a predetermined interval.	04-28-2011

Sheng-Hsi Kuo, Hsinchu City CN

Patent application number	Description	Published
20090022914	PACKAGING BUFFER MATERIAL - A packaging buffer material includes a pair of outer sidewalls having concave grooves in a length direction, and bottom wall having a concave groove in the length direction, and stoppers preventing a packing object from being displaced, attached between the sidewalls. If external pressure is applied to the packaging buffer material, the outer sidewalls and concave groove bottoms are deformed. However, because of narrow widths of the concave grooves, the outer sidewalls are not entirely deformed but only the concave grooves are deformed. Due to this, a space can be kept between the sidewalls even if high external pressure is applied to the packaging buffer material.	01-22-2009

Sheng-Hsi Kuo, Hsinchu City TW

Patent application number	Description	Published
20110183089	BUFFER DEVICE PROVIDING RELIABLE BUFFER EFFECT - A buffer device providing reliable buffer effect includes a channel-shaped buffer member and at least one first reinforcing tubular member. The channel-shaped buffer member is a substantially U-sectioned hollow member and includes two facing inner sidewalls, two opposing outer sidewalls, an inner bottom wall, two outer top walls and an outer bottom wall to enclose a third buffer space therein. The first reinforcing tubular member is received in the third buffer space and encloses a first buffer space therein. The first reinforcing tubular member includes at least one normal-direction supporting wall extended between and pressed against the inner and outer bottom walls and provided with at least one second curved buffer section. The normal-direction supporting wall and the second curved buffer section thereof not only give the channel-shaped buffer member an increased normal-direction supporting strength, but also buffer impact force and compressing force applied normal to the outer bottom wall.	07-28-2011

Shih-Shin Kuo, Hsinchu City TW

Patent application number	Description	Published
20110048479	CONTROL STRUCTURE FOR AUTOMATICALLY OPENED AND CLOSED UMBRELLA - An improved control structure for automatically opened and closed umbrella is provided. The control structure contains a one-way wheel linked to a string of a bullet head or an upper nest, and further contains a locking arm and a positioning arm. When the umbrella is compressed, a vertical section of the locking arm moves towards and presses against the one-way wheel's ratchets. As such, if the umbrella is accidentally released during its closing operation, the one-way wheel is locked by the locking arm and the bullet head is therefore locked as well. The compressed shaft is then immediately positioned without being affected by the suddenly released opening spring. The umbrella is therefore much safer to operate.	03-03-2011
20110284043	CONTROL STRUCTURE OF SELF-OPENING/CLOSING UMBRELLA - A control structure is provided for mounting to a handle of a self-opening/closing umbrella and includes a reversal prevention wheel around which a safety rope is wound and extending through a central shaft of the umbrella with an end fixed to the reversal prevention wheel and an end fixed to a crown. A locking member that includes a pawl bar and an operation bar is arranged above the reversal prevention wheel. When The umbrella is being compressed and closed, the pawl bar engages a toothed surface of the reversal prevention wheel, whereby when errors occur in the closing of the umbrella, reversed rotation of the wheel is prevented by the pawl bar and the safety rope connected to the reversal prevention wheel is prevented from extension so as to prevent the central shaft from undesired extension and instantaneous spring back of the central shaft is also prevented.	11-24-2011
20120180833	CONTROL STRUCTURE FOR AUTOMATICALLY FOLDING AND UNFOLDING UMBRELLA - An improved control structure for automatically folding and unfolding umbrella is provided. The control structure contains a main body whose upper and lower halves are hollow with a support base in the middle. A control piece is installed in the upper hollow space for locking the nest when the umbrella is closed and for pushing away the bullet head when the umbrella is opened. A lever having a slant block at a top end is pivotally configured on the support base. An actuating piece is configured on top of the lever. In the lower hollow space of the main body, a one-way wheel with ratchets is installed and wound with a safety string. When the umbrella is closed, the lever is prepared to engage the ratchets whenever some mishap occurs. Therefore, the umbrella is safer to operate.	07-19-2012

Ta-Chuan Kuo, Hsinchu City TW

Patent application number	Description	Published
20110057262	SEMICONDUCTOR DEVICE - A semiconductor device including a substrate, an epitaxial layer, a first sinker, a transistor, a diode unit, a first buried layer, and a second buried layer is provided. When the semiconductor device is operated at the high voltage, the highly large substrate current due to the external load is avoided through the diode unit disposed in the semiconductor device of an embodiment consistent with the invention. Furthermore, according to the design of the semiconductor device, the issue of the narrow input voltage range is improved, and interference of the semiconductor device with the other semiconductor devices is prevented.	03-10-2011

Te-Wen Kuo, Hsinchu City TW

Patent application number	Description	Published
20120146486	Phosphors and Light-Emitting Devices Using the Same - The present invention relates to novel phosphors, which are represented by a formula of (A	06-14-2012

Tin-Hao Kuo, Hsinchu City TW

Patent application number	Description	Published
20120098120	CENTRIPETAL LAYOUT FOR LOW STRESS CHIP PACKAGE - A low-stress chip package is disclosed. The package includes two substrates. The first substrate includes an array of first conductive structures in the corner area of the chip, and an array of second conductive structures in the peripheral edge area of the chip. The first and second conductive structures each has a conductive pillar having elongated cross section in the plane parallel to the first substrate and a solder bump over the pillar. The package also includes a second substrate having an array of metal traces. The elongated pillars each form a coaxial bump-on-trace interconnect with a metal trace respectively. The long axis of the elongated cross section of a pillar in the corner area of the chip points to chip's center area, and the long axis of the elongated cross section of a pillar in chip's peripheral edge area aligns perpendicular to the edge.	04-26-2012
20120273934	REDUCED-STRESS BUMP-ON-TRACE (BOT) STRUCTURES - The embodiments of bump-on-trace (BOT) structures and their layout on a die described reduce stresses on the dielectric layer on the metal pad and on the metal traces of the BOT structures. By orienting the axes of the metal bumps away from being parallel to the metal traces, the stresses can be reduced, which can reduce the risk of delamination of the metal traces from the substrate and the dielectric layer from the metal pad. Further, the stresses of the dielectric layer on the metal pad and on the metal traces may also be reduced by orienting the axes of the metal traces toward the center of the die. As a result, the yield can be increased.	11-01-2012
20130026614	STRUCTURE AND METHOD FOR BUMP TO LANDING TRACE RATIO - The present disclosure provides an integrated circuit. The integrated circuit includes an interconnect structure formed on a substrate; a landing metal trace formed on the interconnect structure and coupled to the interconnect structure, wherein the landing metal trace includes a first width T defined in a first direction; and a metal bump post formed on and aligned with the landing metal trace, wherein the metal bump post includes a second width U defined in the first direction, and the second width U is greater than the first width T.	01-31-2013
20130026619	BUMP STRUCTURES - The embodiments of bump and bump-on-trace (BOT) structures provide bumps with recess regions for reflowed solder to fill. The recess regions are placed in areas of the bumps where reflow solder is most likely to protrude. The recess regions reduce the risk of bump to trace shorting. As a result, yield can be improved.	01-31-2013

Tsung-Hang Kuo, Hsinchu City TW

Patent application number	Description	Published
20110100465	Organic Solar Cell with Oriented Distribution of Carriers and Manufacturing Method of the Same - The present invention provides an organic solar cell with oriented distribution of carriers, which forming variation of distribution of electron donors and electron acceptors between active sub-layers of an active layer by utilizing buffer layer method, for improving carrier extraction efficiency and thus effectively enhancing performance of the organic solar. The present invention also provides a method for manufacturing an organic solar cell with oriented distribution of carriers.	05-05-2011

Tung-Cheng Kuo, Hsinchu City TW

Patent application number	Description	Published
20110089888	Multifunctional Notebook Battery Device - A notebook computer battery pack device charges an external electrical device and powers a notebook computer. The notebook computer battery pack device includes battery cells for converting chemical energy into direct current power, a first interface connector for transferring the direct current power to a notebook computer, a second interface connector for transferring the direct current power to the external electrical device, battery management circuitry for providing circuit protection, and charging circuitry for charging the external electrical device through the second interface connector.	04-21-2011

Tzu-Feng Kuo, Hsinchu City TW

Patent application number	Description	Published
20110177665	THERMAL PROCESS - A thermal process is disclosed. The thermal process preferably includes the steps of: providing a semiconductor substrate ready to be heated; and utilizing at least a first heating beam and a second heating beam with different energy density to heat the semiconductor substrate simultaneously. Accordingly, the present invention no only eliminates the need of switching between two different thermal processing equipments and shortens the overall fabrication cycle time, but also improves the pattern effect caused by the conventional front side heating.	07-21-2011
20120083090	Method of fabricating an NMOS transistor - A SiC region and a source/drain region are formed such that the SiC region includes a first portion overlapping the source/drain region and a second portion protruding from the source/drain region to a position beneath the LDD region. The concentration of crystalline SiC in the second portion is higher than the concentration of crystalline SiC in the first portion. The SiC region may be formed through a normal implantation before the second spacer is formed, or the SiC region may be formed through a tilt implantation or deposition epitaxially in a recess having a sigma-shape like sidewall after the second spacer is formed.	04-05-2012
20130026543	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a plurality of active areas disposed on a semiconductor substrate. A manufacturing method of the semiconductor device includes performing a first annealing process on the semiconductor substrate by emitting a first laser alone a first scanning direction, and performing a second annealing process on the semiconductor substrate by emitting a second laser alone a second scanning direction. The first scanning direction and the second scanning direction have an incident angle.	01-31-2013

Tzu-Wei Kuo, Hsinchu City TW

Patent application number	Description	Published
20090141606	METHOD AND SYSTEM FOR MANAGING DATA FROM HOST TO OPTICAL DISC - A method for managing data from a host to an optical disc includes: storing data into a write data queue (WDQ) when the data of sequential write commands from the host are write-address-discontinuous; and transferring specific data from the WDQ to a write buffer when an available memory space in the WDQ is lower than a first threshold value or an available memory space in the write buffer exceeds a second threshold value.	06-04-2009

Wei-Hung Kuo, Hsinchu City TW

Patent application number	Description	Published
20100090312	Nitride semiconductor structure and method for manufacturing the same - A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.	04-15-2010
20110003410	METHOD OF MANUFACTURING A LIGHT EMITTING DIODE ELEMENT - A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.	01-06-2011
20110254044	LIGHT EMITTING DEVICE AND METHOD OF FABRICATING A LIGHT EMITTING DEVICE - A light emitting device and a method of fabricating a light emitting device are provided. The light emitting device includes a carrier substrate, at least one epitaxy structure, a high resistant ring wall, a first electrode, and a second electrode. The epitaxy structure is disposed on the carrier substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is relatively away from the carrier substrate and the second semiconductor layer is relatively close to the carrier substrate. The high resistant ring wall surrounds the epitaxy structure and a width of the high resistant ring wall is greater than 5 μm. The first electrode is disposed between the carrier substrate and the epitaxy structure. The second electrode is disposed at a side of the epitaxy structure away from the carrier substrate.	10-20-2011
20120119220	NITRIDE SEMICONDUCTOR STRUCTURE - A nitride semiconductor substrate includes an epitaxy substrate, a patterned nitride semiconductor pillar layer, a nitride semiconductor layer, and a mask layer is provided. The nitride semiconductor pillar layer includes a plurality of first patterned arranged hollow structures and a plurality of second patterned arranged hollow structures formed among the first patterned arranged hollow structures. The second patterned arranged hollow structures have nano dimensions. The nitride semiconductor pillar layer is formed on the epitaxy substrate, and the nitride semiconductor layer is formed on the nitride semiconductor pillar layer. The mask layer covers surfaces of the nitride semiconductor pillar layer and the epitaxy substrate.	05-17-2012

Wen-Chang Kuo, Hsinchu City TW

Patent application number	Description	Published
20090157455	INSTRUCTION SYSTEM AND METHOD FOR EQUIPMENT PROBLEM SOLVING - A method and system of providing instructions in addressing an equipment problem are provided. An indication of an equipment problem is checked against a solution database to identify at least one suggested solution to the equipment problem. A suggested solution from the at least one suggested solution is provided. An actual fix solution implemented in association with the equipment problem is recorded.	06-18-2009

Wen-Feng Kuo, Hsinchu City TW

Patent application number	Description	Published
20110011148	Method for forming patterned modified metal layer - A method for forming a patterned modified metal layer is disclosed, which comprises the following steps: (A) providing a metal base which is in the form of either a bulk metal or a metal coated substrate, and a mold with patterns; (B) applying the mold onto the metal base to transfer the patterns of the mold to the metal surface; (C) removing the mold; and (D) modifying the whole metal base or the, surface and a certain depth beneath the surface of metal base to form a modified metal layer with designated patterns.	01-20-2011
20110156320	Method for preparing patterned metal oxide layer or patterned metal layer by using solution type precursor or sol-gel precursor - Methods for preparing a patterned metal/metal oxide layer by using a solution type precursor or sol-gel precursor are provided and, especially, a method for preparing a patterned carrier transport of a solar cell and a method for preparing biomedical material are provided, which comprise the following steps: (A) providing a substrate, and a mold with designed patterns formed thereon; (B) coating the substrate with a solution of a precursor to form a precursor layer, wherein the precursor is a metal precursor or a metal oxide precursor; (C) pressing the mold together with the precursor layer to transfer the patterns of the mold onto the precursor layer; (D) curing or pre-curing the precursor layer; (E) removing the mold; and (F) conducting an optional post-treatment, if it being demanded, to further modify the properties of precursor layer.	06-30-2011

Wu-Cheng Kuo, Hsinchu City TW

Patent application number	Description	Published
20110089447	LIGHT-EMITING DEVICE CHIP WITH MICRO-LENSES AND METHOD FOR FABRICATING THE SAME - A light-emitting device (LED) chip is disclosed. The LED chip includes a body having a light extraction surface. The body includes semiconductor layers including an n-type region and a p-type region. A plurality of micro-lenses is directly on the light extraction surface of the body. A pair of bond pads is electrically connected to the n-type and p-type regions, respectively. A method for fabricating the LED chip and an LED package with the LED chip are also disclosed.	04-21-2011
20110101405	LIGHT-EMITTING DIODE PACKAGE - A light-emitting diode package is provided. The light-emitting diode package comprises a substrate and a first metal layer disposed over the substrate. A solder layer is disposed on the first metal layer and a light-emitting diode chip is disposed on the solder layer, wherein the light-emitting diode chip comprises a conductive substrate and a multilayered epitaxial structure formed on the conductive substrate, and wherein the conductive substrate is adjacent to the solder layer.	05-05-2011
20120025387	CHIP PACKAGE AND FABRICATING METHOD THEREOF - A chip package and a fabrication method thereof are provided. The chip package includes a substrate and a chip disposed over the substrate. A solder layer is disposed between the chip and the substrate. A conductive pad is disposed between the solder layer and the substrate, wherein the conductive pad includes a first portion disposed under the solder layer, a second portion disposed away from the first portion and a connective portion disposed between the first portion and the second portion. The connective portion has a width which is narrower than a width of the first portion along a first direction perpendicular to a second direction extending from the first portion to the connective portion.	02-02-2012
20120248473	LIGHT EMITTING SEMICONDUCTOR STRUCTURE - The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.	10-04-2012

Yao-Hung Kuo, Hsinchu City TW

Patent application number	Description	Published
20110187457	Output Buffer Circuit Capable of Enhancing Stability - An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to forma signal output path and for adjusting impedance of the signal output path when the signal output path is formed.	08-04-2011
20120319770	Output Buffer Circuit Capable of Enhancing Stability - An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed. The output control unit comprises a plurality of output switches for individually turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier.	12-20-2012

Ying-Yu Kuo, Hsinchu City TW

Patent application number	Description	Published
20120287140	Display Interface Circuit - A display interface circuit includes a physical layer circuit for receiving and modulating an original data signal and an original clock signal, a frame buffer for storing and outputting the data signal according to the clock signal and a command signal, a display serial interface for transmitting the data signal and the clock signal through packetization, a configuration register for generating the command signal according to an asynchronous clock signal and the data signal, and an asynchronous delay circuit for adjusting a clock latency that the clock signal takes to be sent to the configuration register to generate the asynchronous clock signal.	11-15-2012

Yu-Chih Kuo, Hsinchu City TW

Patent application number	Description	Published
20110038487	EARPHONE ACOUSTIC SIMULATION SYSTEM AND OPTIMAL SIMULATION METHOD OF THE SAME - An earphone acoustic simulation system and an optimal simulation method of the same is disclosed. The earphone acoustic simulation system comprises an earphone front end simulation circuit and an earphone back end simulation circuit for simulating acoustic environment of a front cavity and a back cavity inside an earphone, and an artificial ear simulation circuit is connected respectively with the earphone front end simulation circuit and the earphone back end simulation circuit. Variation of an impedance of the artificial ear simulation circuit represents the frequency response in the earphone cavity. Besides, the optimal simulation of the earphone acoustic simulation system utilizes simulated annealing algorithm to obtain the optimal parameter of the earphone cavity, and anticipates the SPL curve related to the optimal earphone cavity through utilizing the earphone acoustic simulation system.	02-17-2011

Yu-Lan Kuo, Hsinchu City TW

Patent application number	Description	Published
20090089526	MEMORY DEVICES WITH DATA PROTECTION - A memory device comprises a memory array, a status register coupled with the memory array, and a security register coupled with the memory array and the status register. The memory array contains a number of memory blocks configured to have independent access control. The status register includes at least one protection bit indicative of a write-protection status of at least one corresponding block of the memory blocks that corresponds to the protection bit. The security register includes at least one register-protection bit. The register-protection bit is programmable to a memory-protection state for preventing a state change of at least the protection bit of the status register. The register-protection bit is configured to remain in the memory-protection state until the resetting of the memory device.	04-02-2009
20100299473	SERIAL PERIPHERAL INTERFACE AND METHOD FOR DATA TRANSMISSION - A serial peripheral interface of an integrated circuit including multiple pins and a clock pin is provided. The pins are coupled to the integrated circuit for transmitting an instruction, an address or a read out data. The clock pin is coupled to the integrated circuit for inputting multiple timing pulses. The plurality of pins transmit the instruction, the address or the read out data at rising edges, falling edges or both edges of the timing pulses.	11-25-2010
20120131227	SERIAL PERIPHERAL INTERFACE AND METHOD FOR DATA TRANSMISSION - A serial peripheral interface of an integrated circuit including multiple pins is provided. The pins are coupled to the integrated circuit. The integrated circuit receives an instruction through only one of the plurality of pins. The integrated circuit receives an address through the plurality of pins. The integrated circuit sends a read out data through the plurality of pins.	05-24-2012