Patent application number | Description | Published |
20090039415 | Method of forming dielectric including dysprosium and scandium by atomic layer deposition and integrated circuit device including the dielectric layer - In one embodiment, the method of forming a dielectric layer includes supplying a first precursor at a temperature less than 400 degrees Celsius to a chamber including a substrate. The first precursor includes dysprosium. A first reaction gas is supplied to the chamber to react with the first precursor. A second precursor is supplied at a temperature less than 400 degrees Celsius to the chamber, and the second precursor includes scandium. A second reaction gas is supplied to the chamber to react with the second precursor. | 02-12-2009 |
20140353713 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a substrate, a first insulation layer formed on the substrate in a first region, a photon absorption seed layer formed on the first insulation layer in the first region and on the substrate in a second region separate from the first region, and a photon absorption layer formed on the photon absorption seed layer in the first region. The photon absorption seed layer has a particular structure that may assist in reducing dislocation density in a region that includes a photon absorption layer. | 12-04-2014 |
20150115368 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a plurality of unit cells provided on a semiconductor substrate. Each of the unit cells may include a buried insulating pattern buried in the semiconductor substrate, a first active pattern provided on the buried insulating pattern, and a second active pattern provided on the buried insulating pattern and spaced apart from the first active pattern. The buried insulating pattern may define a unit cell region, in which each of the unit cells may be disposed. | 04-30-2015 |
20150255649 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes a first semiconductor layer including a recess region and protrusions defined by the recessed region, first insulating patterns provided on the protrusions and extending to sidewalls of the protrusions, and a second semiconductor layer to fill the recess region and cover the first insulating patterns. The protrusions includes a first group of protrusions spaced apart from each other in a first direction to constitute a row and a second group of protrusions spaced from the first group of protrusions in a second direction intersecting the first direction and spaced from each other in the first direction to constitute a row. The second group of protrusions are shifted from the first group of protrusions in the first direction. | 09-10-2015 |
Patent application number | Description | Published |
20090206318 | Nonvolatile memory device and method of manufacturing the same - A nonvolatile memory device, including a lower electrode on a semiconductor substrate, a phase change material pattern on the lower electrode, an adhesion pattern on the phase change material pattern and an upper electrode on the adhesion pattern, wherein the adhesion pattern includes a conductor including nitrogen. | 08-20-2009 |
20110315946 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device, including a lower electrode on a semiconductor substrate, a phase change material pattern on the lower electrode, an adhesion pattern on the phase change material pattern and an upper electrode on the adhesion pattern, wherein the adhesion pattern includes a conductor including nitrogen. | 12-29-2011 |
20120264271 | METHOD OF FORMING A CAPACITOR AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - A capacitor is fabricated by forming a mold layer of a silicon based material that is not an oxide of silicon, e.g., polysilicon or doped polysilicon, on a substrate, forming an opening through the mold layer, forming a barrier layer pattern along the sides of the opening, subsequently forming a lower electrode in the opening, then removing the mold layer and the barrier layer pattern, and finally sequentially forming dielectric layer and an upper electrode on the lower electrode. | 10-18-2012 |
20130005110 | Method of fabricating semiconductor device - Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer. | 01-03-2013 |
20130115760 | METHOD OF FORMING A THIN LAYER STRUCTURE - A thin layer structure includes a substrate, a blocking pattern that exposes part of an upper surface of the substrate, and a single crystalline semiconductor layer on the part of the upper surface of the substrate exposed by the pattern and in which all outer surfaces of the single crystalline semiconductor layer have a <100> crystallographic orientation. The thin layer structure is formed by an SEG process in which the temperature is controlled to prevent migration of atoms in directions towards the central portion of the upper surface of the substrate. Thus, sidewall surfaces of the layer will not be constituted by facets. | 05-09-2013 |
20130170784 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>. | 07-04-2013 |
20130213910 | BOAT FOR LOADING SEMICONDUCTOR SUBSTRATES - Provided is a boat for loading semiconductor substrates that includes a top plate and a bottom plate separated from each other, a rod extending from the bottom plate to the top plate and disposed between the top plate and the bottom plate, a plurality of buffer plates disposed between the top plate and the bottom plate and separated from each other by a first distance along a lengthwise direction of the rod, and a support provided between a first buffer plate and a second buffer plate which neighbor each other and supporting a loaded semiconductor substrate. | 08-22-2013 |
20140138794 | SEMICONDUCTOR DEVICE HAVING SUPPORTER AND METHOD OF FORMING THE SAME - A semiconductor device includes a plurality of lower electrodes having a vertical length greater than a horizontal width on a substrate, a supporter disposed between the lower electrodes, an upper electrode disposed on the lower electrodes, and a capacitor dielectric layer disposed between the lower electrodes and the upper electrode. The supporter includes a first element, a second element, and oxygen, an oxide of the second element has a higher band gap energy than an oxide of the first element, and the content of the second element in the supporter is from about 10 at % to 90 at %. | 05-22-2014 |
20140144380 | GAS SUPPLY PIPES AND CHEMICAL VAPOR DEPOSITION APPARATUS - A gas supply pipe and a chemical vapor deposition (CVD) apparatus including the gas supply pipe. The gas supply pipe includes: a first pipe connected to a gas storage apparatus via a gas supply line to supply a reacting gas into a reacting furnace; and a second pipe thermally contacting the first pipe to cool the first pipe, wherein a first end of the second pipe is connected to a cooling medium supplying unit via a cooling medium line such that a cooling medium circulates inside the second pipe, and a second, opposite end of the second pipe is connected to a cooling medium collecting unit. | 05-29-2014 |
20140193967 | METHOD OF FORMING AN EPITAXIAL LAYER ON A SUBSTRATE, AND APPARATUS AND SYSTEM FOR PERFORMING THE SAME - In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution. | 07-10-2014 |
20140209858 | NANO-STRUCTURE SEMICONDUCTOR LIGHT EMITTING DEVICE - A nano-structure semiconductor light emitting device includes a base layer formed of a first conductivity type semiconductor, and a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer. A plurality of nanocores is disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor. An active layer is disposed on surfaces of the plurality of nanocores and positioned above the first insulating layer. A second insulating layer is disposed on the first insulating layer and has a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores. A second conductivity-type semiconductor layer is disposed on the surface of the active layer positioned to be above the second insulating layer. | 07-31-2014 |
20140256117 | METHODS OF FORMING EPITAXIAL LAYERS - A method of forming an epitaxial layer includes forming a plurality of first insulation patterns in a substrate, the plurality of first insulation patterns spaced apart from each other, forming first epitaxial patterns on the plurality of first insulation patterns, forming second insulation patterns between the plurality of first insulation patterns to contact the plurality of first insulation patterns, and forming second epitaxial patterns on the second insulation patterns and between the first epitaxial patterns to contact the first epitaxial patterns, the first epitaxial patterns and the second epitaxial patterns forming a single epitaxial layer. | 09-11-2014 |
20140357062 | FABRICATING METHOD OF SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device, the method including forming a trench on a substrate; forming an insulating layer pattern within the trench; depositing an amorphous material on the substrate and the insulating layer pattern; planarizing the amorphous material; removing a portion of the amorphous material, the removed portion of the amorphous material being on an area of the substrate where the trench has been formed; crystallizing remaining portions of the amorphous material into a single crystal material; and planarizing the single crystal material. | 12-04-2014 |
20150309255 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>. | 10-29-2015 |
20150372194 | NANO-STRUCTURED SEMICONDUCTOR LIGHT-EMITTING ELEMENT - There is provided a nanostructure semiconductor light emitting device including a base layer formed of a first conductivity-type semiconductor, a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer, a plurality of nanocores disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor, an active layer disposed on surfaces of the plurality of nanocores positioned to be higher than the first insulating layer, a second insulating layer disposed on the first insulating layer and having a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores, and a second conductivity-type semiconductor layer disposed on the surface of the active layer positioned to be higher than the second insulating layer. | 12-24-2015 |