| Patent application number | Description | Published |
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| 20090087196 | METHOD AND SYSTEM FOR SPLIT VOLTAGE DOMAIN TRANSMITTER CIRCUITS - Methods and systems for split voltage domain transmitter circuits are disclosed and may include amplifying a received signal in a plurality of partial voltage domains. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. A sum of the plurality of partial domains may be equal to a supply voltage of the integrated circuit. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder or a ring modulator. The amplified signals may be communicated to the diodes, connected in a distributed configuration, via even-mode coupled transmission lines. The partial voltage domains may be generated via stacked source follower or emitter follower circuits. The voltage domain boundary value may be at one half the supply voltage due to symmetric stacked circuits. | 04-02-2009 |
| 20090148094 | DISTRIBUTED AMPLIFIER OPTICAL MODULATOR - Various embodiments described herein comprises an optoelectronic device comprising a waveguide structure including a plurality of optical modulator elements each having an optical property that is adjustable upon application of an electrical signal so as to modulate light guided in the waveguide structure. The optoelectronic device also comprises a plurality of amplifiers in distributed fashion. Each amplifier is electrically coupled to one of the optical modulators to apply electrical signals to the optical modulator. | 06-11-2009 |
| 20100059822 | METHOD AND SYSTEM FOR MONOLITHIC INTEGRATION OF PHOTONICS AND ELECTRONICS IN CMOS PROCESSES - Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer. | 03-11-2010 |
| 20100060972 | METHOD AND CIRCUIT FOR ENCODING MULTI-LEVEL PULSE AMPLITUDE MODULATED SIGNALS USING INTEGRATED OPTOELECTRONIC DEVICES - Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by two or more electrical input signals. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers utilizing flip-flops. Phase addition may be synchronized utilizing one or more electrical delay lines. The optical modulator may be integrated on a single substrate, which may include one of: silicon, gallium arsenide, germanium, indium gallium arsenide, polymers, or indium phosphide. The optical modulator may include a Mach-Zehnder interferometer or one or more ring modulators. | 03-11-2010 |
| 20110063024 | METHOD AND SYSTEM FOR BANDWIDTH ENHANCEMENT USING HYBRID INDUCTORS - A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load. | 03-17-2011 |
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| 20090189348 | Game apparatus and method - A design game of creative investigation and fun. The invention includes corresponding game parts and means of using via manner of play to create designs using game pieces. Game parts include a plurality of game pieces, at least one indicator, and at least one container. Plurality of game pieces includes at least one game piece having a free-form shape. Game pieces are primarily usable independent of a substantially conforming backing board and interfitting elements. Players position game pieces on a playing area to create designs. Designs are primarily inspired by themes. Players can build on their ideas quickly with relatively little time to review and “fix” their designs. Players can share their designs with each other before creating a new design. An emission can accompany a design. Indicia can be used for themes, turn, timing, number of game parts, playing area, procedure, emission, and scoring. Game parts can be customized and supplemented. Game apparatus and method offers versatile manner of play for diversified and specific ages, abilities, and approaches. Game is preferably for ages five to ninety-nine. | 07-30-2009 |
| 20100019451 | GAME APPARATUS AND METHOD - A game apparatus and method using a plurality of game pieces in various shapes which can be combined to express a theme, and a plurality of theme indicators which are used to identify a theme to be expressed using the game pieces. A player chooses a theme indication using a theme indicator, then combines a plurality of the game pieces into a design illustrating the theme. The game may include a timing indicator, so the player must complete the design within a determined period, a turn indicator for choosing a manner of play, and a game piece indicator for indicating the number of game pieces used during play. A player may be required to accompany a design with an emission, such as rhythm, improvisation, movement, language, sound, light and title, optionally indicated by an emission indicator or using an emission container. A scoring indicator may be provided for keeping score. | 01-28-2010 |
