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Krutsick, PA

Amy Krutsick, Chester Springs, PA US

Patent application numberDescriptionPublished
20080267934Use of Apoptotic Cells Ex Vivo to Generate Regulatory T Cells - Many cell types in the body can remove apoptotic and cellular debris from tissues; however, the professional phagocyte, or antigen presenting cell (“APC”), has a high capacity to do so. The recognition of apoptotic cells (“ACs”) occurs via a series of evolutionarily-conserved, AC associated molecular-pattern receptors (“ACAMPRs”) on APCs that recognize and bind corresponding apoptotic-cell-associated molecular patterns (“ACAMPs”). These receptors recognize ligands such as phosphotidyl serine and oxidized lipids found on apoptotic cells. Savill et al. (2002); and Gregory et al. (2004).10-30-2008

Thomas J. Krutsick, Fleetwood, PA US

Patent application numberDescriptionPublished
20090250706LIGHT ACTIVATED SILICON CONTROLLED SWITCH - The present invention provides an optically triggered switch and a method of forming the optically triggered switch. The optically triggered switch includes a silicon layer having at least one trench formed therein and at least one silicon diode formed in the silicon layer. The switch also includes a first thyristor formed in the silicon layer. The first thyristor is physically and electrically isolated from the silicon diode by the trench and the first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode.10-08-2009
20090250789METHODS OF COUNTER-DOPING COLLECTOR REGIONS IN BIPOLAR TRANSISTORS - The present invention provides a method of forming a bipolar transistor. The method includes doping a silicon layer with a first type of dopant and performing a first implant process to implant dopant of a second type opposite the first type in the silicon layer. The implanted dopant has a first dopant profile in the silicon layer. The method also includes performing a second implant process to implant additional dopant of the second type in the silicon layer. The additional implanted dopant has a second dopant profile in the silicon layer different than the first dopant profile. The method further includes growing an insulating layer formed over the silicon layer by consuming a portion of the silicon layer and the first type of dopant.10-08-2009
20100006979METHOD OF MANUFACTURING A TRENCH CAPACITOR FOR HIGH VOLTAGE PROCESSES - The present invention provides embodiments of a capacitor and a method of forming the capacitor. The capacitor includes one or more trenches formed in a semiconductor layer above a substrate. The trench includes dielectric material deposited on the trench walls and a conductive fill material formed within the trench and above the dielectric material. The capacitor also includes one or more first doped regions formed adjacent the trench(es) in the semiconductor layer. The first doped region is doped with a first type of dopant. The capacitor further includes one or more second doped regions formed adjacent the first doped region(s) in the semiconductor layer. The second doped regions are doped with a second type of dopant that is opposite to the first type of dopant.01-14-2010
20100009507METHOD OF CONSTRUCTING CMOS DEVICE TUBS - The present invention provides a method of fabricating an integrated circuit comprising at least one bipolar transistor and at least one field effect transistor. The method includes implanting a dopant species of a first type in a semiconductor layer that is doped with a dopant of a second type opposite the first type to form at least one sinker that contacts at least one collector of said at least one bipolar transistor. The method also includes applying heat to cause the dopant species to diffuse outwards to form at least one doped extension of said at least one sinker and forming said at least one field effect transistor in the doped extension.01-14-2010
20110003441LIGHT ACTIVATED SILICON CONTROLLED SWITCH - The present invention provides an optically triggered switch and a method of forming the optically triggered switch. The optically triggered switch includes a silicon layer having at least one trench formed therein and at least one silicon diode formed in the silicon layer. The switch also includes a first thyristor formed in the silicon layer. The first thyristor is physically and electrically isolated from the silicon diode by the trench and the first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode.01-06-2011
20110143513METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR - The disclosed subject matter provides a method of forming a bipolar transistor. The method includes depositing a first insulating layer over a first layer of material that is doped with a dopant of a first type. The first layer is formed over a substrate. The method also includes modifying a thickness of the first oxide layer based on a target dopant profile and implanting a dopant of the first type in the first layer. The dopant is implanted at an energy selected based on the modified thickness of the first insulating layer and the target dopant profile.06-16-2011

Patent applications by Thomas J. Krutsick, Fleetwood, PA US

Thomas Joseph Krutsick, Fleetwood, PA US

Patent application numberDescriptionPublished
20090230476OPTICALLY TRIGGERED ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT - The present invention provides a method and apparatus for providing electrostatic discharge (ESD) protection between a first and a second circuit node. One embodiment of the ESD protection circuit includes one or more steering diodes that generate electromagnetic radiation and couple the first circuit node to ground in response to a voltage applied to the first circuit node. The ESD protection circuit also includes a latch circuit that couples the first circuit node to ground in response to the electromagnetic radiation generated by the steering diode(s).09-17-2009
20090250785METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR - The disclosed subject matter provides a method of forming a bipolar transistor. The method includes depositing a first insulating layer over a first layer of material that is doped with a dopant of a first type. The first layer is formed over a substrate. The method also includes modifying a thickness of the first oxide layer based on a target dopant profile and implanting a dopant of the first type in the first layer. The dopant is implanted at an energy selected based on the modified thickness of the first insulating layer and the target dopant profile.10-08-2009