| Patent application number | Description | Published |
|---|
| 20080206920 | PCRAM device with switching glass layer - A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method. | 08-28-2008 |
| 20080212357 | Simultaneous read circuit for multiple memory cells - A memory device including a simultaneous read circuit design for multiple memory cells on a single interconnect using a fast fourier transform analysis circuit. The simultaneous read circuit can be used with any memory type storing information as an energy-absorbing state. | 09-04-2008 |
| 20080225580 | Resistance variable memory with temperature tolerant materials - A PCRAM memory device having a chalcogenide glass layer, preferably comprising antimony selenide having a stoichometric formula of about Sb | 09-18-2008 |
| 20080237563 | Diode/superionic conductor/polymer memory structure - A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode. | 10-02-2008 |
| 20090078925 | Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication - A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers. | 03-26-2009 |
| 20090124041 | RESISTANCE VARIABLE MEMORY DEVICE WITH NANOPARTICLE ELECTRODE AND METHOD OF FABRICATION - A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle. | 05-14-2009 |
| 20100027324 | VARIABLE INTEGRATED ANALOG RESISTOR - The invention relates to the use of chalcogenide devices exhibiting negative differential resistance in integrated circuits as programmable variable resistor components. The present invention is a continuously variable integrated analog resistor made of a chalcogenide material, such as a GeSeAg alloy. Continuously variable resistor states are obtained in the material via application of an electrical pulse to it. The pulse sequence, duration and applied potential determine the value of the resistance state obtained. | 02-04-2010 |
| 20100133499 | RESISTANCE VARIABLE MEMORY WITH TEMPERATURE TOLERANT MATERIALS - A PCRAM memory device having a chalcogenide glass layer, preferably comprising antimony selenide having a stoichometric formula of about Sb | 06-03-2010 |
| 20100140579 | SILVER-SELENIDE/CHALCOGENIDE GLASS STACK FOR RESISTANCE VARIABLE MEMORY - The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to an embodiment of the invention a resistance variable memory element is provided having at least one silver-selenide layer in between glass layers, wherein at least one of the glass layers is a chalcogenide glass, preferably having a Ge | 06-10-2010 |
| 20100171088 | RESISTANCE VARIABLE MEMORY DEVICE WITH SPUTTERED METAL-CHALCOGENIDE REGION AND METHOD OF FABRICATION - A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers. | 07-08-2010 |
| 20100178741 | ACCESS TRANSISTOR FOR MEMORY DEVICE - An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element. | 07-15-2010 |
| 20100219391 | LAYERED RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF FABRICATION - The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to one embodiment of the invention, a resistance variable memory element is provided having at least one silver-selenide layer in between two glass layers, wherein at least one of the glass layers is a chalcogenide glass, preferably having a Ge | 09-02-2010 |
| 20100317149 | Method of forming a memory device incorporating a resistance variable chalcogenide element - A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method. | 12-16-2010 |
| 20110037558 | CONTINUOUSLY VARIABLE RESISTOR - A continuously variable resistor is disclosed. The continuously variable resistor may comprise a first chalcogenide layer and a second chalcogenide layer. The second chalcogenide layers may be connected to the first chalcogenide layer and may have a metal interspersed within it. The second chalcogenide layer may be metal-rich, in a state of solid solution with the interspersed metal. The continuously variable resistor may be configured to exhibit NDR behavior. The continuously variable resistor may be configured to have three or more substantially non-volatile resistance states. | 02-17-2011 |
| 20110079709 | WIDE BAND SENSOR - A sensor and method of sensing is disclosed. The sensor is designed with a number of layers that are each able to sense a range of electromagnetic radiation. The sensor has two terminals for measuring the output signal of the sensor. The output signal of the sensor can be separated to identify the contributions to the output signal from each layer in order to determine the layer(s) that detected electromagnetic radiation. An array of sensors may be fabricated to increase the number of samples taken. | 04-07-2011 |
