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| 20090254516 | ACCESSING DATA IN A COLUMN STORE DATABASE BASED ON HARDWARE COMPATIBLE INDEXING AND REPLICATED REORDERED COLUMNS - Embodiments of the present invention provide hardware-friendly indexing of databases. In particular, forward and reverse indexing are utilized to allow for easy traversal of primary key to foreign key relationships. A novel structure known as a hit list also allows for easy scanning of various indexes in hardware. Group indexing is provided for flexible support of complex group key definition, such as for date range indexing and text indexing. A Replicated Reordered Column (RRC) may also be added to the group index to convert random I/O pattern into sequential I/O of only needed column elements. | 10-08-2009 |
| 20090254532 | ACCESSING DATA IN A COLUMN STORE DATABASE BASED ON HARDWARE COMPATIBLE DATA STRUCTURES - Embodiments of the present invention provide one or more hardware-friendly data structures that enable efficient hardware acceleration of database operations. In particular, the present invention employs a column-store format for the database. In the database, column-groups are stored with implicit row ids (RIDs) and a RID-to-primary key column having both column-store and row-store benefits via column hopping and a heap structure for adding new data. Fixed-width column compression allow for easy hardware database processing directly on the compressed data. A global database virtual address space is utilized that allows for arithmetic derivation of any physical address of the data regardless of its location. A word compression dictionary with token compare and sort index is also provided to allow for efficient hardware-based searching of text. A tuple reconstruction process is provided as well that allows hardware to reconstruct a row by stitching together data from multiple column groups. | 10-08-2009 |
| 20090319486 | METHODS AND SYSTEMS FOR REAL-TIME CONTINUOUS UPDATES - Embodiments of the present invention provide fine grain concurrency control for transactions in the presence of database updates. During operations, each transaction is assigned a snapshot version number or SVN. A SVN refers to a historical snapshot of the database that can be created periodically or on demand. Transactions are thus tied to a particular SVN, such as, when the transaction was created. Queries belonging to the transactions can access data that is consistent as of a point in time, for example, corresponding to the latest SVN when the transaction was created. At various times, data from the database stored in a memory can be updated using the snapshot data corresponding to a SVN. When a transaction is committed, a snapshot of the database with a new SVN is created based on the data modified by the transaction and the snapshot is synchronized to the memory. When a transaction query requires data from a version of the database corresponding to a SVN, the data in the memory may be synchronized with the snapshot data corresponding to that SVN. | 12-24-2009 |
| 20090319550 | FAST BULK LOADING AND INCREMENTAL LOADING OF DATA INTO A DATABASE - Embodiments of the present invention provide for batch and incremental loading of data into a database. In the present invention, the loader infrastructure utilizes machine code database instructions and hardware acceleration to parallelize the load operations with the I/O operations. A large, hardware accelerator memory is used as staging cache for the load process. The load process also comprises an index profiling phase that enables balanced partitioning of the created indexes to allow for pipelined load. The online incremental loading process may also be performed while serving queries. | 12-24-2009 |
| 20110099155 | FAST BATCH LOADING AND INCREMENTAL LOADING OF DATA INTO A DATABASE - Embodiments of the present invention provide for batch and incremental loading of data into a database. In the present invention, the loader infrastructure utilizes machine code database instructions and hardware acceleration to parallelize the load operations with the I/O operations. A large, hardware accelerator memory is used as staging cache for the load process. The load process also comprises an index profiling phase that enables balanced partitioning of the created indexes to allow for pipelined load. The online incremental loading process may also be performed while serving queries. | 04-28-2011 |
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| 20080315811 | System and Method for Collecting Characteristic Information of a Motor, Neural Network and Method for Estimating Regions of Motor Operation from Information Characterizing the Motor, and System and Method for Controlling Motor - A method for collecting operational parameters of a motor may include controlling the energization of a phase winding of the motor to establish an operating point, monitoring operational parameters of the motor that characterize a relationship between the energization control applied to the motor's phase winding and the motor's response to this control, and collecting information of the operational parameters for the operating point that characterizes the relationship between the applied energization control and the motor's response. The collected information characterizing the relationship between the applied energization control and the motor's response may be employed by a neural network to estimate the regions of operation of the motor. And a system for controlling the operation of motor may employ this information, the neural network, or both to regulate the energization of a motor's phase winding di-ring a phase cycle. | 12-25-2008 |
| 20090045768 | SINGLE SWITCH CONTROLLED SWITCHED RELUCTANCE MACHINE - An improved single-switch control circuit for use in a multi-phase switched reluctance machine is provided. The control circuit includes at least first and second phase windings, a switch, a capacitor, and a diode. The capacitor may have a polarity opposite that of a power source in the control circuit. The first winding may be connected in series with the switch and connected in parallel with a circuit block comprising the second winding. The second winding may be connected in parallel with the capacitor and in series with the diode. In operation, the switch may be used to redirect current from the first winding to the second winding. The capacitor can become charged by the redirected current until it eventually stores enough energy to essentially discontinue current flow in the first winding. Then, the capacitor can discharge its stored energy as a current through the second winding. In this manner, substantially all of the energy from the first winding can be transferred to the second winding. | 02-19-2009 |
| 20090200980 | SYSTEM AND METHOD FOR CONTROLLING FOUR-QUADRANT OPERATION OF A SWITCHED RELUCTANCE MOTOR DRIVE THROUGH A SINGLE CONTROLLABLE SWITCH - A single controllable switch ( | 08-13-2009 |
| 20100141061 | Switched Reluctance Machines with Minimum Stator Core - A two-phase switched reluctance machine is provided using discontinuous core structures as the stator for low-cost, high-performance drives. This discontinuous stator core structure contains short flux paths and maximum overlap between the rotor poles and stator poles in the stator discontinuous core structures, regardless of the rotor position. Example configurations of such core structure include E-core, L-core and I-core configurations. Using less steel and magnet wire than in conventional SRM designs results in cost savings of stator material and winding material. Efficiency of this novel SRM is improved because of shorter flux paths resulting in reduction of core losses and decreased phase resistance resulting in reduction of copper losses. Two-phase simultaneous excitation of the novel SRM can reduce torque ripple during commutation as compared with existing two-phase SRMs. | 06-10-2010 |
| 20110025253 | Single Switch Controlled Switched Reluctance Machine - An improved single-switch control circuit for use in a multi-phase switched reluctance machine is provided. The control circuit includes at least first and second phase windings, a switch, a capacitor, and a diode. The capacitor may have a polarity opposite that of a power source in the control circuit. The first winding may be connected in series with the switch and connected in parallel with a circuit block comprising the second winding. The second winding may be connected in parallel with the capacitor and in series with the diode. In operation, the switch may be used to redirect current from the first winding to the second winding. The capacitor can become charged by the redirected current until it eventually stores enough energy to essentially discontinue current flow in the first winding. Then, the capacitor can discharge its stored energy as a current through the second winding. In this manner, substantially all of the energy from the first winding can be transferred to the second winding. | 02-03-2011 |
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| 20080229049 | PROCESSOR CARD FOR BLADE SERVER AND PROCESS. - System including a processor card containing at least two processors, and a memory card containing at least two memory units. At least one memory unit is associated with each processor. A controller dynamically allocates memory in the at least two memory units to the at least two processors. | 09-18-2008 |
| 20090006718 | SYSTEM AND METHOD FOR PROGRAMMABLE BANK SELECTION FOR BANKED MEMORY SUBSYSTEMS - A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures. | 01-01-2009 |
| 20090006762 | METHOD AND APPARATUS OF PREFETCHING STREAMS OF VARYING PREFETCH DEPTH - Method and apparatus of prefetching streams of varying prefetch depth dynamically changes the depth of prefetching so that the number of multiple streams as well as the hit rate of a single stream are optimized. The method and apparatus in one aspect monitor a plurality of load requests from a processing unit for data in a prefetch buffer, determine an access pattern associated with the plurality of load requests and adjust a prefetch depth according to the access pattern. | 01-01-2009 |
| 20090006808 | ULTRASCALABLE PETAFLOP PARALLEL SUPERCOMPUTER - A novel massively parallel supercomputer of petaOPS-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC) having up to four processing elements. The ASIC nodes are interconnected by multiple independent networks that optimally maximize the throughput of packet communications between nodes with minimal latency. The multiple networks may include three high-speed networks for parallel algorithm message passing including a Torus, collective network, and a Global Asynchronous network that provides global barrier and notification functions. These multiple independent networks may be collaboratively or independently utilized according to the needs or phases of an algorithm for optimizing algorithm processing performance. Novel use of a DMA engine is provided to facilitate message passing among the nodes without the expenditure of processing resources at the node. | 01-01-2009 |
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| 20080233069 | Multi-Purpose Polymers, Methods and Compositions - Disclosed are multi-purpose polymers that are the polymerization product of a monomer mixture comprising at least one amino-substituted vinyl monomer; at least one nonionic vinyl monomer; at least one associative vinyl monomer; at least one semihydrophobic vinyl surfactant monomer; and, optionally, comprising one or more hydroxy-substituted nonionic vinyl monomer, crosslinking monomer, chain transfer agent or polymeric stabilizer. These vinyl addition polymers have a combination of substituents, including amino substituents that provide cationic properties at low pH, hydrophobic substituents, hydrophobically modified polyoxyalkylene substituents, and hydrophilic polyoxyalkylene substituents. The polymers provide surprisingly beneficial rheological properties in acidic aqueous compositions, and are compatible with cationic materials. The multi-purpose polymers are useful in a variety of products for personal care, health care, household care, institutional and industrial care, and industrial applications. | 09-25-2008 |
| 20090087400 | BREATHABLE POLYURETHANES, BLENDS, AND ARTICLES - A hair fixative composition containing a breathable polyurethane having an upright moisture vapor transmission rate (MVTR) of more than about 500 gms/m | 04-02-2009 |
