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Krishna K.
Krishna K. Lingamneni, Phoenix, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20090241118 | SYSTEM AND METHOD FOR PROCESSING INTERFACE REQUESTS IN BATCH - A batch messaging management system configured to process incoming request messages and provide reply messages in an efficient manner is disclosed. Instead of treating individual requests as individual transactions, the system reduces processing overhead within a mainframe computing environment by storing requests within a queue, spawning batch jobs according to the queue and processing multiple transactions using batch job processing. | 09-24-2009 |
Krishna K. Parat, Palo Alto, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100213578 | METHODS OF FORMING INTEGRATED CIRCUITS AND RESULTING STRUCTURES - Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by sequentially disposing one or more levels of semiconductor material on an acceptor substrate, and fabricating circuitry on each level of semiconductor material before disposition of a next-higher level. After encapsulation of the circuitry, the acceptor substrate is removed and semiconductor dice are singulated. Integrated circuit devices formed by the methods are also disclosed. | 08-26-2010 |
| 20100230724 | METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICES, AND RELATED STRUCTURES - Methods of forming semiconductor devices that include one or more arrays of memory devices in a three-dimensional arrangement, such as those that include forming a conductive contact in a dielectric material overlying a memory array, wherein a wafer bonding and cleaving process may be utilized to provide a foundation material for forming another memory array having an active region in electrical contact with the conductive contact. Additionally, the conductive contact may be formed in a donor wafer, which in turn may be bonded to a dielectric material overlying a memory array using another wafer bonding process. Novel semiconductor devices and structures including the same may be formed using such methods, for example. | 09-16-2010 |
| 20110080789 | AUTOMATIC SELECTIVE SLOW PROGRAM CONVERGENCE - Apparatus, methods, and systems are disclosed, including those to improve program voltage distribution width using automatic selective slow program convergence (ASSPC). One such method may include determining whether a threshold voltage (Vt) associated with a memory cell has reached a particular pre-program verify voltage. In response to the determination, a voltage applied to a bit-line coupled to the memory cell may be automatically incremented at least twice as the program voltage is increased, until the cell is properly programmed. Additional embodiments are also described. | 04-07-2011 |
| 20110133266 | Flash Memory Having a Floating Gate in the Shape of a Curved Section - The floating gate of a flash memory may be formed with a flat lower surface facing a substrate and a curved upper surface facing the control gate. In some embodiments, such a device has improved capacitive coupling to the control gate and reduced capacitive coupling to its neighbors. | 06-09-2011 |
Krishna K. Uprety, Downers Grove, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20080204970 | Transparent oxide capacitor structures - A ferroelectric capacitor structure having a lattice matched lanthanide oxide film intervening layer for providing a high polarization state. The capacitor structure includes a glass substrate, a transparent electrode layer disposed on the glass substrate, a lanthanide oxide film disposed on the transparent layer and a ferroelectric perovskite layer disposed on the lanthanide oxide film. The claim also encompases semi-transparent applications where one conductive electrode (top or bottom) is not transparent. | 08-28-2008 |
Krishna K. Yellepeddy, Austin, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090204966 | UTILITY FOR TASKS TO FOLLOW A USER FROM DEVICE TO DEVICE - A “follow-me” utility runs on each of a plurality devices a person may typically use. This utility monitors applications running on a device and intelligently saves the state of tasks a user is performing. When the follow-me utility detects that the user has initialized another device having the follow-me utility and connectivity to the original device, the utility automatically and transparently creates an environment on the new device so that the user may continue the task at the same point as when he or she last performed the task on the original device. When the user continues a task or starts a new task, the follow-me utility automatically and transparently updates files and task states on any devices having the follow-me utility and connectivity. The follow-me utility may make intelligent task migration decisions based on conditions such as network bandwidth, security policy, location, and device capability. | 08-13-2009 |