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Kotaro Kodani

Kotaro Kodani, Nagano-Shi JP

Patent application numberDescriptionPublished
20080245549WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - In a method of manufacturing a wiring board, the method includes: (i) forming a plurality of conductive patterns to come into contact with a support plate; (ii) forming a resin layer to cover the plurality of conductive patterns and to come into contact with the support plate; (iii) forming another conductive pattern connected to at least one of the plurality of conductive patterns; and (iv) removing the support plate. A first area of the support plate coming into contact with at least one of the plurality of conductive patterns in step (i) is different in surface roughness from a second area of the support plate coming into contact with the resin layer in step (ii).10-09-2008
20080246146WIRING SUBSTRATE AND WIRING SUBSTRATE MANUFACTURING METHOD - A method of manufacturing a wiring substrate comprises: a first step of forming, on a support plate, an electrode pad made of metal; a second step of etching the support plate in such a manner that the support plate has a shape which includes a projection portion to be contacted with the electrode pad; a third step of forming, on the surface of the support plate, an insulating layer for covering the electrode pad; a fourth step of forming, on the surface of the insulating layer, a conductive pattern to be connected to the electrode pad; and, a fifth step of removing the support plate.10-09-2008
20100032196MULTILAYER WIRING BOARD, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - In a multilayer wiring board having a wiring layer, a pad, an insulating layer provided between the wiring layer and the pad, and a plurality of connecting vias provided on the insulating layer and connecting the wiring layer to the pad, the connecting vias are provided on a peripheral edge of the pad.02-11-2010
20100084163WIRING BOARD AND METHOD OF FABRICATING THE SAME - A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.04-08-2010
20100263923WIRING SUBSTRATE HAVING COLUMNAR PROTRUDING PART - A method of making a wiring substrate includes forming a first metal layer on a surface of a support member, the first metal layer having at least one columnar through hole that exposes the surface of the support member, forming a columnar metal layer that fills the columnar through hole, forming an insulating layer on the columnar metal layer and on the first metal layer, forming an interconnection layer on a first surface of the insulating layer such that the interconnection layer is electrically connected to the columnar metal layer through the insulating layer, and forming a protruding part including at least part of the columnar metal layer by removing at least the support member and the first metal layer, the protruding part protruding from a second surface of the insulating layer opposite the first surface and serving as at least part of a connection terminal of the wiring substrate.10-21-2010
20100308451WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - There is provided a wiring substrate. The wiring substrate includes: an insulating layer; first electrode pads having first exposed surfaces, the first exposed surfaces being exposed from the insulating layer; and second electrode pads having second exposed surfaces, the second exposed surfaces being exposed from the insulating layer. There is a level difference between the first exposed surfaces and the second exposed surfaces.12-09-2010
20100314254METHOD OF MANUFACTURING WIRING SUBSTRATE - There is provided a method of manufacturing a wiring substrate. The method includes: (a) forming a first resist layer having first openings therein on a first surface of a support plate, forming first plated films in the first openings by an electrolytic plating method, and removing the first resist layer; (b) forming a second resist layer having second openings therein on the first surface of the support plate, forming second plated films in the second openings by an electrolytic plating method, and removing the second resist layer; (c) forming a wiring layer and an insulating layer such that the wiring layer is electrically connected to the first and second plated films; and (d) removing the support plate to expose the first and second plated films.12-16-2010

Kotaro Kodani, Nagano JP

Patent application numberDescriptionPublished
20100132993WIRING BOARD AND ELECTRONIC COMPONENT DEVICE - A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.06-03-2010
20110147924WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes an insulating layer, a wiring layer buried in the insulating layer, and a connection pad connected to the wiring layer via a via conductor provided in the insulating layer and in which at least a part is buried in an outer surface side of the insulating layer, wherein the connection pad includes a first metal layer (a first copper layer) arranged on the outer surface side, an intermediate metal layer (a nickel layer) arranged on a surface of an inner layer side of the first metal layer, and a second metal layer (a second copper layer) arranged on a surface of an inner layer side of the intermediate metal layer, and a hardness of the intermediate metal layer is higher than a hardness of the first metal layer and the second metal layer.06-23-2011

Patent applications by Kotaro Kodani, Nagano JP