Patent application number | Description | Published |
20100040184 | METHOD AND SYSTEM FOR COEXISTENCE IN A MULTIBAND, MULTISTANDARD COMMUNICATION SYSTEM UTILIZING A PLURALITY OF PHASE LOCKED LOOPS - Methods and systems for coexistence in a multiband, multistandard communication system utilizing a plurality of phase locked loops (PLLs) are disclosed. Aspects may include determining one or more desired frequencies of operation of a transceiver, determining a frequency of unwanted signals such as spurs, intermodulation, and/or mixing product signals, and configuring the PLLs to operate at a multiple of the desired frequencies while avoiding the unwanted signals. The desired frequencies may be generated utilizing integer, which may include multi-modulus dividers. The wireless standards may include LTE, GSM, EDGE, GPS, Bluetooth, WiFi, and/or WCDMA, for example. The frequencies may be configured to mitigate interference. PLLs may be shared when operating in TDD mode, and used separately operating in FDD mode. One or more digital interface signals, zero exceptions on a transmitter spur emission mask, and sampling clocks for ADCs and/or DACs in the transceiver may be generated utilizing the PLLs. | 02-18-2010 |
20100048196 | METHOD AND SYSTEM FOR A VARIABLE SYSTEM ON DEMAND - Methods and systems for a variable system on demand are disclosed. Aspects of the method may include configuring one or more filters in a wireless transmitter and/or receiver for a desired band and standard. The presence of a blocker signal in a receiver may be known and/or determined and the receiver may be configured for mitigating the blocker signal. A desired received signal strength indicator may be compared to a wideband received signal strength indicator. Gain levels may be configured in the receiver based on the comparison. Linearity of the receiver may be configured for blocker signal mitigation. The filters may include baseband filters and/or may be at an output of the receiver. The filters may include a plurality of stages, with one or more of the stages bypassed for filter configuring, and may include a mixer as an input. Capacitors and/or resistors may be configured in the filters. | 02-25-2010 |
20100265407 | METHOD AND SYSTEM FOR LOOP THROUGH FOR MULTI-BAND TV TUNERS AND SET-TOP BOX AND/OR TV SET APPLICATIONS - Methods and systems for loop-through for multi-band TV tuners and set-top box and/or TV set applications are disclosed and may include generating master and slave output signals from one or more low-noise amplifiers including master and slave stages. The master and slave stages may include parallel-coupled gain paths. Gate terminals and source terminals of input transistors for the master and slave stages may be directly coupled. The input transistors for the master and slave stages may share an inductor coupled to the source terminals and to ground. The master and slave stages may include cascode stages. VHF and UHF signals may be amplified in the multi-band receiver. The generated master output signal may be processed in the multi-band receiver, and may be utilized to generate I and Q output signals. A plurality of the slave output signals may be summed and communicated to a receiver external to the multi-band receiver. | 10-21-2010 |
20120236766 | Method and System for Coexistence in a Multiband, Multistandard Communication System Utilizing a Plurality of Phase Locked Loops - Methods and systems for coexistence in a multiband, multistandard communication system utilizing a plurality of phase locked loops (PLLs) are disclosed. Aspects may include determining one or more desired frequencies of operation of a transceiver, determining a frequency of unwanted signals such as spurs, intermodulation, and/or mixing product signals, and configuring the PLLs to operate at a multiple of the desired frequencies while avoiding the unwanted signals. The desired frequencies may be generated utilizing integer, which may include multi-modulus dividers. The wireless standards may include LTE, GSM, EDGE, GPS, Bluetooth, WiFi, and/or WCDMA, for example. The frequencies may be configured to mitigate interference. PLLs may be shared when operating in TDD mode, and used separately operating in FDD mode. One or more digital interface signals, zero exceptions on a transmitter spur emission mask, and sampling clocks for ADCs and/or DACs in the transceiver may be generated utilizing the PLLs. | 09-20-2012 |
20130010899 | Method and System for Loop Through for Multi-Band TV Tuners and Set-Top Box and/or TV Set Applications - Methods and systems for loop-through for multi-band TV tuners and set-top box and/or TV set applications are disclosed and may include generating master and slave output signals from one or more low-noise amplifiers including master and slave stages. The master and slave stages may include parallel-coupled gain paths. Gate terminals and source terminals of input transistors for the master and slave stages may be directly coupled. The input transistors for the master and slave stages may share an inductor coupled to the source terminals and to ground. The master and slave stages may include cascode stages. VHF and UHF signals may be amplified in the multi-band receiver. The generated master output signal may be processed in the multi-band receiver, and may be utilized to generate I and Q output signals. A plurality of the slave output signals may be summed and communicated to a receiver external to the multi-band receiver. | 01-10-2013 |
20130029613 | Method and System For Coexistence In A Multiband, Multistandard Communication System Utilizing A Plurality of Phase Locked Loops - Methods and systems for coexistence in a multiband, multistandard communication system utilizing a plurality of phase locked loops (PLLs) are disclosed. Aspects may include determining one or more desired frequencies of operation of a transceiver, determining a frequency of unwanted signals such as spurs, intermodulation, and/or mixing product signals, and configuring the Plls to operate at a multiple of the desired frequencies while avoiding the unwanted signals. The desired frequencies may be generated utilizing integer, which may include multi-modulus dividers. The wireless standards may include LTE, GSM, EDGE, GPS, Bluetooth, WiFi, and/or WCOMA, for example. The frequencies may be configured to mitigate interference. Plls may be shared when operating in TOO mode, and used separately operating in FOO mode. One or more digital interface signals, zero exceptions on a transmitter spur emission mask, and sampling clocks for AOCs and/or DACs in the transceiver may be generated utilizing the PLLs. | 01-31-2013 |
20130113117 | Wireless Communication Devices With In-Package Integrated Passive Components - Embodiments of the present disclosure can be used to both reduce the size and cost and improve the performance and power consumption of next generation wireless communication devices. In particular, embodiments enable board and semiconductor substrate area savings by using the fabrication package (which encapsulates the semiconductor substrate) as a design element in the design of next generation wireless communication devices. Specifically, embodiments use the substrate of the fabrication package to integrate into it components of the wireless radio transceiver (which are conventionally integrated into the semiconductor substrate) and other discrete components of the communication device (which are conventionally placed on the board of the device). As such, reduced board and semiconductor area can be realized. | 05-09-2013 |
20130114469 | Power-Efficient Multi-Mode Transceiver Synthesizer Configurations - Embodiments of the present disclosure provide power-efficient time division duplexing (TDD) mode configurations of frequency division duplexing (FDD) transceivers. Embodiments avoid time slotted operation of the receive and transmit synthesizers, thereby avoiding undesired operation under transient conditions, frequent calibration, and reduced power supply efficiency. In embodiments, a single synthesizer is used to enable TDD operation, thereby reducing power consumption and calibration requirements by approximately 50%. The single synthesizer may be maintained ON at all times, thus allowing the power supply's switching regulator to operate with substantially constant load conditions. | 05-09-2013 |
20130114771 | Minimization of Spurs Generated from a Free Running Oscillator - Embodiments of this disclosure include methods in which spurs generated by the drifting of an oscillation frequency of an oscillation signal provided by a free-running oscillator may be minimized and/or eliminated from an output signal of a phase locked loop (PLL). Methods include adjusting the free-running oscillator to prevent the oscillation frequency from drifting so that the spurs are eliminated. Performance data generated when the communications device engages a communications channel that is known not to generate spurs is compared to performance data generated when the communications device engages a desired communications channel. The free-running oscillator is adjusted until the two types of performance data are matched. Other methods include adjusting the dithering module of the PLL to prevent the oscillation frequency from drifting so that the spurs are eliminated. | 05-09-2013 |