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Komorowski
Jacek S. Komorowski, Bond Head CA
| Patent application number | Description | Published |
|---|---|---|
| 20100122882 | DRIVEN ACCESSORY WITH LOW-POWER CLUTCH FOR ACTIVATING OR DE-ACTIVATING SAME - A driven accessory having a clutch that permits selective operation of an accessory portion. The clutch employs rotational inertia to control driving engagement of a wrap spring to an interior clutch surface on a drive member and/or driving disengagement of the wrap spring from the interior clutch surface. | 05-20-2010 |
Lars Komorowski, Ratzeburg DE
| Patent application number | Description | Published |
|---|---|---|
| 20080293625 | Diagnosis of Inflammatory Bowel Diseases, More Particularly Ulcerative Colitis - The present invention concerns goblet cell antigen, a method for detecting antibodies directed against goblet cell antigen, a method based thereon for diagnosis of inflammatory bowel diseases and a kit for diagnosis of inflammatory bowel diseases, as well as monoclonal antibodies directed against goblet cell antigen. | 11-27-2008 |
| 20100150964 | POLYPEPTIDES AND METHODS FOR THE SPECIFIC DETECTION OF ANTIBODIES IN PATIENTS WITH A BORRELIA INFECTION - The present disclosure relates to proteins derived from OspC from bacteria of the genus | 06-17-2010 |
| 20100203558 | METHOD AND IMMUNE ABSORBENTS FOR THE SPECIFIC DETECTION AND ABSORPTION OF CELIAC DISEASE-AND HERPETIFORM DERMATITIS-ASSOCIATED ANTIBODIES - The present invention relates to fusion peptides that are derived from components of gliadin, to a method and reagents for the serological diagnosis of celiac disease or dermatitis herpetiformis by way of assaying antibodies that are directed against modified gliadin. The invention also relates to methods and pharmaceutical compositions for treating said diseases by specific immunoabsorption of these antibodies. | 08-12-2010 |
Marcin Komorowski, Toronto CA
| Patent application number | Description | Published |
|---|---|---|
| 20090254683 | VIDEO MULTIVIEWER SYSTEM USING DIRECT MEMORY ACCESS (DMA) REGISTERS AND BLOCK RAM - A video multiviewer system includes a Graphics Processing Unit (GPU) that includes a GPU memory. A video input module is operative with the GPU for receiving video data and transferring the video data to the GPU memory via a Direct Memory Access (DMA). A programmable circuit such as a Field Programmable Gate Array (FPGA) includes a multi-ported and in one aspect a dual ported block Random Access Memory (RAM) configured for a plurality of DMA channels for receiving video data and allowing uninterrupted operation of consecutive DMA transfers of video data to the GPU memory. A display displays the multiple video windows based upon video data received within the GPU memory. | 10-08-2009 |
Marcin Andrzej Komorowski, Toronto CA
| Patent application number | Description | Published |
|---|---|---|
| 20090256859 | VIDEO MULTIVIEWER SYSTEM WITH SWITCHER AND DISTRIBUTED SCALING AND RELATED METHODS - A video multiviewer system may include a plurality of video scalers operating in parallel for generating initially scaled video streams by performing video scaling in at least one dimension on a plurality of video input streams. The video multiviewer system may also include at least one video cross-point switcher coupled downstream from the video scalers, and a processing unit coupled downstream from the video cross-point switcher for generating additionally scaled video streams by performing additional video scaling on the initially scaled video streams. The video multiviewer system may also include a display cooperating with the processing unit for displaying multiple video windows based upon the additionally scaled video streams. | 10-15-2009 |
| 20090256863 | VIDEO MULTIVIEWER SYSTEM WITH SERIAL DIGITAL INTERFACE AND RELATED METHODS - A video multiviewer system may include a plurality of video scalers operating in parallel for generating initially scaled video streams by performing video scaling in at least one dimension on a plurality of video input streams. The video multiviewer system may also include at least one video cross-point switcher coupled downstream from the video scalers, and a processing unit coupled downstream from the video cross-point switcher for generating additionally scaled video streams by performing additional video scaling on the initially scaled video stream. The video scalers and the processing unit may communicate through the video cross-point switcher using a serial digital interface. | 10-15-2009 |