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Koji Kobayashi, Tokyo JP

Koji Kobayashi, Tokyo JP

Patent application numberDescriptionPublished
20090106497Apparatus, processor and method of controlling cache memory - An apparatus includes a processor which issues a plurality of commands including an identifier for classifying each of the commands, a cache memory which includes a plurality of ways to store a data corresponding to a command, wherein the cache memory includes a register to store the identifier, the register corresponding to at least one of the ways being fixed, the fixed way exclusively storing the data corresponding to the identifier during which the register stores the identifier, a replacement controller which selects a replacement way based on a predetermined replacement algorithm in case of a cache miss, and excludes the fixed way from a candidate of the replacement way when the register corresponding to the fixed way stores the identifier.04-23-2009
20090172309Apparatus and method for controlling queue - An apparatus includes a queue element which stores a plurality of memory access requests to be issued to a memory device, the memory access requests including a store request and a load request, and a controller which changes an order of the store and load requests so that the order includes a string of the store requests and a string of the load requests.07-02-2009
20090172339Apparatus and method for controlling queue - An apparatus includes a queue element which stores a plurality of memory access requests to be issued to a memory device, the memory access requests including a store request and a load request, and a controller which controls the queue element. The controller includes an address decision element which decides whether a first address of a first memory access request and a second address of a second memory access request relate with each other. The controller issues the second memory access request together with issuing of the first memory access request when the first address and the second address relate with each other.07-02-2009
20090273816IMAGE PROCESSING METHOD, APPARATUS AND PROGRAM - A method for processing an image obtained by reading an original plate on which at least one original is placed includes a determining step of determining whether the image is corresponding to one original or a plurality of originals placed on the original plate, an extracting step of extracting, from the image, one original image component corresponding to the one original or a plurality of original image components corresponding to the plurality of originals, and a processing step of performing image processing on the one or the plurality of extracted original image components, the image processing being different in accordance with the result of the determining step.11-05-2009
20090304266CORRESPONDING POINT SEARCHING METHOD AND THREE-DIMENSIONAL POSITION MEASURING METHOD - A plurality of images (I, J) of an object (M) when viewed from different viewpoints are taken in. One of the images is set as a standard image (I), and the other image is set as a reference image (J). One-dimensional pixel data strings with a predetermined width (W) are cut out from the standard image (I) and the reference image (J) along epipolar lines (EP12-10-2009
20100088473VECTOR COMPUTER SYSTEM WITH CACHE MEMORY AND OPERATION METHOD THEREOF - A vector computer system includes a vector processor configured to issue a vector store instruction which includes a plurality of store requests; a cache memory of a write back system provided between the vector processor and a main memory; and a write allocate determining section configured to generate an allocation control signal which specifies whether the cache memory operates based on a write allocate system or a non-write allocate system. When the vector processor issues the vector store instruction, the write allocate determining section generates the allocation control signal to each of the plurality of store requests based on a write pattern as a pattern of target addresses of the plurality of store requests. The cache memory executes each store request based on one of the write allocate system and the non-write allocate system which is specified based on the allocation control signal.04-08-2010
20100095302DATA PROCESSING APPARATUS, DISTRIBUTED PROCESSING SYSTEM, DATA PROCESSING METHOD AND DATA PROCESSING PROGRAM - A terminal includes a task information acquiring unit which acquires information on a task of data processing, and a communication task generator which generates a send task to allow a source apparatus of data required by the task to transmit the data required by the task to an apparatus executing the task and which transmits the send task to the source apparatus, when the source apparatus is another apparatus, which is different from the apparatus executing the task and which is connected to the apparatus executing the task via a network.04-15-2010
20100141954Optical coherence tomography apparatus - An optical coherence tomography apparatus includes a light source for generating a low-coherent light beam, which is split into a probe light beam toward the object and a reference light beam toward a reference optical path. The probe light beam is swept one-dimensionally at a predetermined frequency. An interference light beam is produced by interference between the probe light beam from the object and the reference light beam that has traveled along the reference optical path. The interference light beam is re-swept in the same direction and at the same frequency as the probe light beam. A two-dimensional image-capturing device detects the re-swept interference light beam at a frame rate corresponding to the light beam sweeping frequency and produces a video signal, which is processed to provide reflection intensity information of an interior of an object to be measured. Since the two-dimensional image-capturing means is employed and interference information is obtained using low-speed beam sweeping and re-sweeping means, a scanning optical system can be straightforwardly constructed.06-10-2010
20100149546Optical object measurement apparatus - An optical object measurement apparatus includes a light source for generating a low-coherent light beam, which is swept via an array of pinholes on a Nipkow disk that rotates about an axis. A beam splitter splits the swept light beam into a probe light beam toward an object to be measured and a reference light beam toward a reference optical path. The probe light beam from the object and the reference light that has traveled along the reference optical path are combined in the beam splitter to produce interference light. A two-dimensional image-capturing device detects the interference light and produces a video signal to provide reflection intensity information of the interior of the object. This allows an interference optical system to be readily realized and tomographic images of an object to be observed at high levels of resolution and contrast.06-17-2010

Patent applications by Koji Kobayashi, Tokyo JP